3 Commits

Author	SHA1	Message	Date
Hiroshi Doyu	0760e8faa9	iommu/tegra: smmu: Add device tree support for SMMU ... The necessary info is expected to pass from DT. For more precise resource reservation, there shouldn't be any overlapping of register range between SMMU and MC. SMMU register offset needs to be calculated correctly, based on its register bank. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>	2012-06-25 13:50:43 +02:00
Hiroshi DOYU	774dfc9bb7	iommu/tegra: gart: Fix register offset correctly ... DT passes the exact GART register ranges without any overlapping with MC register ranges. GART register offset needs to be adjusted by one passed by DT correctly. Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>	2012-05-11 11:42:05 +02:00
Thierry Reding	7cffae421e	iommu: tegra/gart: Add device tree support ... This commit adds device tree support for the GART hardware available on NVIDIA Tegra 20 SoCs. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>	2012-04-16 13:57:16 +02:00