2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-28 07:04:00 +08:00
Commit Graph

11 Commits

Author SHA1 Message Date
Sudip Mukherjee
c9435f35ae clocksource/drivers/moxart: Plug memory and mapping leaks
If of_iomap() or any other subsequent function fails moxart_timer_init()
exits without freeing memory and unmapping the timer base.

Add proper cleanup points.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@codethink.co.uk>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Link: http://lkml.kernel.org/r/1482099996-1524-1-git-send-email-sudipm.mukherjee@gmail.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-12-19 11:19:57 +01:00
Daniel Lezcano
e2a2d38501 clocksource/drivers/moxart: Replace panic by pr_err
The clksrc-of code is supposed to catch the return code and fail gracefully.

Don't panic on error, but print the error and exit with a relevant error
code.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Joel Stanley <joel@jms.id.au>
2016-09-12 07:28:38 +02:00
Daniel Lezcano
cf1e929c8a clocksource/drivers/moxart: Replace setup_irq by request_irq
Save memory space and line of code by replacing setup_irq by request_irq.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Joel Stanley <joel@jms.id.au>
2016-09-12 07:28:23 +02:00
Joel Stanley
ba36d53db5 clocksource/drivers/moxart: Add Aspeed support
The Aspeed SoC has timer IP with a very similar register layout to the
moxart timer. This patch adds support for the fourth and fifth gen
aspeed SoCs, and has been tested on the ast2400 and ast2500.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-09-09 14:15:47 +02:00
Joel Stanley
82fdd07087 clocksource/drivers/moxart: Use struct to hold state
Add a struct moxart_timer to hold the driver state, including the
irqaction and struct clock_event_device.

Most importantly this holds values for enabling and disabling the timer,
so future support can be added for devices that use different bits for
enable/disable.

In preparation for future hardware support we add a MOXART prefix to the
existing values.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-09-09 14:15:36 +02:00
Joel Stanley
7016474278 clocksource/drivers/moxart: Refactor enable/disable
This patch abstracts the enable and disable register writes into their
own functions in preparation for future changes to use SoC specific
values for the writes.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-09-09 14:15:21 +02:00
Daniel Lezcano
177cf6e52b clocksources: Switch back to the clksrc table
All the clocksource drivers's init function are now converted to return
an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the
clksrc-of table.

Let's convert back the names:
 - CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE
 - clksrc-of-ret              => clksrc-of

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

For exynos_mct and samsung_pwm_timer:
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

For arch/arc:
Acked-by: Vineet Gupta <vgupta@synopsys.com>

For mediatek driver:
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>

For the Rockchip-part
Acked-by: Heiko Stuebner <heiko@sntech.de>

For STi :
Acked-by: Patrice Chotard <patrice.chotard@st.com>

For the mps2-timer.c and versatile.c changes:
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>

For the OXNAS part :
Acked-by: Neil Armstrong <narmstrong@baylibre.com>

For LPC32xx driver:
Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com>

For Broadcom Kona timer change:
Acked-by: Ray Jui <ray.jui@broadcom.com>

For Sun4i and Sun5i:
Acked-by: Chen-Yu Tsai <wens@csie.org>

For Meson6:
Acked-by: Carlo Caione <carlo@caione.org>

For Keystone:
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>

For NPS:
Acked-by: Noam Camus <noamca@mellanox.com>

For bcm2835:
Acked-by: Eric Anholt <eric@anholt.net>
2016-06-28 10:19:35 +02:00
Daniel Lezcano
b7357e656c clocksource/drivers/moxart: Convert init function to return error
The init functions do not return any error. They behave as the following:

  - panic, thus leading to a kernel crash while another timer may work and
       make the system boot up correctly

  or

  - print an error and let the caller unaware if the state of the system

Change that by converting the init functions to return an error conforming
to the CLOCKSOURCE_OF_RET prototype.

Proper error handling (rollback, errno value) will be changed later case
by case, thus this change just return back an error or success in the init
function.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2016-06-28 10:19:24 +02:00
Viresh Kumar
37ae24716a clockevents/drivers/moxart: Migrate to new 'set-state' interface
Migrate moxart driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-08-10 11:40:32 +02:00
Jonas Jensen
adf157ebf6 ARM: clocksource: moxart: Add bitops.h include
bitops.h included implicitly, add #include <linux/bitops.h>

Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-08-01 01:13:34 +02:00
Jonas Jensen
07862c1cd6 ARM: clocksource: Add support for MOXA ART SoCs
This patch adds an clocksource driver for the main timer(s)
found on MOXA ART SoCs.

The MOXA ART SoC provides three separate timers with individual
count/load/match registers, two are used here:

TIMER1: clockevents, used to support oneshot and periodic events
TIMER2: set up as a free running counter, used as clocksource

Timers are preconfigured by bootloader to count down and interrupt
on match or zero. Count increments every APB clock cycle and is
automatically reloaded when it reaches zero.

Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2013-07-18 15:27:47 +02:00