Add support for the new smp_twd runtime registration interface
to the tegra platforms, and remove the old compile-time support.
Tested on Harmony.
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Tegra PCIe driver waits for PLL to lock using busy loop.
If PLL fails to lock for some reason, this leads to silent lockup
while booting (as PCIe code is not modular).
Fix by adding timeout, so if PLL doesn't lock in a couple
of seconds, just PCIe driver fails and machine continues to boot.
Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 6e96aca397 (arm/tegra: Harmony PCIe: Don't touch pinmux)
removed runtime tri-state toggling for PCIe related pinmux groups,
but it seems that the fact that all of them are tri-state by default
has been overlooked. Change defaults for these groups to TEGRA_TRI_NORMAL.
Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
__mem_pci is only used to enable readl/writel and friends. Just condition
this on readl being defined and remove all the __mem_pci defines.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Stephen Warren <swarren@nvidia.com>
Move tegra specific mach/io.h parts into iomap.h.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Colin Cross <ccross@android.com>
Cc: Olof Johansson <olof@lixom.net>
This causes the Tegra pinctrl driver to be built whenever core Tegra
support is enabled.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds a driver for the Tegra pinmux, and required parameterization
data for Tegra20 and Tegra30.
The driver is initially added with driver name and device tree compatible
value that won't cause this driver to be used. A later change will switch
the pinctrl driver to use the correct values, switch the old pinmux
driver to be disabled, and update all code that uses the old pinmux APIs
to use the new pinctrl APIs.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
[squashed "fix case of Tegra30's foo_groups[] arrays"]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tegra board updates. Most of the board updates for tegra30 and for some
of the driver device-tree conversions have gone in through the other
branches, so that leaves quite little left here -- mostly a couple
of updates to the not-yet-converted tegra2 boards and a couple of
device-tree updates.
* tag 'tegra-boards' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: match SoC name not board name in DT board files
ARM: tegra: PCIe: Provide 3.3V supply voltage
ARM: dt: tegra: add the wifi led to paz00 device tree
ARM: dt: tegra: add the power gpio key to paz00 device tree
ARM: dt: tegra: add ADT7461 temperature sensor to paz00 device tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tegra SoC driver support.
Some device tree conversions, some new drivers. and a fix for an issue
introduced in Grant Likely's irq_domain conversion in his tree. Because
of that, this branch depends on his branch to build (but not to merge):
git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
* tag 'tegra-soc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: (34 commits)
ARM: tegra: uncompress.h: Don't depend on kernel headers
gpio: tegra: Fix build issue due to irq_domain rework.
ARM: tegra: Remove duplicate PMU interrupt inversion code
ARM: tegra: Add a simple PMC driver
ARM: tegra: dma: not required to move requestor when stopping.
ARM: tegra: Fix EMC pdata initialization from registers
gpio: tegra: Parameterize the number of banks
gpio: tegra: Dynamically allocate IRQ base, and support DT
ARM: tegra: Remove use of TEGRA_GPIO_TO_IRQ
ARM: tegra: Pass uncompress.h UART selection to DEBUG_LL
ARM: tegra: uncompress.h: Choose a UART at runtime
ARM: tegra: uncompress.h: Store UART address in a variable
ARM: tegra: Introduce define DEBUG_UART_SHIFT
ARM: tegra: Support Tegra30 in decompressor UART setup
ARM: tegra: Pause DMA when reading transfer count
ARM: tegra: emc: device tree support
ARM: tegra: emc: convert tegra2_emc to a platform driver
ARM: tegra: fuse: add bct strapping reading
ARM: tegra: fuse: add functions to access chip revision
ARM: tegra: fuse: use apbio dma for register access
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From: Olof Johansson <olof@lixom.net>
SoC new development for tegra SoCs, mostly tegra30 core support.
It also includes one stray bugfix that was misapplied (should have been
in soc-drivers), but it went out to the stable branches before I noticed
so I've left it in.
* tag 'tegra-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: Demote EMC clock inconsistency BUG to WARN
ARM: tegra: Avoid compiling cpuidle code when not configured
ARM: tegra: cpuidle driver for tegra
ARM: tegra: assembler code for LP3
ARM: tegra: definitions for flow controller
ARM: tegra: initialize basic system clocks
ARM: tegra: enable tegra30 clock framework
ARM: tegra: implement basic tegra30 clock framework
ARM: tegra: add support for new clock framework features
ARM: tegra: add support for tegra30 interrupts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Minor fixes that weren't urgent enough to go into 3.3. The two paz00
patches are in mainline already but got merged after the branch point
for this branch, so they're duplicated. I also ended up merging in
rmk/for-armsoc into this later on to fix a bug introduced by it, so it's
included but it's not the base of this branch.
* tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: Enable CPUIdle on Tegra20
ARM: tegra: export usb phy symbols
ARM: tegra: build localtimer support only when needed
ARM: tegra: select CPU_FREQ_TABLE
ARM: tegra: select required CPU and L2 errata options
ARM: tegra: paz00: fix wrong UART port on mini-pcie plug
ARM: tegra: paz00: fix wrong SD1 power gpio
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Minor fixes that weren't urgent enough to go into 3.3. The two paz00
patches are in mainline already but got merged after the branch point
for this branch, so they're duplicated. I also ended up merging in
rmk/for-armsoc into this later on to fix a bug introduced by it, so it's
included but it's not the base of this branch.
* tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra:
ARM: tegra: Enable CPUIdle on Tegra20
ARM: tegra: export usb phy symbols
ARM: tegra: build localtimer support only when needed
ARM: tegra: select CPU_FREQ_TABLE
ARM: tegra: select required CPU and L2 errata options
ARM: tegra: paz00: fix wrong UART port on mini-pcie plug
ARM: tegra: paz00: fix wrong SD1 power gpio
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As the LP3 code also works for Tegra20, we can enable cpuidle for Tegra20.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The ehci driver can be a module, so the functions provided
by the tegra platform code used by ehci-tegra need to
be exported.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alan Ott <alan@signal11.us>
Signed-off-by: Olof Johansson <olof@lixom.net>
It is possible to build a tegra kernel without localtimer
support, so the tegra specific parts should only be built
when that is indeed enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alan Ott <alan@signal11.us>
Signed-off-by: Olof Johansson <olof@lixom.net>
The tegra cpufreq implementation relies on the cpu_freq_table
code, so make sure that this is always there when needed.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alan Ott <alan@signal11.us>
Signed-off-by: Olof Johansson <olof@lixom.net>
The ports are used as follows:
UART1/A: Routed to debug dongle
UART2/B: GPS
UART3/C: Bluetooth
UART4/D: Routed to debug dongle
UART5/E: Not connected
The debug dongle has jumpers to connect either UART1/A or UART4/D to
the DB-9 connector. UART1/A is typically used on Cardhu, and is the option
we assume here.
For now, only enable UART1/A, and explicitly disable all other ports.
The explicit disable prevents the message "of_serial 70006040.serial:
no clock-frequency property set" being printed during boot.
Enabling the other ports requires their clocks to be enabled, or accesses
to the registers will hang. At present, this requires adding entries into
board-dt-tegra30.c's tegra_dt_clk_init_table[]. Lets punt on that and wait
for the common clock bindings to set this all up, although that will also
requiring adding clock support to 8250.c.
While we're at it, fix board-dt-tegra30.c to enable the correct clock for
the debug UART. We got away with this before, because the bootloader already
enabled it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
board-dt-tegra*.c should support any board using Tegra when booted using
device tree. Instead of explicitly listing all the supported boards,
which requires a kernel change for each new board, list the supported SoC
model instead.
Note that the board files do currently have explicit support for setting
up each board's pinmux. However, it's fairly likely that at least the
basic devices on any new board will work just fine as set up by the boot-
loader, and the pinmux data should be moving into device tree soon anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
splits OTG functionality away from transceivers.
We have known for quite a long time that struct otg_transceiver was
a bad name for the structure, considering transceiver is far from
being OTG-specific (see 4e67185).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJPTeeMAAoJEIaOsuA1yqRE6ZAP/j2G6DaDyng6vpyYQi2drXaY
NKx3pA0sC98NACOv6sh+urcMDcDctLmOnwV18U+GNNP+qExQFnyuc7iGsXRxfUOj
qkIbVPxzPcE0opmEMFJ5ZT85rw33DqKjFnQT4av3wwXe/qSrEkAfBoBSb6wn73rA
v0JOhceGsFb+kJAc7U9Ji9A9xSjj+6uw08RTuuQv8KBLb5Pws+NoQ6UEjlni8umA
lkOSelyBZN1OJU+fZKIpS4+SiwtdkZCm2wSIUiwaPosdJgw0w8fz0zNjn/4gAHB1
oPyjjjP3/VDegp9CuYDRlnBgQa2K4V1vbjrBfhKbyar8fsOSoaPVv1fR9VKgVnT8
RKlXKSeFEsdP4fOGYCjNKAzjeQH/qSNzdzo+s4GMqoWq7Lm3+b56zdQWvRmTT7Xg
++bMqFAi0noeU8aZWwSDMFiYv6O19o+Px4OTS/3aRmR1wdJpUUSk2M7Quw6A/YNj
4Q5hDvio2eYtI1nya9yMS/j4ZiJ5fDQb5jUfBDB1MKtkZKKzVVSboK8P/rFq5+xf
xdUfBRd7/fMk+he6RtemfjhMdYTiX6Cm6VzveZVBL4+7dERbnJDRgDhSJOYvA/eW
Bvc7BY+/EYz7msF0gjLyWu3BBiChajk/D5ukoCIssUPGuIhmO1S7JRi1s+fLaNs3
Bz8Haxql69YWrNL2ouQf
=WiB6
-----END PGP SIGNATURE-----
Merge tag 'xceiv-for-v3.4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
USB: transceiver changes for 3.4
Here we have a big rework done by Heikki Krogerus (thanks) which
splits OTG functionality away from transceivers.
We have known for quite a long time that struct otg_transceiver was
a bad name for the structure, considering transceiver is far from
being OTG-specific (see 4e67185).
* 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix L4_EMU_34XX_BASE error after iomap changes
ARM: OMAP2+: Limit omap_read/write usage to legacy USB drivers
ARM: OMAP: Remove plat/io.h by splitting it into mach/io.h and mach/hardware.h
ARM: OMAP2+: Move most of plat/io.h into local iomap.h
ARM: OMAP1: Move most of plat/io.h into local iomap.h
ARM: OMAP1: Move 16xx GPIO system clock to platform init code
ARM: OMAP: Move omap_init_consistent_dma_size() to local common.h
ARM: OMAP2+: Move SDRC related functions from io.h into local common.h
ARM: OMAP2+: Drop DISPC L3 firewall code
ARM: OMAP2xxx: PM: remove obsolete timer disable code in the suspend path
ARM: OMAP: McSPI: Remove unused flag from struct omap2_mcspi_device_config
(update to latest rmk/for-arm-soc branch)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This fixes the following compile error:
CC arch/arm/boot/compressed/misc.o
In file included from arch/arm/boot/compressed/misc.c:28:0:
arch/arm/mach-tegra/include/mach/uncompress.h: In function 'arch_decomp_setup':
arch/arm/mach-tegra/include/mach/uncompress.h:125:2: error: implicit declaration of function 'BUILD_BUG_ON_ZERO' [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
This is due to use of the ARRAY_SIZE() macro. Typically, this would be
solved by including <linux/bug.h>, but the compressor code isn't part of
the kernel, and so should not include kernel headers. Instead, define
the few macros the code uses directly, and in a way that doesn't depend
on <linux/bug.h>.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Use the new usb_phy_* functions with transceiver
operations instead of the old otg functions.
Includes fixes from Sascha Hauer.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Acked-by: Li Yang <leoli@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Add support for bringing up secondary cores on Tegra30. On Tegra30 secondary
CPU cores are powergated, so we need to turn on the domains before we can bring
the CPU cores online. Bringing secondary cores online happens early during the
sytem boot, so we call powergating initialization from platform early_init
function.
Based on work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Alex Frid <afrid@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Secondary CPU powerdomains can be powergated on Tegra30. Add the necessary
functions to do this. This will be used to boot the secondary CPUs later on.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for the new powerdomains in Tegra30 such as extra CPU cores and
the SATA domain.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Export tegra_powergate_is_powered(). This function will be used by the Tegra30
code to bringup secondary CPU cores.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Prepare the powergating code for other Tegra variants which have a different
number of powerdomains.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Prepare the Tegra secondary CPU core bringup code for other Tegra variants.
The reset handler is also generalized to allow for future introduction of
powersaving modes which turn off the CPU cores.
Based on work by:
Scott Williams <scwilliams@nvidia.com>
Chris Johnson <cwj@nvidia.com>
Colin Cross <ccross@android.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Introduce some functions to write to the flowcontroller registers. The
flowcontroller controls CPU sleepstates and wakeup.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Secondary core bringup relies on the Tegra chipid to distinguish between
Tegra variants. Therefore this data needs to be available early on.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The powergating and reset handling code needs to differentiate between Tegra
variants. Therefore we export the chipid here.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The chipid register contains information about the Tegra variant and revision.
We want differentiate between Tegra variants for powergating and secondary
core bringup. This patch cleans up the reading and decoding of this register.
In subsequent patches the variant will exported as a global variable.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The PCIe reference clock needs a 3.3V supply voltage to work properly.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARM IP revisions in Tegra are:
Tegra20: CPU r1p1, PL310 r2p0
Tegra30: CPU A01=r2p7/>=A02=r2p9, NEON r2p3-50, PL310 r3p1-50
Based on work by Olof Johansson, although the actual list of errata is
somewhat different here, since I added a bunch more and removed one PL310
erratum that doesn't seem applicable.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cc: stable@vger.kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
When this inconsistency occurs, the system will typically operate without
issue, it's just that EMC scaling won't optimally. Convert the BUG_ON to
a WARN_ONCE in order to allow the kernel to boot, but still complain.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
No need to compile cpuidle.c and sleep.S if cpuidle isn't configured in the
kernel.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.
CC: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
* lpc32xx/drivers: (566 commits)
ARM: LPC32xx: ADC support for mach-lpc32xx
Includes an update to Linux 3.3-rc4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now that most platforms don't need disable_fiq and arch_ret_to_user
macros, we can remove the empty macros or empty entry-macro.S files.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Ryan Mallon <rmallon@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
This is the first step in separating USB transceivers from
USB OTG utilities.
Includes fixes to IMX code from Sascha Hauer.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Acked-by: Li Yang <leoli@freescale.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The new PMC driver now configures the PMU interrupt inversion, so board
files don't need to poke the PMC registers directly to achieve this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
UARTC is connected to the mini-pcie port.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The power gpio for the external memory card was specified wrongly.
Replace it with the correct value (tested with warmboot with fastboot).
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This PMC driver is enough to parse the nvidia,invert-interrupt property
from device tree, and configure the PMC's to honor that.
In the future, this file could expand to centralize all other PMC accesses
within the mach-tegra code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
It is not require to move the requestor of dma to INVALID
option before stopping dma.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit d91eeb0 "ARM: tegra: emc: device tree support" modified the EMC
driver to create an EMC table from existing register settings when none
was provided through platform data or device tree. This code wrote the
wrong clock rate into the table; the actual rate in Hz, rather than the
expected half-rate in KHz. This caused the BUG_ON in
tegra2_emc_clk_round_rate() to fire, since that enormous rate could not
be generated.
Fixes:
[ 2.425921] kernel BUG at arch/arm/mach-tegra/tegra2_clocks.c:1158!
...
[ 2.618766] [<c001c0e8>] (tegra2_emc_clk_round_rate+0x58/0x70) from [<c00198b4>] (clk_round_rate+0x48/0x68)
[ 2.628494] [<c00198b4>] (clk_round_rate+0x48/0x68) from [<c0019cc0>] (clk_set_rate_locked+0x40/0x68)
[ 2.637707] [<c0019cc0>] (clk_set_rate_locked+0x40/0x68) from [<c0019d10>] (clk_set_rate+0x28/0x40)
[ 2.646754] [<c0019d10>] (clk_set_rate+0x28/0x40) from [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144)
[ 2.656144] [<c001ffc8>] (tegra_update_cpu_speed+0x54/0x144) from [<c002016c>] (tegra_target+0xb4/0xe0)
[ 2.665538] [<c002016c>] (tegra_target+0xb4/0xe0) from [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4)
[ 2.674931] [<c01a96c0>] (__cpufreq_driver_target+0x88/0xa4) from [<c01ac9d0>] (dbs_check_cpu+0x324/0x340)
[ 2.684582] [<c01ac9d0>] (dbs_check_cpu+0x324/0x340) from [<c01aca40>] (do_dbs_timer+0x54/0xf4)
[ 2.693277] [<c01aca40>] (do_dbs_timer+0x54/0xf4) from [<c00369a8>] (process_one_work+0x1d4/0x320)
[ 2.702225] [<c00369a8>] (process_one_work+0x1d4/0x320) from [<c0036f34>] (worker_thread+0x134/0x230)
[ 2.711437] [<c0036f34>] (worker_thread+0x134/0x230) from [<c003add0>] (kthread+0x80/0x8c)
[ 2.719700] [<c003add0>] (kthread+0x80/0x8c) from [<c000ebf4>] (kernel_thread_exit+0x0/0x8)
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[olof: fixed calculation of printed values]
Signed-off-by: Olof Johansson <olof@lixom.net>
Enhance the driver to dynamically allocate the base IRQ number, and
create an IRQ domain for itself. The use of an IRQ domain ensures that
any device tree node interrupts properties are correctly parsed.
Describe interrupt-related properties in the device tree binding docs,
and the contents of "child" node interrupts property.
Update tegra*.dtsi to specify the required interrupt-related properties.
Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer
gives correct results since the IRQ numbers for GPIOs are dynamically
allocated.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
Replace compile-time usage of TEGRA_GPIO_TO_IRQ with run-time calls to
gpio_to_irq(). This will allow the base IRQ number for the Tegra GPIO
driver to be dynamically allocated in a later patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Olof Johansson <olof@lixom.net>
uncompress.h now saves the selected UART's physical address in Tegra's
IRAM, along with a cookie to indicate validity.
The first time it's run, macro addruart in debug-macro.S looks for this
cookie, and if it's present, uses the UART address stored there. If not,
the static value TEGRA_DEBUG_UART_BASE is used, as was previous behaviour.
The static behaviour will thus be used when not booting using a zImage.
This work was inspired by work by Doug Anderson <dianders@chromium.org>;
see http://lkml.org/lkml/2011/9/26/284. However, this patch relies on
the data passing describe above, rather than duplicating the UART
selection logic in debug-macro.S; the latest selection logic is more
complex due to the need to check reset/clock bits too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
With this change we automatically detect which UART to use for
for printing during decompression. The detection involves coordination
with the bootloader: it's expected that the bootloader will leave a
'D' (for [D]ebug) in the UART scratchpad register for whichever UART we
should use for debugging.
If we don't find any such UART, we fall back to the UART that was
specified during config time: CONFIG_TEGRA_DEBUG_UART_XXX.
As a side effect of this change, uncompress debug messages will work
if you've specified CONFIG_TEGRA_DEBUG_UART_NONE, provided the
bootloader obeys the protocol.
This change is in line with what is documented in
Documentation/arm/Booting.
Other approaches considered:
* Hardcode based on machine ID (as many other ARM boards do).
OK, but nice to not have yet another place to add per-board
code. Better to have bootloader parse device tree and pass us
this info.
* Check for TXE bit (like SA1110). Nice (and doesn't require
a bootloader change), but a little less explicit. Also: if
bootloader (for some reason) uses another UART, it needs to
remember to turn it off before jumping to the kernel or we may
print to it. NOTE: adapting this patch to check TXE too would
be easy if desired.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[swarren: Added clock/reset condition checks]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This will allow a future change to auto-detect which UART to use.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[swarren: Extracted from a larger patch by Doug]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This removes the need for the variable "shift" in all functions in
uncompress.h.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[swarren: Extracted from a larger patch by Doug]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
On Tegra20, the UART clock runs at 216MHz, whereas on Tegra30 it runs at
408MHz. Modify arch_decomp_setup() to detect Tegra20-vs-Tegra30 at run-
time, and program the correct divisor.
This makes uncompressor messages work correctly on Tegra30. This also
fixes early printk, assuming zImage is used and this setup code runs.
v2: Use CHIPID register to differentiate between chips, rather than a
GIC register. This should be more future-proof. Volatile is required
to prevent the compiler transforming the 32-bit apb_misc register read
into an 8-bit read of address 1 higher, since the HW only supports 32-
bit accesses, and will hang on an 8-bit access.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
In order to read an accurate channel transfer count
from the APB DMA engine, the DMA controller must be
paused first.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add device tree support to the emc driver, filling in the platform data
based on the DT bindings.
Changes since v1:
* Unmangled some messed up patch squashes, moving changes to earlier patches
* Flipped an of_property_read_u32 return value test
* Clarified clock settings message on case where no table is provided
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
This is the first step in making it device-tree aware and get rid of the
in-kernel EMC tables (of which there are none in mainline, thankfully).
Changes since v3:
* moved to devm_request_and_ioremap() in probe()
Changes since v2:
* D'oh -- missed a couple of variables that were added, never used and then
later removed in a later patch.
Changes since v1:
* Fixed messed up indentation
* Removed code that should be gone (was added here and removed later in series)
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Add function to get chip revision, and print it out at boot time.
Restructure the fuse access to just use cached variables instead
of always reading the fuses, and export those variables directly
instead of using accessor functions.
Add a SKU ID table of currently known values.
Based on code originally by Colin Cross <ccross@android.com>.
Changes since v1:
* Add A01 minor rev support
* Don't decode for A03p on anything but T2x
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tegra2 hangs if APB registers are accessed from the cpu during an
apb dma operation. The workaround is to use apb dma to read/write the
registers instead.
There is a dependency loop between fuses, clocks, and APBDMA. If dma
is enabled, fuse reads must go through APBDMA to avoid corruption due
to a hw bug. APBDMA requires a clock to be enabled. Clocks must read
a fuse to determine allowable cpu frequencies.
Separate out the fuse DMA initialization, and allow the fuse read
and write functions to be called without using DMA before the DMA
initialization has been completed. Access to the fuses before APBDMA
is initialized won't hit the hardware bug because nothing else can be
using DMA.
Original fuse registar access code from Varun Wadekar
<vwadekar@nvidia.com>, improved by Colin Cross <ccross@android.com>
and later moved to separate driver by Jon Mayo <jmayo@nvidia.com>.
Major refactoring/cleanup by Olof Johansson <olof@lixom.net>.
Changes since v1:
* fix 'return false' on error condition
* dequeue dma ops in case of timeout
From: Jon Mayo <jmayo@nvidia.com>.
Signed-off-by: Jon Mayo <jmayo@nvidia.com>.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Since we'll do opportunistic allocations before the dma subsystem is
enabled we want just silent failures and retries instead.
Signed-off-by: Olof Johansson <olof@lixom.net>
The power gpio for the external memory card was specified wrongly.
Replace it with the correct value (tested with warmboot with fastboot).
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
CPUidle driver for tegra. In this version only LP3 (clockgating) is supported.
Based on work by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Configure the flow controller for clockgating and enter WFI
Based on work by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Introduce some definitions for the tegra flow contoller. This will be
used by the code which controls entering and leaving LP3.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Initialize basic system clocks and provide a auxdata table to allow some
peripheral drivers to find their clocks.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add init calls for clocks on tegra30.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add basic tegra30 clock framework. Not all clocks are supported yet. Mainly
clocks requiring voltage scaling are not yet implemented in this version.
Based on work by Alex Frid <afrid@nvidia.com> and
Scott Williams <scwilliams@nvidia.com>.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for new clock framework features implemented in tegra30.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Tegra30 has 1 extra legacy interrupt controller. Use the GIC ITLinesNumber
field to determine how many interrupt controllers we have and initialize
appropriately. Also make room for the extra tegra30 interrupts by moving
the GPIO IRQ base. This shouldn't affect existing code as it determines the
correct IRQ number for GPIOs using TEGRA_GPIO_TO_IRQ().
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Allow marking some of GPIO pins as ignored to to avoid continuously
generating KBC input events.
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
There's no need to keep the DMA_REQ_SEL defines inside the ifdef.
Fixes the following build break with CONFIG_TEGRA_SYSTEM_DMA=n:
arch/arm/mach-tegra/devices.c:645: error: 'TEGRA_DMA_REQ_SEL_I2S_1' undeclared here (not in a function)
arch/arm/mach-tegra/devices.c:663: error: 'TEGRA_DMA_REQ_SEL_I2S2_1' undeclared here (not in a function)
arch/arm/mach-tegra/devices.c:663: error: initializer element is not constant
arch/arm/mach-tegra/devices.c:663: error: (near initialization for 'i2s_resource2[1].start')
arch/arm/mach-tegra/devices.c:664: error: initializer element is not constant
arch/arm/mach-tegra/devices.c:664: error: (near initialization for 'i2s_resource2[1].end')
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
Add support for Tegra30 by correcting definitions. This is necessary to
make driver useful in Tegra30.
Signed-off-by: Rakesh Iyer <riyer@nvidia.com>
Acked-by: Stephen Warren: <swarren@nvidia.com>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
When this is the only content remaining in mach/system.h then the
whole file is removed.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-and-tested-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: David Brown <davidb@codeaurora.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The crypto driver will need this api to use
it in the RNG calculations. In order to build
the crypto driver as a module, tegra_chip_uid
has to be exported.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Henning Heinold <heinold@inf.fu-berlin.de>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (526 commits)
ASoC: twl6040 - Add method to query optimum PDM_DL1 gain
ALSA: hda - Fix the lost power-setup of seconary pins after PM resume
ALSA: usb-audio: add Yamaha MOX6/MOX8 support
ALSA: virtuoso: add S/PDIF input support for all Xonars
ALSA: ice1724 - Support for ooAoo SQ210a
ALSA: ice1724 - Allow card info based on model only
ALSA: ice1724 - Create capture pcm only for ADC-enabled configurations
ALSA: hdspm - Provide unique driver id based on card serial
ASoC: Dynamically allocate the rtd device for a non-empty release()
ASoC: Fix recursive dependency due to select ATMEL_SSC in SND_ATMEL_SOC_SSC
ALSA: hda - Fix the detection of "Loopback Mixing" control for VIA codecs
ALSA: hda - Return the error from get_wcaps_type() for invalid NIDs
ALSA: hda - Use auto-parser for HP laptops with cx20459 codec
ALSA: asihpi - Fix potential Oops in snd_asihpi_cmode_info()
ALSA: hdsp - Fix potential Oops in snd_hdsp_info_pref_sync_ref()
ALSA: hda/cirrus - support for iMac12,2 model
ASoC: cx20442: add bias control over a platform provided regulator
ALSA: usb-audio - Avoid flood of frame-active debug messages
ALSA: snd-usb-us122l: Delete calls to preempt_disable
mfd: Put WM8994 into cache only mode when suspending
...
Fix up trivial conflicts in:
- arch/arm/mach-s3c64xx/mach-crag6410.c:
renamed speyside_wm8962 to tobermory, added littlemill right
next to it
- drivers/base/regmap/{regcache.c,regmap.c}:
duplicate diff that had already come in with other changes in
the regmap tree
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
PCI: Increase resource array mask bit size in pcim_iomap_regions()
PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
x86/PCI: amd: factor out MMCONFIG discovery
PCI: Enable ATS at the device state restore
PCI: msi: fix imbalanced refcount of msi irq sysfs objects
PCI: kconfig: English typo in pci/pcie/Kconfig
PCI/PM/Runtime: make PCI traces quieter
PCI: remove pci_create_bus()
xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
sparc/PCI: convert to pci_create_root_bus()
sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
powerpc/PCI: convert to pci_create_root_bus()
powerpc/PCI: split PHB part out of pcibios_map_io_space()
...
Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: (64 commits)
Input: tc3589x-keypad - add missing kerneldoc
Input: ucb1400-ts - switch to using dev_xxx() for diagnostic messages
Input: ucb1400_ts - convert to threaded IRQ
Input: ucb1400_ts - drop inline annotations
Input: usb1400_ts - add __devinit/__devexit section annotations
Input: ucb1400_ts - set driver owner
Input: ucb1400_ts - convert to use dev_pm_ops
Input: psmouse - make sure we do not use stale methods
Input: evdev - do not block waiting for an event if fd is nonblock
Input: evdev - if no events and non-block, return EAGAIN not 0
Input: evdev - only allow reading events if a full packet is present
Input: add driver for pixcir i2c touchscreens
Input: samsung-keypad - implement runtime power management support
Input: tegra-kbc - report wakeup key for some platforms
Input: tegra-kbc - add device tree bindings
Input: add driver for AUO In-Cell touchscreens using pixcir ICs
Input: mpu3050 - configure the sampling method
Input: mpu3050 - ensure we enable interrupts
Input: mpu3050 - add of_match table for device-tree probing
Input: sentelic - document the latest hardware
...
Fix up fairly trivial conflicts (device tree matching conflicting with
some independent cleanups) in drivers/input/keyboard/samsung-keypad.c
This adds and extends support for specific boards on a number of
ARM platforms: omap, imx, samsung, tegra, ...
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUATwtXvWCrR//JCVInAQKWjw/+IgL536c+ksAfIFLvQpDq0cV1J4xdGoqT
AdpK4bp3ze3c5HduweyZ6tKun9Shfg3/wuJH5ZwoJDzfRpF1DpALJDSZxRfll/y9
x7FbiVS8Kw+UJ02J1Z4jC4pguXtiUFGn9ebUI5V4wt5N8/xawFuWQ/6QybfmBSwP
ZvZa0sONEZwIPMMRO1/Q31z7jotBhcx9vYorUu4xyTx8yRK2DLD1eZENa107KuVA
0TQFreaGVvTgfLGTXy7wH41/VEKNj5qMOIBgpswLfQh85D0wXbZ98FsUt34t+r2D
9XUg8nkNUbmTQ/NokiVgqoju0UVNmjITIjQWFV/3qmhlQo5kO8tKJV+qmVMkw49b
VaazO/VpbY2+8ucHaTMKlnInUVwOOvlTRX8QJjOmyRWqYmk190jWYUtpsq9Xbt49
h/U9Grz+koFpDmAZTyscm3Zlub9U9YYvnjrA8UnbxpCeBpE2qy2+UIucnF1hTf7K
zn+kHvot4glubbRqLYhda3g+xomBf+xfvoGhFyutno2pBOm04Jd8E9ZQzkvxMnPn
w2S8Lo78KtKXVcbZbQDRW5UhaiRnu969P0gX2PcSSeTNn7FZF4FME1RB+CXbWazx
G4pfOfoso573m1UXjf/ueAdZU4H63WEMgULuXdzwmSlTZ97Lk5+sb+NHCPg5p4cA
6QHbmogFraA=
=lYb/
-----END PGP SIGNATURE-----
Merge tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Board-level changes
This adds and extends support for specific boards on a number of
ARM platforms: omap, imx, samsung, tegra, ...
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
Enable 32 bit flash support for iMX21ADS board
ARM: mx31pdk: Add MC13783 RTC support
iomux-mx25: configuration to support CSPI3 on CSI pins
MX1:apf9328: Add i2c support
mioa701: add newly available DoC G3 chip
arm/tegra: remove __initdata annotation from pinmux tables
arm/tegra: Use bus notifiers to trigger pinmux setup
arm/tegra: Refactor board-*-pinmux.c to share code
arm/tegra: Fix mistake in Trimslice's pinmux
arm/tegra: Rework Seaboard-vs-Ventana pinmux table
arm/tegra: Remove useless entries from ventana_pinmux[]
arm/tegra: PCIe: Remove include of mach/pinmux.h
arm/tegra: Harmony PCIe: Don't touch pinmux
arm/tegra: Add AUXDATA for tegra-pinmux and tegra-gpio
arm/tegra: Split Seaboard GPIO table to allow for Ventana
ARM: imx6q: generate imx6q dtb files
arm/imx6q: Rename Sabreauto to Armadillo2
arm/imx6q-sabrelite: add enet phy ksz9021rn fixup
arm/imx6: add imx6q sabrelite board support
dts/imx: rename uart labels to consistent with hw spec
...
This adds support for the new tegra30 SoC, as well as small
changes to support minor variations of existing omap SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUATwtVn2CrR//JCVInAQKJZBAAud0Ug5o0+PsOsyH4y8N4OYBQyfkB6aVh
5ClZkc83jMQRA+chjI/wFzYR+3BGz0nlzuVOe7r+YI8YQPAZjJgvMmgIAycfRdq9
bNKEqd6i08RMqx9S7vxWaUzK4WOCTvbl9yvpCNp9EkbbDi2xsBWbv6X75hRNWLJB
8uDlCCC9gfoo29kp+XjE0auqGlhUu8fPRHiviJlRUBYBeGuH03CZEHVn12joJMnK
zDh+gSb3EuxI8Hd2vHJ6bwt7DexEXaHdsbQwF4SdtRjt5mMmu/xY7rvMGdK3lFJz
/oR6OoKseJEJ+Tdx0OA6vXn+BOkIWEeHbMGfrpjnitATJCmXqeGk5vSSR7NDYmHC
4qtqQ6NwcIIBBLiYhksuHv2bIkIbaB94mCge3Yf0s8NSHGZJTozTIrB1gtO0v8AX
9cpBorIDbg9mIOiWCBR2wVgYOw6cCCUPAbF0JJ+/GMdkjetxITHjqEDzUYzlgPDD
T+63U1HSRJyYzgMXEfW4WbshXILuFJSrHzHpPLWBJuCH3xdlmnKV1g/6lvia7V2f
NMGwCvreWrOBa9FbGvtVamEoLFEyKCXZbFEvuN0kIJ6czCkcRq6EIsaXJL9s4iPk
27mwCpCJvfc8c+ocCsVcWl/fWHtCXmeMeotmzdLA7/L6YIx8YdvY8RpgAXDv9jA7
+dt4jW+tjEE=
=hp8k
-----END PGP SIGNATURE-----
Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
SoC-level changes for tegra and omap
This adds support for the new tegra30 SoC, as well as small
changes to support minor variations of existing omap SoCs.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OF
arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOC
arm/tegra: Delete tegra_init_clock()
arm/tegra: Fix section mismatch errors in tegra30 pinmux
arm/tegra: Fix section mismatch errors in tegra20 pinmux
arm/tegra: refresh defconfig for tegra30
arm/tegra: add support for tegra30 based board cardhu
arm/tegra: implement support for tegra30
arm/tegra: pinmux tables and definitions for tegra30
arm/tegra: add new fields to struct tegra_pingroup_desc
arm/tegra: prepare pinmux code for multiple tegra variants
arm/tegra: rename tegra20 pinmux files
arm/tegra: generalize L2 cache initialization
arm/tegra: use PMC reset
arm/tegra: rename board-dt.c to board-dt-tegra20.c
arm/tegra: prepare early init for multiple tegra variants
arm/tegra: don't export clk_measure_input_freq
arm/tegra: prepare clock code for multiple tegra variants
arm/tegra: cleanup tegra20 support
arm/tegra: clk_get should not be fatal
...
Fix up trivial conflict in arch/arm/mach-tegra/board-dt-tegra20.c
Conflicts:
arch/arm/mach-imx/mach-imx6q.c
arch/arm/mach-omap2/board-ti8168evm.c
arch/arm/mach-s3c64xx/Kconfig
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/board-dt-tegra20.c
arch/arm/mach-tegra/common.c
Lots of relatively simple conflicts between the board
changes and stuff from the arm tree. This pulls in
the resolution from the samsung/cleanup tree, so we
don't get conflicting merges.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* samsung/dt: (3 commit)
Merge branch 'depends/rmk/for-linus' into samsung/dt
Merge branch 'depends/rmk/restart' into next/cleanup
Merge branch 'next/cleanup' into samsung/dt
Conflicts:
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/include/mach/entry-macro.S
The latest version of the samsung/dt branch resolves
all sorts of conflicts with the latest upstream, no functional
changes that are not already there.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/mach-exynos/common.c
The common.c file gets changes from rmk/stable-devel (part of
next/cleanup), rmk/restart, samsung/dt and follow-on branches
from the samsung tree.
Pulling it all together here hopefully avoids having to do
even more conflicting merge changesets in this one file. What
a mess!
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/mach-at91/at91cap9.c
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-exynos/cpu.c
arch/arm/mach-shmobile/board-kota2.c
This resolves a bunch of conflicts between the arm-soc tree
and changes from the arm tree that have gone upstream.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
arch/arm/mach-tegra/board-harmony-pcie.c
To fix an internal merge conflict between the tegra/soc and tegra/boards
branches.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert from pci_scan_bus() to pci_scan_root_bus() and remove root bus
resource fixups. This fixes the problem of "early" and "header" quirks
seeing incorrect root bus resources.
CC: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Remove the now empty arch_reset() from all the mach/system.h includes,
and remove its callsite. Remove arm_machine_restart() as this function
no longer does anything useful.
For samsung platforms, remove the include of mach/system-reset.h and
plat/system-reset.h from their respective mach/system.h headers as these
just define their arch_reset functions. As a result, the s3c2410 and
plat-samsung system-reset.h files are no longer referenced, so remove
these files entirely.
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
