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Commit Graph

533427 Commits

Author SHA1 Message Date
Fabio Estevam
6be4b0da4e ARM: imx: mach-imx6ul: Fix allmodconfig build
We should call phy_register_fixup_for_uid() only when CONFIG_PHYLIB
is built-in, otherwise we get the following link error when building
allmodconfig:

arch/arm/mach-imx/built-in.o: In function `imx6ul_init_machine':
:(.init.text+0xa714): undefined reference to `phy_register_fixup_for_uid'

This is the same approach done in mach-imx6q.c and mach-imx6sx.c.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-21 09:37:38 -07:00
Olof Johansson
443d7920a5 Fix omap PM regression in Linux next and kill set_irq_flags usage
for GPMC.
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Merge tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Fix omap PM regression in Linux next and kill set_irq_flags usage
for GPMC.

* tag 'omap-for-v4.3/soc-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  memory: kill off set_irq_flags usage
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:33:09 -07:00
Olof Johansson
207b504a63 The i.MX SoC changes for 4.3:
- Add i.MX6 Ultralite SoC support, which is the newest addition to
    i.MX6 family.  It integrates a single Cortex-A7 core and a power
    management module that reduces the complexity of external power
    supply and simplifies power sequencing.
  - Change SNVS RTC driver to use syscon interface for register access,
    and add SNVS power key driver support.
  - Add a second clock for mxc rtc driver, and support device tree probe
    for the driver.
  - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
    platform.
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Merge tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc

The i.MX SoC changes for 4.3:
 - Add i.MX6 Ultralite SoC support, which is the newest addition to
   i.MX6 family.  It integrates a single Cortex-A7 core and a power
   management module that reduces the complexity of external power
   supply and simplifies power sequencing.
 - Change SNVS RTC driver to use syscon interface for register access,
   and add SNVS power key driver support.
 - Add a second clock for mxc rtc driver, and support device tree probe
   for the driver.
 - Add FEC MAC reference clock and phy fixup initialization for i.MX6UL
   platform.

* tag 'imx-soc-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  rtc: snvs: select option REGMAP_MMIO
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  input: snvs_pwrkey: use "wakeup-source" as deivce tree property name
  Document: devicetree: input: imx: i.mx snvs power device tree bindings
  input: keyboard: imx: add snvs power key driver
  Document: dt: fsl: snvs: change support syscon
  rtc: snvs: use syscon to access register
  ARM: imx: add low-level debug support for i.mx6ul
  ARM: imx: add i.mx6ul msl support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-18 13:10:05 -07:00
Stephen Rothwell
f9511a4fc4 clk: ti: fix for definition movement
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 13:03:40 +02:00
Olof Johansson
8943835e24 Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
 but not on other boards, like veyron-devices. Two problems seem
 to have existed. For one the stabilization delays for pmic and
 oscillator may have been to short and secondly the shallow
 suspend seems to need GPIO wakups enabled. Normally this should
 be covered by the more generic ARMINT wakeups already and
 the reason for this is still investigated at Rockchip, but
 meanwhile this makes boards actually resume.
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Merge tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc

Improve reliability of resume on rk3288 boards. For whatever
reason resuming from suspend worked sucessfully on the rk3288-evb
but not on other boards, like veyron-devices. Two problems seem
to have existed. For one the stabilization delays for pmic and
oscillator may have been to short and secondly the shallow
suspend seems to need GPIO wakups enabled. Normally this should
be covered by the more generic ARMINT wakeups already and
the reason for this is still investigated at Rockchip, but
meanwhile this makes boards actually resume.

* tag 'v4.3-rockchip32-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:13:54 +02:00
Masahiro Yamada
fb3c442676 ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
This is unnecessary since commit 02b4e2756e ("ARM: v7 setup
function should invalidate L1 cache").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-13 12:12:10 +02:00
Rob Herring
ed293d1ad2 memory: kill off set_irq_flags usage
set_irq_flags is ARM specific with custom flags which have genirq
equivalents. Convert drivers to use the genirq interfaces directly, so we
can kill off set_irq_flags. The translation of flags is as follows:

IRQF_VALID -> !IRQ_NOREQUEST
IRQF_PROBE -> !IRQ_NOPROBE
IRQF_NOAUTOEN -> IRQ_NOAUTOEN

For IRQs managed by an irqdomain, the irqdomain core code handles clearing
and setting IRQ_NOREQUEST already, so there is no need to do this in
.map() functions and we can simply remove the set_irq_flags calls. Some
users also set IRQ_NOPROBE and this has been maintained although it is not
clear that is really needed. There appears to be a great deal of blind
copy and paste of this code.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Roger Quadros <rogerq@ti.com>
Cc: linux-omap@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-13 00:48:52 -07:00
Shawn Guo
8a0fa18436 rtc: snvs: select option REGMAP_MMIO
Select REGMAP_MMIO to fix the following build error seen with x86_64
randconfig.

  drivers/built-in.o: In function `snvs_rtc_probe':
rtc-snvs.c:(.text+0x567730): undefined reference to `devm_regmap_init_mmio_clk'

Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Frank Li <Frank.Li@freescale.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2015-08-11 23:04:47 +08:00
Gregory Fong
b78bda5fd8 ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
Broadcom STB (BRCMSTB) has some 64-bit capable DMA and therefore needs
dma_addr_t to be a 64-bit size.  One user is the Broadcom SATA3 AHCI
controller driver.

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:18:29 +02:00
Gregory Fong
aeaeba1b6f ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
Commit 04fcab32d3 ("ARM: 8111/1: Enable
erratum 798181 for Broadcom Brahma-B15") enables this erratum for
affected Broadcom Brahma-B15 CPUs when CONFIG_ARM_ERRATA_798181=y.
Let's make sure that config option is actually set.

Signed-off-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-11 15:18:28 +02:00
Tony Lindgren
9610c8abd2 ARM: OMAP2+: Fix power domain operations regression caused by 81xx
I managed to mess up omap3 power domain operations with commit
7c80a3f89c ("ARM: OMAP2+: Add custom prwdm_operations for 81xx
to support dm814x"), by default we should keep on using the
omap3_pwrdm_operations, only 81xx needs custom handling.

This causes omap3 PM to break so we won't hit off mode any longer
causing idle power consumption go up from less than 10mW to over
50 mW.

Fixs: 7c80a3f89c ("ARM: OMAP2+: Add custom prwdm_operations for
81xx to support dm814x")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 22:09:40 -07:00
Heiko Stuebner
9bb91ae970 ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
PMU_GPIOINT_WAKEUP_EN seems needed when entering the shallow suspend
(with logic staying on) but does not seem to be needed for the deep
suspend for unknown reasons.
Testing revealed that this setting really is necessary to reliably
resume the veyron devices from suspend.

Reported-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:14 +02:00
Heiko Stuebner
d1d3a1a1d7 ARM: rockchip: set correct stabilization thresholds in suspend
Currently the stabilization thresholds for the oscillator and external pmu
are statically set to 30ms based on a 32kHz clock rate. This leaves out the
case when we don't switch to the 32kHz clock when only entering the shallow
suspend mode where the logic keeps running.

So, set the correct threshold after we have determined if we switch to the
32kHz clock or stay with the 24MHz one. Also set the oscillator-
stabilization to 0 if it is kept running during suspend, as it of course
does not need to stabilize then.

Reported-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:12 +02:00
Heiko Stuebner
41fe6a0172 ARM: rockchip: rename osc_switch_to_32k variable
The variable name is misleading, as the deep suspend mode always switches
the main supplying clock to the 32kHz source. Additionally the main
oscillator remains running in some cases, which this var indicates.

So rename it to osc_disable to clarity.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
2015-08-06 13:05:09 +02:00
Fugang Duan
709bc0657f ARM: imx6ul: add fec MAC refrence clock and phy fixup init
Add FEC MAC refrence clock init.
Add phy fixup init for i.MX6ul 14x14 evk board that installs KSZ8081 phy.
For the phy, there needs extra phy fixup for MII and RMII mode.

Signed-off-by: Fugang Duan <b38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:52:11 +08:00
Fugang Duan
9f55eb9244 ARM: imx6ul: add fec bits to GPR syscon definition
FEC requires additional bits to select refrence clock.

Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:52:07 +08:00
Philippe Reynes
cec13c26e9 rtc: mxc: add support of device tree
Add device tree support for the mxc rtc driver.

Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:03:56 +08:00
Philippe Reynes
6118637157 dt-binding: document the binding for mxc rtc
This adds documentation of device tree bindings for the
mxc rtc.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:03:51 +08:00
Philippe Reynes
8f5fe77828 rtc: mxc: use a second rtc clock
The mxc RTC needs two clocks, one for the input
reference, and one for the IP. But this driver
was only using one clock (for the reference).
This patch add the second clock (for the IP).

Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Philippe Reynes <tremyfr@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-05 20:03:46 +08:00
Sudeep Holla
3f86e570f2 ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
Commit 60f96b41f7 ("genirq: Add IRQCHIP_SKIP_SET_WAKE flag")
introduced a new flag to skip the irq_set_wake callback in the irqchip
core to avoid adding dummy irq_set_wake in the irqchip implementations.

This patch removes the dummy callback and sets the IRQCHIP_SKIP_SET_WAKE
flags.

Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 11:31:44 +02:00
Matthias Brugger
9dd068a4b8 soc: mediatek: Fix SCPSYS compilation
SCPSYS driver misses the module.h include which makes it fail
when compiling with allmodconf.

This patch fixes this.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 11:12:44 +02:00
Olof Johansson
f9fa55b970 mvebu soc changes for v4.3 (part #1)
- Extend suspend to RAM support in order to add new mvebu SoC
 - Add standby support for all Armada 3xx/XP SoCs
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Merge tag 'mvebu-soc-4.3-1' of git://git.infradead.org/linux-mvebu into next/soc

mvebu soc changes for v4.3 (part #1)

- Extend suspend to RAM support in order to add new mvebu SoC
- Add standby support for all Armada 3xx/XP SoCs

* tag 'mvebu-soc-4.3-1' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: Warn about the wake-up sources not taken into account in suspend
  ARM: mvebu: Add standby support
  ARM: mvebu: Use __init for the PM initialization functions
  ARM: mvebu: prepare pm-board.c for the introduction of Armada 38x support
  ARM: mvebu: prepare mvebu_pm_store_bootinfo() to support multiple SoCs
  ARM: mvebu: do not check machine in mvebu_pm_init()
  ARM: mvebu: prepare set_cpu_coherent() for future extension

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 11:09:02 +02:00
Olof Johansson
b69354dfe2 arm: Xilinx Zynq SoC patches for v4.2
- Fix earlyprintk, jump trampoline for SMP
 - Update git tree location
 - Setup PL310 aux (bit 22)
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Merge tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx into next/soc

arm: Xilinx Zynq SoC patches for v4.2

- Fix earlyprintk, jump trampoline for SMP
- Update git tree location
- Setup PL310 aux (bit 22)

* tag 'zynq-soc-for-4.3' of https://github.com/Xilinx/linux-xlnx:
  ARM: zynq: reserve space for jump target in secondary trampoline
  clk: zynq: remove redundant $(CONFIG_ARCH_ZYNQ) in Makefile
  MAINTAINERS: Update Zynq git tree location
  ARM: zynq: Set bit 22 in PL310 AuxCtrl register (6395/1)
  ARM: zynq: Fix earlyprintk in big endian mode

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 10:53:52 +02:00
Nicolas Ferre
c268a74310 ARM: at91/soc: add basic support for new sama5d2 SoC
Add Kconfig entries, header file changes and addition to the documentation.
The early debug infrastructure is also added for easy development.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-08-05 10:40:21 +02:00
Nathan Lynch
e4a9288942 ARM: zynq: reserve space for jump target in secondary trampoline
Add a zero argument to the .word directive in
zynq_secondary_trampoline.  Without an expression the assembler emits
nothing for the .word directive.

This makes it so that the intended range is communicated to ioremap
and outer_flush_range in zynq_cpun_start; e.g. for LE
trampoline_code_size evaluates to 12 now instead of 8.

Found by inspection.  I'm not aware of any real problem this fixes.
Tested by doing on online/offline loop on ZC702.

Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-31 10:24:41 +02:00
Masahiro Yamada
07e4d3d9e2 clk: zynq: remove redundant $(CONFIG_ARCH_ZYNQ) in Makefile
Kbuild descends into drivers/clk/zynq/ only when CONFIG_ARCH_ZYNQ
is enabled.  (see drivers/clk/Makefile)

$(CONFIG_ARCH_ZYNQ) in drivers/clk/zynq/Makefile always evaluates
to 'y'.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-31 10:24:40 +02:00
Soren Brinkmann
d6448b76ab MAINTAINERS: Update Zynq git tree location
The git tree for Zynq moved to Github. Update the MAINTAINERS record to
reflect the change.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-31 10:24:39 +02:00
Jun Nie
f15107f412 ARM: zx: Add power domains for ZX296702
Add power domains for ZX296702 to power off
inactive power domains in runtime.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
[olof: Marked zx296702_pd_driver as __initdata to avoid section mismatch]
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-30 14:36:36 +02:00
Olof Johansson
2eb084eb1f SoCFPGA updates for v4.3
- Add smp.ops.cpu_kill() for kexec
 - Add reboot capability for Arria10
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Merge tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc

SoCFPGA updates for v4.3
- Add smp.ops.cpu_kill() for kexec
- Add reboot capability for Arria10

* tag 'socfpga_updates_for_v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: add reset for the Arria 10 platform
  ARM: socfpga: add smp_ops.cpu_kill to make kexec/kdump available

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-28 18:26:14 +02:00
Olof Johansson
0c21bcb616 - ARM: mediatek: Add regmap to mediatek Kconfig
- soc: mediatek: Drop owner assignment from platform_driver
 - soc: Mediatek: Add SCPSYS power domain driver
 - dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
 - soc: mediatek: Add infracfg misc driver support
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Merge tag 'v4.2-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc

- ARM: mediatek: Add regmap to mediatek Kconfig
- soc: mediatek: Drop owner assignment from platform_driver
- soc: Mediatek: Add SCPSYS power domain driver
- dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
- soc: mediatek: Add infracfg misc driver support

* tag 'v4.2-next-soc' of https://github.com/mbgg/linux-mediatek:
  ARM: mediatek: Add regmap to mediatek Kconfig
  soc: mediatek: Drop owner assignment from platform_driver
  soc: Mediatek: Add SCPSYS power domain driver
  dt-bindings: soc: Add documentation for the MediaTek SCPSYS unit
  soc: mediatek: Add infracfg misc driver support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-28 18:17:31 +02:00
Gregory CLEMENT
482d638f98 ARM: mvebu: Warn about the wake-up sources not taken into account in suspend
On the Armada 370/XP/38x/39x SoCs when the suspend to ram feature is
supported, the SoCs are shutdown and will be woken up by an external
micro-controller, so there is no possibility to setup wake-up sources
from Linux. However, in standby mode, the SoCs stay powered and it is
possible to wake-up from any interrupt sources. Since when the users
configures the enabled wake-up sources there is no way to know if the
user will be doing suspend to RAM or standby, we just allow all
wake-up sources to be enabled, and only warn when entering suspend to
RAM

The purpose of this patch is to inform the user that in suspend to ram
mode, the wake-up sources won't be taken into consideration.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-28 11:40:47 +02:00
Masahiro Yamada
a3ff83d205 MAINTAINERS: add entries for UniPhier device trees and drivers
This clarifies the location of the files maintained by me.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:55:21 +02:00
Olof Johansson
a9a7f260e0 This is the pxa changes for v4.3 cycle.
There is mostly one evolution on the dma side, to enable cooperation
 of the legacy pxa DMA API, and the new dmaengine API.
 Once all drivers using DMA are converted, the legacy DMA API should
 be removed.
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Merge tag 'pxa-for-4.3-v2' of https://github.com/rjarzmik/linux into next/soc

This is the pxa changes for v4.3 cycle.

There is mostly one evolution on the dma side, to enable cooperation
of the legacy pxa DMA API, and the new dmaengine API.
Once all drivers using DMA are converted, the legacy DMA API should
be removed.

* tag 'pxa-for-4.3-v2' of https://github.com/rjarzmik/linux:
  ARM: pxa: Use setup_timer
  ARM: pxa: Use module_platform_driver
  ARM: pxa: transition to dmaengine phase 1

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:49:24 +02:00
Olof Johansson
d7018b1558 SoC changes for omaps for v4.3 merge window:
- Clean-up omap4_local_timer_init to drop deal legacy code
 
 - Provide proper IO map table for dra7
 
 - Clean-up IOMMU layer init code as it now uses IOMMU framework
 
 - A series of changes to fix up dm814x support that's been in a broken
   half-merged state for quite some time
 
 - A series of PRCM and hwmod changes via Paul Walmsley <paul@pwsan.com>:
 
   - I/O wakeup support for AM43xx
   - register lock and unlock support to the hwmod code (needed for the RTC
     IP blocks on some chips)
   - several fixes for sparse warnings and an unnecessary null pointer test
   - a DRA7xx clockdomain configuration workaround, to deal with some hardware
     bugs
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Merge tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.3 merge window:

- Clean-up omap4_local_timer_init to drop deal legacy code

- Provide proper IO map table for dra7

- Clean-up IOMMU layer init code as it now uses IOMMU framework

- A series of changes to fix up dm814x support that's been in a broken
  half-merged state for quite some time

- A series of PRCM and hwmod changes via Paul Walmsley <paul@pwsan.com>:

  - I/O wakeup support for AM43xx
  - register lock and unlock support to the hwmod code (needed for the RTC
    IP blocks on some chips)
  - several fixes for sparse warnings and an unnecessary null pointer test
  - a DRA7xx clockdomain configuration workaround, to deal with some hardware
    bugs

* tag 'omap-for-v4.3/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
  ARM: OMAP2: Add minimal dm814x hwmod support
  ARM: OMAP2+: Prepare dm81xx hwmod code for adding minimal dm814x support
  ARM: PRM: AM437x: Enable IO wakeup feature
  ARM: OMAP4+: PRM: Add AM437x specific data
  ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets
  ARM: dts: AM4372: Add PRCM IRQ entry
  ARM: AM43xx: Add the PRM IRQ register offsets
  ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
  ARM: OMAP2+: Add support for initializing dm814x clocks
  ARM: OMAP2+: Add custom prwdm_operations for 81xx to support dm814x
  ARM: OMAP2+: Add minimal clockdomains for dm814x
  ARM: OMAP2+: Fix scm compatible for dm814x
  ARM: OMAP2+: Fix dm814x DT_MACHINE_START
  ARM: OMAP2+: Remove module references from IOMMU machine layer
  ARM: DRA7: Provide proper IO map table
  ARM: OMAP2+: Clean up omap4_local_timer_init
  ARM: OMAP2: Delete an unnecessary check
  ARM: OMAP2+: sparse: add missing function declarations
  ARM: OMAP2+: sparse: add missing static declaration
  ARM: OMAP2+: hwmod: add support for lock and unlock hooks
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:36:53 +02:00
Olof Johansson
c3d3dbddd3 Renesas ARM Based SoC Updates for v4.3
* Add basic support for gose/r8a7793
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Merge tag 'renesas-soc-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Renesas ARM Based SoC Updates for v4.3

* Add basic support for gose/r8a7793

* tag 'renesas-soc-for-v4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: gose: enable R-Car Gen2 regulator quirk
  ARM: shmobile: Basic r8a7793 SoC support

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:33:56 +02:00
Olof Johansson
7bd1584bd5 STi SoC updates for v4.3, round 1.
Highlights:
 -----------
  - Add code to release secondary cores from holding pen.
  - Remove useless call to trace_hardirqs_off() in secondary core init function.
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Merge tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/soc

STi SoC updates for v4.3, round 1.

Highlights:
-----------
 - Add code to release secondary cores from holding pen.
 - Remove useless call to trace_hardirqs_off() in secondary core init function.

* tag 'sti-soc-for-v4.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti:
  ARM: STi: Remove platform call to trace_hardirqs_off()
  ARM: STi: Add code to release secondary cores from holding pen.

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-27 14:25:23 +02:00
Gregory CLEMENT
3cbd6a6ca8 ARM: mvebu: Add standby support
Until now only one Armada XP and one Armada 388 based board supported
suspend to ram. However, most of the recent mvebu SoCs can support the
standby mode. Unlike for the suspend to ram, nothing special has to be
done for these SoCs. This patch allows the system to use the standby
mode on Armada 370, 38x, 39x and XP SoCs. There are issues with the
Armada 375, and the support might be added (if possible) in a future
patch.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-25 17:17:05 +02:00
Gregory CLEMENT
bb253e743a ARM: mvebu: Use __init for the PM initialization functions
mvebu_pm_init and mvebu_armada_pm_init are only called during boot, so
flag them with __init and save some memory.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2015-07-25 17:16:57 +02:00
Thomas Petazzoni
32f9494c9d ARM: mvebu: prepare pm-board.c for the introduction of Armada 38x support
The pm-board.c code contains the board-specific logic to enter suspend
to RAM. Until now, the code supported only the Armada XP GP board, so
all functions and symbols were named with armada_xp_gp. However, it
turns out that the Armada 388 GP also uses the same 3 GPIOs protocol
to talk to the PIC microcontroller that controls the power supply.

Since we are going to re-use the same code with no change for Armada
38x, this commit renames the functions and symbols to use just
"armada" instead of "armada_xp_gp". Better names can be found if one
day other boards having a different protocol/mechanism are supported
in the kernel.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-25 17:16:54 +02:00
Thomas Petazzoni
88ed69f2a1 ARM: mvebu: prepare mvebu_pm_store_bootinfo() to support multiple SoCs
As we are going to introduce support for Armada 38x in pm.c, split out
the Armada XP part of mvebu_pm_store_bootinfo() into
mvebu_pm_store_armadaxp_bootinfo(), and make the former retunr an
error when an unsupported SoC is used.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-25 17:16:51 +02:00
Thomas Petazzoni
a101b53d3a ARM: mvebu: do not check machine in mvebu_pm_init()
The mvebu_pm_init() initializes the support for suspend/resume, and
before doing that, it checks if we are on a board on which
suspend/resume is actually supported. However, this check is already
done by mvebu_armada_xp_gp_pm_init(), and there is no need to
duplicate the check: callers of mvebu_pm_init() should now what they
are doing.

This commit is done in preparation to the addition of suspend/resume
support on Armada 38x.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-25 17:16:47 +02:00
Nadav Haklai
01049a5deb ARM: mvebu: prepare set_cpu_coherent() for future extension
This patch prepares the set_cpu_coherent() function in coherency.c to
be extended to support other SoCs than Armada XP. It will be needed on
Armada 38x to re-enable the coherency after exiting from suspend to
RAM.

This preparation simply moves the function further down in coherency.c
so that it can use coherency_type(), and uses that function to only do
the Armada XP specific work if we are on Armada XP.

Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
2015-07-25 17:16:41 +02:00
Tony Lindgren
24da741c67 Merge branch 'dm814x-soc' into omap-for-v4.3/soc
Update dm814x changes for sparse fixes to make data structures
static.

Conflicts:
	arch/arm/mach-omap2/omap_hwmod_81xx_data.c
2015-07-23 21:59:18 -07:00
Tony Lindgren
0f3ccb24c0 ARM: OMAP2: Add minimal dm814x hwmod support
Let's add minimal set of dm814x hwmods to have a bootable system.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-23 21:39:00 -07:00
Tony Lindgren
7e1b11d145 ARM: OMAP2+: Prepare dm81xx hwmod code for adding minimal dm814x support
Let's change the defines so we can share the hwmod code better between
dm816x and dm814x, and let's add the dm814x specific defines. And let's
rename the shared ones to start with dm81xx. No functional changes.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-23 21:39:00 -07:00
Tony Lindgren
97d9a3d096 ARM: OMAP2+: PRCM and hwmod changes for v4.3
This series adds:
 
 - I/O wakeup support for AM43xx
 - register lock and unlock support to the hwmod code (needed for the RTC
   IP blocks on some chips)
 - several fixes for sparse warnings and an unnecessary null pointer test
 - a DRA7xx clockdomain configuration workaround, to deal with some hardware
   bugs
 
 Basic build, boot, and PM tests are here:
 
 http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/
 
 Since I do not have an AM43xx or DRA7xx device, I can't test on those
 platforms.
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Merge tag 'for-v4.3/omap-hwmod-prcm-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.3/soc

ARM: OMAP2+: PRCM and hwmod changes for v4.3

This series adds:

- I/O wakeup support for AM43xx
- register lock and unlock support to the hwmod code (needed for the RTC
  IP blocks on some chips)
- several fixes for sparse warnings and an unnecessary null pointer test
- a DRA7xx clockdomain configuration workaround, to deal with some hardware
  bugs

Basic build, boot, and PM tests are here:

http://www.pwsan.com/omap/testlogs/hwmod-prcm-for-v4.3/20150723080012/

Since I do not have an AM43xx or DRA7xx device, I can't test on those
platforms.
2015-07-23 21:14:02 -07:00
Matthias Brugger
3e0452d27a ARM: mediatek: Add regmap to mediatek Kconfig
Mediatek SoC needs the regmap/syscon infrastructure.
The infrastructure is used by the clock and pinctrl driver.
This patch adds MD_SYSCON to Kconfig for all Mediatek devices.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-23 20:01:42 +02:00
Paul Walmsley
3b86616e30 Merge branch 'prcm-a-for-v4.3' into hwmod-prcm-for-v4.3 2015-07-23 08:49:57 -06:00
Keerthy
8740a1444e ARM: PRM: AM437x: Enable IO wakeup feature
Enable IO wakeup feature. This enables am437x pads to generate daisy
chained wake ups(eventually generates aprcm Interrupt) especially
when in low power modes.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-23 06:13:52 -06:00
Keerthy
cc843711fd ARM: OMAP4+: PRM: Add AM437x specific data
The register offsets for some of the PRM Registers are different
hence populating the differing fields. This is needed to support
IO wake up feature for am437x family.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-23 06:08:24 -06:00