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Commit Graph

3 Commits

Author SHA1 Message Date
Niklas Cassel
b58ddf1747 PCI: artpec6: Drop __init from artpec6_add_pcie_port()
artpec6_add_pcie_port() is called from artpec6_pcie_probe(), which is not
marked __init.  It is wrong to call an __init function from a non-__init
one, so remove __init from artpec6_add_pcie_port().

[bhelgaas: changelog]
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-09-14 16:20:47 -05:00
Paul Gortmaker
58bdaa1d38 PCI: artpec6: Make explicitly non-modular
This code is not being built as a module by anyone:

  drivers/pci/host/Kconfig:config PCIE_ARTPEC6
  drivers/pci/host/Kconfig:       bool "Axis ARTPEC-6 PCIe controller"

Remove uses of MODULE_DESCRIPTION(), MODULE_AUTHOR(), MODULE_LICENSE(),
etc., so that when reading the driver there is no doubt it is builtin-only.
The information is preserved in comments at the top of the file.

Replace module_platform_driver() with builtin_platform_driver(), which uses
the same init level priority, so init ordering is unchanged.

Note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

[bhelgaas: changelog, add "Author" comment]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Niklas Cassel <niklas.cassel@axis.com>
CC: Jesper Nilsson <jesper.nilsson@axis.com>
2016-08-01 12:22:50 -05:00
Niklas Cassel
a3cbfae1f7 PCI: artpec: Add Axis ARTPEC-6 PCIe controller driver
The Axis ARTPEC-6 SoC integrates a PCIe controller from Synopsys.  Add a
new driver that provides the small glue needed to use the existing
DesignWare driver to make it work on the Axis ARTPEC-6 SoC.

[bhelgaas: return errors directly without gotos, fold in section mismatch
fix]
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2016-06-11 13:56:20 -05:00