The control registers are unsigned long (32 bits on i386, 64 bits on
x86-64), and so make that manifest in the data type for the various
constants. Add defines with a _BIT suffix which defines the bit
number, as opposed to the bit mask.
This should resolve some issues with ~bitmask that Linus discovered.
Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-cwckhbrib2aux1qbteaebij0@git.kernel.org
Bit 1 in the x86 EFLAGS is always set. Name the macro something that
actually tries to explain what it is all about, rather than being a
tautology.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Gleb Natapov <gleb@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Link: http://lkml.kernel.org/n/tip-f10rx5vjjm6tfnt8o1wseb3v@git.kernel.org
There is some confusion about the 'mce_poll_banks' and 'mce_banks_owned'
per-cpu bitmaps. Provide comments so that we all know exactly what these
are used for, and why.
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Tony Luck <tony.luck@intel.com>
From Srinivas Kandagatla <srinivas.kandagatla@st.com>:
This patch-set adds basic support for STMicroelectronics STi series SOCs
which includes STiH415 and STiH416 with B2000 and B2020 board support.
STiH415 and STiH416 are dual-core ARM Cortex-A9 CPU, designed for
use in Set-top-boxes. The SOC support is available in mach-sti which
contains support code for STiH415, STiH416 SOCs including the generic
board support.
The reason for adding two SOCs at this patch set is to show that no new
C code is required for second SOC(STiH416) support.
* sti/soc:
ARM: stih41x: Add B2020 board support
ARM: stih41x: Add B2000 board support
ARM: sti: Add DEBUG_LL console support
ARM: sti: Add STiH416 SOC support
ARM: sti: Add STiH415 SOC support
Signed-off-by: Olof Johansson <olof@lixom.net>
From Daniel Tang <dt.tangr@gmail.com>
This is the initial platform code for the TI-Nspire graphing
calculators. The platform support is rather unspectacular, but still
contains platform data for the LCD panel, which will get removed once
there is a DT binding for the AMBA CLCD driver.
* nspire/soc:
arm: Add Initial TI-Nspire support
arm: Add device trees for TI-Nspire hardware
Signed-off-by: Olof Johansson <olof@lixom.net>
B2020 ADI board is reference board for STIH415/416 SOCs, it has 2 x
UART, 4x USB, 1 x Ethernet, 1 x SATA, 1 x PCIe, and 2GB RAM with
standard set-top box IPs.
This patch adds initial support to B2020 with STiH415/416 with SBC_UART1
as console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
B2000 board is reference board for STIH415/416 SOCs, it has
2 x UART, 4x USB, 2 x Ethernet, 1 x SATA, 1 x PCIe, and 1GB RAM.
This patch add initial support to b2000 with STiH415/416 with UART2 as
console and a heard beat LED.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds low level debug uart support to sti based SOCs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
The STiH416 is advanced HD AVC processor with 3D graphics acceleration
and 1.2-GHz ARM Cortex-A9 SMP CPU.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
On one sytem that mtrr range is more then 44bits, in dmesg we have
[ 0.000000] MTRR default type: write-back
[ 0.000000] MTRR fixed ranges enabled:
[ 0.000000] 00000-9FFFF write-back
[ 0.000000] A0000-BFFFF uncachable
[ 0.000000] C0000-DFFFF write-through
[ 0.000000] E0000-FFFFF write-protect
[ 0.000000] MTRR variable ranges enabled:
[ 0.000000] 0 [000080000000-0000FFFFFFFF] mask 3FFF80000000 uncachable
[ 0.000000] 1 [380000000000-38FFFFFFFFFF] mask 3F0000000000 uncachable
[ 0.000000] 2 [000099000000-000099FFFFFF] mask 3FFFFF000000 write-through
[ 0.000000] 3 [00009A000000-00009AFFFFFF] mask 3FFFFF000000 write-through
[ 0.000000] 4 [381FFA000000-381FFBFFFFFF] mask 3FFFFE000000 write-through
[ 0.000000] 5 [381FFC000000-381FFC0FFFFF] mask 3FFFFFF00000 write-through
[ 0.000000] 6 [0000AD000000-0000ADFFFFFF] mask 3FFFFF000000 write-through
[ 0.000000] 7 [0000BD000000-0000BDFFFFFF] mask 3FFFFF000000 write-through
[ 0.000000] 8 disabled
[ 0.000000] 9 disabled
but /proc/mtrr report wrong:
reg00: base=0x080000000 ( 2048MB), size= 2048MB, count=1: uncachable
reg01: base=0x80000000000 (8388608MB), size=1048576MB, count=1: uncachable
reg02: base=0x099000000 ( 2448MB), size= 16MB, count=1: write-through
reg03: base=0x09a000000 ( 2464MB), size= 16MB, count=1: write-through
reg04: base=0x81ffa000000 (8519584MB), size= 32MB, count=1: write-through
reg05: base=0x81ffc000000 (8519616MB), size= 1MB, count=1: write-through
reg06: base=0x0ad000000 ( 2768MB), size= 16MB, count=1: write-through
reg07: base=0x0bd000000 ( 3024MB), size= 16MB, count=1: write-through
reg08: base=0x09b000000 ( 2480MB), size= 16MB, count=1: write-combining
so bit 44 and bit 45 get cut off.
We have problems in arch/x86/kernel/cpu/mtrr/generic.c::generic_get_mtrr().
1. for base, we miss cast base_lo to 64bit before shifting.
Fix that by adding u64 casting.
2. for size, it only can handle 44 bits aka 32bits + page_shift
Fix that with 64bit mask instead of 32bit mask_lo, then range could be
more than 44bits.
At the same time, we need to update size_or_mask for old cpus that does
support cpuid 0x80000008 to get phys_addr. Need to set high 32bits
to all 1s, otherwise will not get correct size for them.
Also fix mtrr_add_page: it should check base and (base + size - 1)
instead of base and size, as base and size could be small but
base + size could bigger enough to be out of boundary. We can
use boot_cpu_data.x86_phys_bits directly to avoid size_or_mask.
So When are we going to have size more than 44bits? that is 16TiB.
after patch we have right ouput:
reg00: base=0x080000000 ( 2048MB), size= 2048MB, count=1: uncachable
reg01: base=0x380000000000 (58720256MB), size=1048576MB, count=1: uncachable
reg02: base=0x099000000 ( 2448MB), size= 16MB, count=1: write-through
reg03: base=0x09a000000 ( 2464MB), size= 16MB, count=1: write-through
reg04: base=0x381ffa000000 (58851232MB), size= 32MB, count=1: write-through
reg05: base=0x381ffc000000 (58851264MB), size= 1MB, count=1: write-through
reg06: base=0x0ad000000 ( 2768MB), size= 16MB, count=1: write-through
reg07: base=0x0bd000000 ( 3024MB), size= 16MB, count=1: write-through
reg08: base=0x09b000000 ( 2480MB), size= 16MB, count=1: write-combining
-v2: simply checking in mtrr_add_page according to hpa.
[ hpa: This probably wants to go into -stable only after having sat in
mainline for a bit. It is not a regression. ]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Link: http://lkml.kernel.org/r/1371162815-29931-1-git-send-email-yinghai@kernel.org
Cc: <stable@vger.kernel.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Pull s390 fixes from Martin Schwidefsky:
"A couple of last-minute fixes: a build regression for !SMP, a recent
memory detection patch caused kdump to break, a regression in regard
to sscanf vs reboot from FCP, and two fixes in the DMA mapping code
for PCI"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux:
s390/ipl: Fix FCP WWPN and LUN format strings for read
s390/mem_detect: fix memory hole handling
s390/dma: support debug_dma_mapping_error
s390/dma: fix mapping_error detection
s390/irq: Only define synchronize_irq() on SMP
Pull powerpc bugfix from Ben Herrenschmidt:
"This is a fix for a regression causing a freescale "83xx" based
platforms to crash on boot due to some PCI breakage"
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/pci: Fix boot panic on mpc83xx (regression)
tegra_pmc_parse_dt() references __initconst data. Fix it to be __init.
This matches its only usage; a call from tegra_pmc_init() which is
already __init. This fixes:
WARNING: vmlinux.o(.text.unlikely+0x580): Section mismatch in reference
from the function tegra_pmc_parse_dt() to the (unknown reference)
.init.rodata:(unknown)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
- add pinctrl support for exynos5420
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwcGBAAoJEA0Cl+kVi2xqrwEQAILUD5hNqsBIt9ddPQPpgBMf
ZPpKSCRLGlQ944HMHS7Yu0qCuT19iXtVXYT9sEcyRLY5/GujfeQt5XfaX8Cd5yNS
3ydDQuDBRZ5ffnzP1eTvxV8Q+A4RQMPk+yqOLad4JJ+5FORoqNcxnibJtSvc9Qgn
J179aOwZ7DdtoODgVG5/tczf97lOHcscSYFt0PmJxVuWeZxU+Ya9BdizuFWChNEX
I6VfYNprcYdbsz3UuW6vQsCs/sDZ1kTX4iA5GcfcpnGgfCjEbq9GXPI29F/tqV0F
+7qz5pwS0uDoLcbGClUGsGFwBuz0TQEsg15gSvG9h15B87Ur+k4ZjA9Lhfo+mpX+
VmT7m/rbsFDyuzts3aIEyTEc1W5f3w0Mw2qd216GxtaJfto89Qji6w+kj2GDU1zx
NU7f/s35htJ4YGwgIPQmZTSrmPsFpN8O2AHxrKDh7YNRfL3uoaPA7YudI4ZSuBXT
ICM9vJTc1Ju6TWnjiuHtGngwkns6P7KWepia0s5KqfH4G/hissJ3BeK6DcVeKR6E
zVVFGW4umqVQDFRQaM6rkqmUrFddGmdL9ibvjJVuoAb3RFLApHoocv+QtLbgHAj5
aiozoHEKTcgmpKzUwa3PIRe75CiO9mUUlOws6DEz1gtOnWUga76+u4Wz7QoOr9Ao
E5MjB62BUGeZVt5cG1Z4
=Dvn4
-----END PGP SIGNATURE-----
Merge tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late
From Kukjin Kim, this adds pinctrl support for Exynos 5420.
* tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
pinctrl: exynos: add exynos5420 SoC specific data
ARM: dts: add pinctrl support to EXYNOS5420
Signed-off-by: Olof Johansson <olof@lixom.net>
Use irq_get_trigger_type() to get the IRQ trigger type flags
instead calling irqd_get_trigger_type(irq_desc_get_irq_data(irq))
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: David Daney <david.daney@cavium.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-7-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Use irq_get_trigger_type() to get the IRQ trigger type flags
instead calling irqd_get_trigger_type(irq_get_irq_data(irq))
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-6-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The following commit caused a fatal oops when booting on mpc83xx with
a non-express PCI bus (regardless of whether a PCI device is present):
commit 50d8f87d2b
Author: Rojhalat Ibrahim <imr@rtschenk.de>
Date: Mon Apr 8 10:15:28 2013 +0200
powerpc/fsl-pci Make PCIe hotplug work with Freescale PCIe controllers
Up to now the PCIe link status on Freescale PCIe controllers was only
checked once at boot time. So hotplug did not work. With this patch the
link status is checked on every config read. PCIe devices not present at
boot time are found after doing 'echo 1 >/sys/bus/pci/rescan'.
Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This patch fixes the issue by calling setup_indirect_pci for all device types.
fsl_indirect_read_config is now only used for booke/86xx PCIe controllers.
Reported-by: Michael Guntsche <mike@it-loops.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Move the existing clock code in mach-msm to the common clock
framework. We lose our capability to set the rate of and enable a
clock through debugfs. This is ok though because the debugfs
features are mainly used for testing and development of new clock
code.
To maintain compatibility with the original MSM clock code we
make a wrapper for clk_reset() that calls the struct msm_clk
specific reset function. This is necessary for the usb and sdcc
devices on MSM until a better suited API is made available.
Cc: Saravana Kannan <skannan@codeaurora.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
To move closer to the generic struct clock framework move the
proc_comm based clock code to a platform driver. The data
describing the struct clks still live in the devices-$ARCH file,
but the clock initialization is done at driver binding time.
Cc: Saravana Kannan <skannan@codeaurora.org>
Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
In the near future we'll be moving clock-pcom to a platform
driver, in which case these two users of clk_get() in mach-msm
need to be updated. Have board-trout-panel.c make the proc_comm
call directly so that we don't have to port this board specific
code to the driver right now and reorder the initcall order of
dma.c so that it initializes after the clock driver probes but
before any drivers use dma APIs.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This file is not used outside of the two users in the clock-7x30
array. Those two clocks are virtual "source" clocks that don't
really need to exist outside of the clock driver. Let's remove
them from the array, since they're not doing anything anyway, and
then remove the clock-7x30.h include file along with it.
Cc: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
There are no users of this API anymore so let's just remove it.
If a need arises in the future we can extend the common clock API
to handle it.
Acked-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Nobody is using this API upstream and it's just contributing
cruft. Remove it so the MSM clock API is closer to the generic
struct clock API.
Acked-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
--------------------------------------
This pull request adds DT and runtime PM to
EDMA ARM private API so it can be used on
DT enabled DaVinci and OMAP platforms.
Also adds DMA channel crossbar mapping
support to be used by DT-enabled platforms
which use it.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRyFgNAAoJEGFBu2jqvgRNKuEP/0qZpKwS9dlNu25+hQYG6P8K
QhWs7/1t6flWCUpGxx06RMDbMdLndALEaJay/L2/2kZr3LRZ+o/PB/yzPqcPIA0W
+3w86mPSbnmVob10u4mwcdMOk2pV6cKIBA0D4Q2Kkkr/UrkrpkFkEkBEDePJaTcP
e3u6jzOU8XCtsYz7DRV6w/YxJ926f572KQ5PNlwB4o7zOk4QAhuKvV3RbmbQxSLu
hqprR2Vi+xnifA2QDPWFCGI7eneCmR9HgMhrrmwCXYdHRk7mVA6O6n3O8J+wTKT+
fFfzVkZ688EKUg18WAzGFrzzS/NA3qIkPmHPdKFp4dwRxyXDD6m/wiPkUpjSMcQr
N9XtZkNPDj7j9DMony8nSkEj7S0Qf68GekGR7XSPbE2pVvJhdYGxgnWx52KXgM09
3zVY4ZTL6z+F4mI4rY390YO5ttGsNmitnFvv1vgct6ZcDlIFnEo9pZm94LCtG99D
9ZWpxZZPXpejY1IgnfX1AA5ab2ifbRe4UDJVurqOrlyR4SUUoDuob17qBh8iUYSI
LzJe6qksUTYgWH6j8XzeGH5+lF1hBjltvArsh2UtBhn96KRdw1XnEuJZBtsKilng
0SxuQDKR3aELGIOJ+8oImO9pojkLzY4+2eCXhJXLNGv6BCv/vWleHNpT4IlvYIZa
QPbK1I5Y5oEwBePUnUfw
=h9EO
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori:
DaVinci SoC updates for v3.11 - part 2
This pull request adds DT and runtime PM to
EDMA ARM private API so it can be used on
DT enabled DaVinci and OMAP platforms.
Also adds DMA channel crossbar mapping
support to be used by DT-enabled platforms
which use it.
* tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
dmaengine: edma: enable build for AM33XX
ARM: edma: Add EDMA crossbar event mux support
ARM: edma: Add DT and runtime PM support to the private EDMA API
dmaengine: edma: Add TI EDMA device tree binding
ARM: edma: Convert to devm_* api
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm26 support in Linux is long gone, yet it left an interresting,
fossilized trace in the decompressor.
Remove it so people won't get confused about what teqp is actually
doing here...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Looking into the active_asids array is not enough, as we also need
to look into the reserved_asids array (they both represent processes
that are currently running).
Also, not holding the ASID allocator lock is racy, as another CPU
could schedule that process and trigger a rollover, making the erratum
workaround miss an IPI.
Exposing this outside of context.c is a little ugly on the side, so
let's define a new entry point that the erratum workaround can call
to obtain the cpumask.
Cc: <stable@vger.kernel.org> # 3.9
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On a CPU that never ran anything, both the active and reserved ASID
fields are set to zero. In this case the ASID_TO_IDX() macro will
return -1, which is not a very useful value to index a bitmap.
Instead of trying to offset the ASID so that ASID #1 is actually
bit 0 in the asid_map bitmap, just always ignore bit 0 and start
the search from bit 1. This makes the code a bit more readable,
and without risk of OoB access.
Cc: <stable@vger.kernel.org> # 3.9
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When a CPU is running a process, the ASID for that process is
held in a per-CPU variable (the "active ASIDs" array). When
the ASID allocator handles a rollover, it copies the active
ASIDs into a "reserved ASIDs" array to ensure that a process
currently running on another CPU will continue to run unaffected.
The active array is zero-ed to indicate that a rollover occurred.
Because of this mechanism, a reserved ASID is only remembered for
a single rollover. A subsequent rollover will completely refill
the reserved ASIDs array.
In a severely oversubscribed environment where a CPU can be
prevented from running for extended periods of time (think virtual
machines), the above has a horrible side effect:
[P{a} denotes process P running with ASID a]
CPU-0 CPU-1
A{x} [active = <x 0>]
[suspended] runs B{y} [active = <x y>]
[rollover:
active = <0 0>
reserved = <x y>]
runs B{y} [active = <0 y>
reserved = <x y>]
[rollover:
active = <0 0>
reserved = <0 y>]
runs C{x} [active = <0 x>]
[resumes]
runs A{x}
At that stage, both A and C have the same ASID, with deadly
consequences.
The fix is to preserve reserved ASIDs across rollovers if
the CPU doesn't have an active ASID when the rollover occurs.
Cc: <stable@vger.kernel.org> # 3.9
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Catalin Carinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When booting fewer cores than are physically present on a versatile
platform (e.g. when passing maxcpus=N on the command line), some
secondary cores may remain in the holding pen, which is marked __INIT,
as each CPU's gic cpumask is initialised to 0xff, and thus an IPI to any
CPU will wake up *all* secondaries. This behaviour is crucial to the GIC
cpumask self-discovery. Late in the boot process, the memory comprising
the holding pen will be released to the kernel for more general use, and
may be overwritten with arbitrary data, which can cause the held
secondaries to start behaving unpredictably. This can lead to all manner
of odd behaviour from the kernel.
As preventing cpus from entering the pen would require invasive changes
to the GIC driver and to existing dts used in the wild, we instead
remove the __INIT marker from the pen, keeping it around and leaving the
unused secondary CPUs dormant.
Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/175039.html
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Pawel Moll <pawel.moll@arm.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Because of inline asm usage in platsmp.c, smc instruction
creates build failure for ARM V6+V7 build where as using instruction
encoding for smc breaks the thumb2 build.
So move the code snippet to separate asm file and mark
it with 'armv7-a$(plus_sec)' to avoid any build issues.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
With this change, we no longer lose the innermost entry in the user-mode
part of the call chain. See also the x86 port, which includes the ip.
It's possible to partially work around this problem by post-processing
the data to use the PERF_SAMPLE_IP value, but this works only if the CPU
wasn't in the kernel when the sample was taken.
Cc: <stable@vger.kernel.org>
Signed-off-by: Jed Davis <jld@mozilla.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since commit 6a1c53124a the user writeable TLS register was zeroed to
prevent it from being used as a covert channel between two tasks.
There are more and more applications coming to Windows RT,
Wine could support them, but mostly they expect to have
the thread environment block (TEB) in TPIDRURW.
This patch preserves that register per thread instead of clearing it.
Unlike the TPIDRURO, which is already switched, the TPIDRURW
can be updated from userspace so needs careful treatment in the case that we
modify TPIDRURW and call fork(). To avoid this we must always read
TPIDRURW in copy_thread.
Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
With the new default platform code, we can always boot using DT
without requiring a board file, but we cannot build a kernel
unless we select at least one CPU core, which breaks some
"randconfig" builds.
This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we
always default to a common CPU core if no platform was enabled
that picks something else. The default we pick for ARMv4T is
ARM920T, while for ARMv5 we pick ARM926T.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is required for building a kernel that enables only
IMX6SL but not IMX6Q, which would get a build error when
syscon is not available.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Selecting this symbol causes a build warning without SMP:
warning: (ARCH_KEYSTONE) selects ARM_ERRATA_798181 which has unmet direct dependencies (CPU_V7 && SMP)
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This is required for building a kernel that enables only
scb9328 and would not get the i.MX1 specific files
otherwise.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Sascha Hauer <kernel@pengutronix.de>
If AM43x and SMP is selected, OMAP4 & OMAP5 deselected, build error as
follows,
arch/arm/mach-omap2/built-in.o: In function `scu_gp_set':
arch/arm/mach-omap2/sleep44xx.S:131: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:132: undefined reference to `scu_power_mode'
arch/arm/mach-omap2/built-in.o: In function `scu_gp_clear':
arch/arm/mach-omap2/sleep44xx.S:227: undefined reference to `omap4_get_scu_base'
arch/arm/mach-omap2/sleep44xx.S:229: undefined reference to `scu_power_mode'
Resolve it by building sleep44xx.S only for OMAP4 & OMAP5.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The HAVE_PWM symbol is only for legacy platforms that provide
the PWM API without using the generic framework. MXS actually
uses that framework, and selecting the symbol anyway might
cause build errors like
drivers/built-in.o: In function `pwm_beeper_resume':
:(.text+0x1f4fc0): undefined reference to `pwm_config'
:(.text+0x1f4fc8): undefined reference to `pwm_enable'
drivers/built-in.o: In function `pwm_beeper_suspend':
:(.text+0x1f4ffc): undefined reference to `pwm_disable'
when CONFIG_PWM is disabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
When building a kernel without CONFIG_PM, we get a link
error from referencing mxs_pm_init in the machine
descriptor. This defines a macro to NULL for that case.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
This commit fixes the regression on Armada 370 (the kernal hang during
boot) introduced by the commit: "ARM: 7691/1: mm: kill unused
TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead".
When coming out of either a Wait for Interrupt (WFI) or a Wait for
Event (WFE) IDLE states, a specific timing sensitivity exists between
the retiring WFI/WFE instructions and the newly issued subsequent
instructions. This sensitivity can result in a CPU hang scenario. The
workaround is to insert either a Data Synchronization Barrier (DSB) or
Data Memory Barrier (DMB) command immediately after the WFI/WFE
instruction.
This commit was based on the work of Lior Amsalem, but heavily
modified to apply the errata fix dynamically according to the
processor type thanks to the suggestions of Russell King and Nicolas
Pitre.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Willy Tarreau <w@1wt.eu>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 1bc3974 (ARM: 7755/1: handle user space mapped pages in
flush_kernel_dcache_page) moved the implementation of
flush_kernel_dcache_page() into mm/flush.c but did not implement it
on noMMU ARM.
Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Cc: <stable@vger.kernel.org> # 3.2+: 1bc3974: ARM: 7755/1
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The __cpu_logical_map array is statically initialized to 0, which is a valid
MPIDR value. To prevent issues with the current implementation, this patch
defines an MPIDR_INVALID value, and statically initializes the
__cpu_logical_map[] array to it. Entries in the arm_dt_init_cpu_maps()
tmp_map array used to stash DT reg properties while parsing DT are initialized
with the MPIDR_INVALID value as well for consistency.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The introduction of the cpu-map topology node in the cpus node implies
that cpus node might have children that are not cpu nodes. The DT
parsing code needs updating otherwise it would check for cpu nodes
properties in nodes that are not required to contain them, resulting
in warnings that have no bearing on bindings defined in the dts source file.
Cc: <stable@vger.kernel.org> [3.8+]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As it was already suggested by Russell King and Arnd Bergmann:
https://lkml.org/lkml/2013/5/16/133
moxart and gemini seem to be the only platforms using CPU_FA526,
and instead of pointing arm_pm_idle to an empty function from
platform code, it makes sense to remove WFI code from the processor
specific idle function.
Applies to arm-soc/for-next (and 3.10-rc1).
Changes since v1:
1. remove WFI but make sure cpu_fa526_do_idle do not fall through
to cpu_fa526_dcache_clean_area
Note: moxart boots and prints to UART without this patch, but input is broken.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Enable TI EDMA option on OMAP and TI_PRIV_EDMA
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The following git commit changed the behavior of sscanf:
commit 53809751ac
Author: Jan Beulich <JBeulich@suse.com>
Date: Mon Dec 17 16:01:31 2012 -0800
sscanf: don't ignore field widths for numeric conversions
This broke the WWPN and LUN sysfs attributes for s390 reipl and dump
on panic.
Example:
$ echo 0x0123456701234567 > /sys/firmware/reipl/fcp/wwpn
$ cat /sys/firmware/reipl/fcp/wwpn
0x0001234567012345
So fix this and use format strings that work also with the
new sscanf implementation:
$ echo 0x012345670123456789 > /sys/firmware/reipl/fcp/wwpn
$ cat /sys/firmware/reipl/fcp/wwpn
0x0123456701234567
Cc: stable@vger.kernel.org # 3.8+
Reviewed-by: Steffen Maier <maier@linux.vnet.ibm.com>
Signed-off-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
EDMA supports a cross bar which provides ability
to mux additional events into physical channels
present in the channel controller.
This is required when the number of events present
in the system are more than number of available
physical channels.
Changes by Joel:
* Split EDMA xbar support out of original EDMA DT parsing patch
to keep it easier for review.
* Rewrite shift and offset calculation.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Suggested by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: fix checkpatch errors and a minor coding improvement]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Adds support for parsing the TI EDMA DT data into the required EDMA
private API platform data. Enables runtime PM support to initialize
the EDMA hwmod. Enables build on OMAP.
Changes by Joel:
* Setup default one-to-one mapping for queue_priority and queue_tc
mapping as discussed in [1].
* Split out xbar stuff to separate patch. [1]
* Dropped unused DT helper to convert to array
* Fixed dangling pointer issue with Sekhar's changes
[1] https://patchwork.kernel.org/patch/2226761/
Signed-off-by: Matt Porter <mporter@ti.com>
[nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce
edma_setup_info_from_dt() as part of that effort]
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The length of the registers area for the Marvell 370/XP Ethernet controller
was incorrect in the .dtsi: 0x2500, while it should have been 0x4000.
This problem wasn't noticed because there used to be a static mapping for
all the MMIO register region set up by ->map_io().
The register length was fixed in all the other device tree files,
except from the armada-xp-mv78260.dtsi, in the following commit:
commit cf8088c5ca
Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Date: Tue May 21 12:33:27 2013 +0200
arm: mvebu: fix length of Ethernet registers area in .dtsi
This commit fixes a kernel panic in mvneta_probe(), when the kernel
tries to access the unmapped registers:
[ 163.639092] mvneta d0070000.ethernet eth0: mac: 6e:3c:4f:87:17:2e
[ 163.646962] mvneta d0074000.ethernet eth1: mac: 6a:04:4e:6f:f5:ef
[ 163.654853] mvneta d0030000.ethernet eth2: mac: 2a:99:19:19:fc:4c
[ 163.661258] Unable to handle kernel paging request at virtual address f011bcf0
[ 163.668523] pgd = c0004000
[ 163.671237] [f011bcf0] *pgd=2f006811, *pte=00000000, *ppte=00000000
[ 163.677565] Internal error: Oops: 807 [#1] SMP ARM
[ 163.682370] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc6-01850-gba0682e #11
[ 163.690046] task: ef04c000 ti: ef03e000 task.ti: ef03e000
[ 163.695467] PC is at mvneta_probe+0x34c/0xabc
[...]
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch has been invaluable in my adventures finding
issues in the perf NMI handler. I'm as big a fan of
printk() as anybody is, but using printk() in NMIs is
deadly when they're happening frequently.
Even hacking in trace_printk() ended up eating enough
CPU to throw off some of the measurements I was making.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This patch keeps track of how long perf's NMI handler is taking,
and also calculates how many samples perf can take a second. If
the sample length times the expected max number of samples
exceeds a configurable threshold, it drops the sample rate.
This way, we don't have a runaway sampling process eating up the
CPU.
This patch can tend to drop the sample rate down to level where
perf doesn't work very well. *BUT* the alternative is that my
system hangs because it spends all of its time handling NMIs.
I'll take a busted performance tool over an entire system that's
busted and undebuggable any day.
BTW, my suspicion is that there's still an underlying bug here.
Using the HPET instead of the TSC is definitely a contributing
factor, but I suspect there are some other things going on.
But, I can't go dig down on a bug like that with my machine
hanging all the time.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
[ Prettified it a bit. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
I have a system which is causing all kinds of problems. It has
8 NUMA nodes, and lots of cores that can fight over cachelines.
If things are not working _perfectly_, then NMIs can take longer
than expected.
If we get too many of them backed up to each other, we can
easily end up in a situation where we are doing nothing *but*
running NMIs. The biggest problem, though, is that this happens
_silently_. You might be lucky to get an hrtimer warning, but
most of the time system simply hangs.
This patch should at least give us some warning before we fall
off the cliff. the warnings look like this:
nmi_handle: perf_event_nmi_handler() took: 26095071 ns
The message is triggered whenever we notice the longest NMI
we've seen to date. You can always view and reset this value
via the debugfs interface if you like.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: paulus@samba.org
Cc: acme@ghostprotocols.net
Cc: Dave Hansen <dave@sr71.net>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
In case CONFIG_X86_MCE_THRESHOLD and CONFIG_X86_THERMAL_VECTOR
are disabled, kernel build fails as follows.
arch/x86/built-in.o: In function `trace_threshold_interrupt':
(.entry.text+0x122b): undefined reference to `smp_trace_threshold_interrupt'
arch/x86/built-in.o: In function `trace_thermal_interrupt':
(.entry.text+0x132b): undefined reference to `smp_trace_thermal_interrupt'
In this case, trace_threshold_interrupt/trace_thermal_interrupt
are not needed to define.
So, add config option checking to their definitions in entry_64.S.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Cc: rostedt@goodmis.org
Link: http://lkml.kernel.org/r/51C58B8A.2080808@hds.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
These are two fixes that came in this week, one for a regression we
introduced in 3.10 in the GIC interrupt code, and the other one
fixes a typo in newly introduced code.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUcR9uWCrR//JCVInAQJPOQ/7BQfqxNbQn+DkHK3I3HBYDzFgaVr4Up9N
JXgQnjrSjdGL0B0IaBaCTx95wv7DW9vsQk0sz6Hb38OFYpI5vn/77am35AEAmOtX
0OpFsTWM6iPiJMW0js4xWtDMDICNaFpnUWHMmO3dKMQJztvyHnzhsoWfWqlIZImV
ml2HLeCYnFfM6vYUwTV5AHyCXMa4n7ODyIMouptCPlzIdPyTROUCBbP3obREW3AO
RTnoOXsZnPkIrAySPtuCflGaUCKQzorvHQiQd+ye3KBbpgwwMHyl8SDKZws6Aes1
f4P539YnuIrm7Sh418MOsKx7/Vo4c+8GxONKSX4fduX6bSlkAba7zBQUcS2FGF8C
RzVeF4lfBCv3F/QcnDWzI0qMvbUgvYXbMH9HUv5BiNed412oUXAaPbZ7/3TpLSq+
nsip8SY+HTo10e+k2dunBgSYk6EyP6aGoNEgS3STOlO5PAQVoy7urK7CjwLUmBrM
IYaX/lmNWJjoWqMJtLYBVvr/n59420WO2VkmBh6OM/jKVE/ZO323AsIorGmlNmoY
p2jtQ2q/x7rJ7PVlDgqUf18siiqyada4RwmvapmZkQwbMYppX4GPbF0KjylQO+g5
9EH1xH9NK5GOr6JxqyMoDyl0EPOtfveie0xKPhnNVxmi6cgnmlu04HymYO9V5c7K
1A47eYCn1pc=
=+4ED
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"These are two fixes that came in this week, one for a regression we
introduced in 3.10 in the GIC interrupt code, and the other one fixes
a typo in newly introduced code"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
irqchip: gic: call gic_cpu_init() as well in CPU_STARTING_FROZEN case
ARM: dts: Correct the base address of pinctrl_3 on Exynos5250
Pull vfs fixes from Al Viro:
"Several fixes for bugs caught while looking through f_pos (ab)users"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
aout32 coredump compat fix
splice: don't pass the address of ->f_pos to methods
mconsole: we'd better initialize pos before passing it to vfs_read()...
As load_current_idt() is now what is used to update the IDT for the
switches needed for NMI, lockdep debug, and for tracing, it must not
call local_irq_save(). This is because one of the users of this is
lockdep, which does tracing of local_irq_save() and when the debug
trap is hit, we need to update the IDT before tracing interrupts
being disabled. As load_current_idt() is used to do this, calling
local_irq_save() which lockdep traces, defeats the point of calling
load_current_idt().
As interrupts are already disabled when used by lockdep and NMI, the
only other user is tracing that can disable interrupts itself. Simply
have the tracing update disable interrupts before calling load_current_idt()
instead of breaking the other users.
Here's the dump that happened:
------------[ cut here ]------------
WARNING: at /work/autotest/nobackup/linux-test.git/kernel/fork.c:1196 copy_process+0x2c3/0x1398()
DEBUG_LOCKS_WARN_ON(!p->hardirqs_enabled)
Modules linked in:
CPU: 1 PID: 4570 Comm: gdm-simple-gree Not tainted 3.10.0-rc3-test+ #5
Hardware name: /DG965MQ, BIOS MQ96510J.86A.0372.2006.0605.1717 06/05/2006
ffffffff81d2a7a5 ffff88006ed13d50 ffffffff8192822b ffff88006ed13d90
ffffffff81035f25 ffff8800721c6000 ffff88006ed13da0 0000000001200011
0000000000000000 ffff88006ed5e000 ffff8800721c6000 ffff88006ed13df0
Call Trace:
[<ffffffff8192822b>] dump_stack+0x19/0x1b
[<ffffffff81035f25>] warn_slowpath_common+0x67/0x80
[<ffffffff81035fe1>] warn_slowpath_fmt+0x46/0x48
[<ffffffff812bfc5d>] ? __raw_spin_lock_init+0x31/0x52
[<ffffffff810341f7>] copy_process+0x2c3/0x1398
[<ffffffff8103539d>] do_fork+0xa8/0x260
[<ffffffff810ca7b1>] ? trace_preempt_on+0x2a/0x2f
[<ffffffff812afb3e>] ? trace_hardirqs_on_thunk+0x3a/0x3f
[<ffffffff81937fe7>] ? sysret_check+0x1b/0x56
[<ffffffff81937fe7>] ? sysret_check+0x1b/0x56
[<ffffffff810355cf>] SyS_clone+0x16/0x18
[<ffffffff81938369>] stub_clone+0x69/0x90
[<ffffffff81937fc2>] ? system_call_fastpath+0x16/0x1b
---[ end trace 8b157a9d20ca1aa2 ]---
in fork.c:
#ifdef CONFIG_PROVE_LOCKING
DEBUG_LOCKS_WARN_ON(!p->hardirqs_enabled); <-- bug here
DEBUG_LOCKS_WARN_ON(!p->softirqs_enabled);
#endif
Cc: Seiji Aguchi <seiji.aguchi@hds.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
dump_seek() does SEEK_CUR, not SEEK_SET; native binfmt_aout
handles it correctly (seeks by PAGE_SIZE - sizeof(struct user),
getting the current position to PAGE_SIZE), compat one seeks
by PAGE_SIZE and ends up at PAGE_SIZE + already written...
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
This patch adds support for the TI-Nspire platform.
Changes between v1 and v2:
* Added GENERIC_IRQ_CHIP to platform Kconfig
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds device trees for describing the TI-Nspire hardware.
Changes between v1 and v2:
* Change "keymap" binding to the standard "linux,keymap" binding.
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This series removes the hardcoded register base address for mvebu.
For round 2:
- multiplatform
- fix booting on anything other than mvebu
Depends (none new for round 2):
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)
iQEcBAABAgAGBQJRxICoAAoJEAi3KVZQDZAeOK8H/0k4YVpRqGlOvJ4iyeO0YTx/
n0Mz+piw6Ra5U+EiaAZ0sDNO9eceDj88mZza0xEm2bfYCy2Lr2UA0TDCG/3V2WPM
ye8Avr9PyCVAGgS9SuNH9oBIxFa5nVOsPje/qsZDEKsU9LrbjCXBudtRTyiH+E8K
rfLi822eXS1Ckh2rpYL0XxIho2630vduAZpCecaRvvjXFqWRBfoR3N9k2LOgJC3l
SSmBQs7H+C7QYh1iZwemMixh2W+Ck0qiGttfIrEYeKuWpo9+5hyLvvqLZVpjA67D
kyYnyJ/OPMP4W4DoATtiGgKsCTj3IMPiC/yMCgFMocl5gUXuLqf//d3g2Uc/3UY=
=SY7t
-----END PGP SIGNATURE-----
Merge tag 'regmap-3.11-2' of git://git.infradead.org/users/jcooper/linux into next/soc
From Jason Cooper:
mvebu register map changes for v3.11 (round 2)
This series removes the hardcoded register base address for mvebu.
For round 2:
- multiplatform
- fix booting on anything other than mvebu
Depends (none new for round 2):
- mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1)
- mvebu/cleanup (up to tags/cleanup-3.11-3)
* tag 'regmap-3.11-2' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: fix coherency_late_init() for multiplatform
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pull x86 fixes from Peter Anvin:
"This series fixes a couple of build failures, and fixes MTRR cleanup
and memory setup on very specific memory maps.
Finally, it fixes triggering backtraces on all CPUs, which was
inadvertently disabled on x86."
* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/efi: Fix dummy variable buffer allocation
x86: Fix trigger_all_cpu_backtrace() implementation
x86: Fix section mismatch on load_ucode_ap
x86: fix build error and kconfig for ia32_emulation and binfmt
range: Do not add new blank slot with add_range_with_merge
x86, mtrr: Fix original mtrr range get for mtrr_cleanup
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRwc4AAAoJEBvWZb6bTYbyT/wQAIAvvjM+jlqOsZCUjnutdWXf
VGvJB1jXPEa6cuUkaE3RYO8rLLJz/PC4Geg8I/awtjeSkPvldeu0FihSkdbrNkpJ
3dSAJ0cR8+ScUZB74Lt1pfwwEAdZk61MU1opD1qy3wWTy5Rk2xp4qzE2aCVJoLkh
K8gscLrCHR47DELcm+AWCtHt/0VOZSAVe9z/7Qf9eAMCNmH/efHgrZZTxF/1aBkI
7XaZdqT+d84D/Bc2isdRNvFYt9rkuII2GCeRciw2t3QsgVoBXn7FVK2OXbufIaYW
/XX0YiNpSnUpcpOtGw2MwzpKgDSRE9QbnOUVsWThTDeG7Q5d72ioCFuRDba8p3Lc
u146nQM495bAdJQz6IW3JCeiZlQ86/QjFquk9hJuCwQpuHmlRpVEqFbLVnZEnYvk
lc9dnK7BcaftbMgo/j6DMv6Bpq/EDp1JrPXzNT4BwG7ptArEXzmdoktwpONjrZzI
1oZV5xCcNhTjyqlndiZKxneKXoqz/3NOdR+EV0yh3+0l4PK6C52jd6PaKRv7qN3l
Lt35uFrmKqzOR12KVStYREyh1Sy43ADE4tIIPnOBbcXz23Df4/vVSb1Bqv0nPq4i
JhsRsGoR8ZdDBd7c40XlvpxOiMmubFLSklX0WaKn2yIZH9FMj63Ak0wet7qhaqb8
lbJRUH8gnK0RCVEoUFpB
=yGPS
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"Three one-line fixes for my first pull request; one for x86 host, one
for x86 guest, one for PPC"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
x86: kvmclock: zero initialize pvclock shared memory area
kvm/ppc/booke: Delay kvmppc_lazy_ee_enable
KVM: x86: remove vcpu's CPL check in host-invoked XCR set
Pull crypto fix from Herbert Xu:
"This fixes an unaligned crash in XTS mode when using aseni_intel"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: aesni_intel - fix accessing of unaligned memory
Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x4000000. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more accurately, we declare the
real 1 MiB internal register space in the ranges, and add a translation
entry for the nand node to access the 'nand' window.
This commit will make future improvements on the MBus DT binding easier.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The following commit:
commit 7e348b9012
Author: Robert Lee <rob.lee@linaro.org>
Date: Tue Mar 20 15:22:43 2012 -0500
ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
introduced an additional zero to the state1 (suspend) target residency.
With a periodic tick, the cpu never enters the state1 with both 10000 and
100000.
With a tickless system, it enters to state1 much more often with the
initial value, roughly x7 more.
Fix it by setting the value to 10ms again.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[nicola.ferre@atmel.com: add precisions given by Daniel to commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf
ARM: at91: add AIC5 support
we allocate the at91_extern_irq.
This patch makes it static and stores the non-dt extern irq in the soc
structure. It is then possible to use a at91_get_extern_irq() function
to get the value for outside of the irq driver. It is useful for passing
its value to at91_aic_init().
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: rework commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Compiling without CONFIG_X86_LOCAL_APIC set, apic.c will not be
compiled, and the irq tracepoints will not be created via the
CREATE_TRACE_POINTS macro. When CONFIG_X86_LOCAL_APIC is not set,
we get the following build error:
LD init/built-in.o
arch/x86/built-in.o: In function `trace_x86_platform_ipi_entry':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:66: undefined reference to `__tracepoint_x86_platform_ipi_entry'
arch/x86/built-in.o: In function `trace_x86_platform_ipi_exit':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:66: undefined reference to `__tracepoint_x86_platform_ipi_exit'
arch/x86/built-in.o: In function `trace_irq_work_entry':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:72: undefined reference to `__tracepoint_irq_work_entry'
arch/x86/built-in.o: In function `trace_irq_work_exit':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:72: undefined reference to `__tracepoint_irq_work_exit'
arch/x86/built-in.o:(__jump_table+0x8): undefined reference to `__tracepoint_x86_platform_ipi_entry'
arch/x86/built-in.o:(__jump_table+0x14): undefined reference to `__tracepoint_x86_platform_ipi_exit'
arch/x86/built-in.o:(__jump_table+0x20): undefined reference to `__tracepoint_irq_work_entry'
arch/x86/built-in.o:(__jump_table+0x2c): undefined reference to `__tracepoint_irq_work_exit'
make[1]: *** [vmlinux] Error 1
make: *** [sub-make] Error 2
As irq.c is always compiled for x86, it is a more appropriate location
to create the irq tracepoints.
Cc: Seiji Aguchi <seiji.aguchi@hds.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
From Christian Daudt:
* 'armsoc/for-3.11/cleanups' of git://github.com/broadcom/bcm11351:
ARM: bcm281xx: Remove init_irq declaration in machine description
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Christian Daudt:
* 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351:
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: dts: bcm281xx: use existing defines for irqs
ARM: dts: bcm281xx: use #include for device tree files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwvf8AAoJENfPZGlqN0++fYkQAI/gPqZtrTvelEaGYkRRTpzC
EBnVGatTBZM8AC3LVLM8UXWmZ0wYmS36e106K3QEelwmO6r0A/phaNG9zBHbe7um
Bp8LZQoRyFqYuklBe3x8u+FvBM2f+NVmZFHQv/MTbuxLjcZe9o+JoXjFmHxOdTU3
9FXrdq5nJ0tFi+T/Td+zfJTXyHQTB8TQpt2ZiBcD0+hDC+t5ztTxdjFAQmWCsuCs
M4MHSBxbUODUW7EIKX0EzOmJF0UQpDxNDSY4PvWt+y6M34Jv3W+xNSucgXBeBO9B
jSIG2Opiiq4CW49Gp5fkNBPFqTgga8xk0ZSDFEQAiffmmQvPZGxeepspJqsVCTvS
1bbpya88S3Mjl0KXb/j+CrPCsd4ZgjcczRI79W/7LNZOq61ryH31Fg6R7RfOBFNU
lOnu/PV8LRFHZG9H7hXEFKWvqIov3UXLNIQTsSEUa5awOxmmrJSIGroPhEN3bTM2
8wsiASxUsx3nWc/BK/iGwWq5VUNv397Nfc/+nb7I5DuBsdy1NFSUt2kOwxuJG4Jl
vtYpyx45lLLJ3OwpWNewKcQCwXTPkaJvNrVkEI0Qb2o7otOmQq+xafIxop9pIaex
pXzxAfXADXZUcJ4zMzMeS3t9eimIDoFimTlLSr1juLI/wJNVFBcbqe+HTWZk5fVO
sJm8q/vbfgOAaDDXClvJ
=cg7n
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Extended hardware coverage for the Bock-W board
by Goda-san and Morimoto-san
* Correction to Ether device name for the Bock-W board
from Sergei Shtylyov
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwazgAAoJENfPZGlqN0++JggP/1E3cHhSGHVRIdTFjtTMh+j2
mHpgNuFWF40ONuKNI2DgVsRWpPOIMu1c/GrAs36PaZqnfzVbyGpPkvqxsV62jEV6
oTWqHKCDCZ11/XEoqZgcMN2pmer5T/Kt8WYbIUBrl7ygJcfk2hglTPpIr/Y1m6fT
/brVsX0OZjCeQs7MLggf0SPwNviRHb8/68MadY+Zd7qvSzPdTc19fA9m8kAd1y1q
PXRP3d/IZECF7nPBCNtdCs8KuMqA4+GAZwRw+Ubl6J97X0uHGLKcaCQxpX8YVEHd
odYvEEZDDzvBPnxksuPH7cJ0uRNjMCRCGrMv2cuZXcYcMHzW9liZdjQCGxZk7amp
QyX9PArKiURKjF2eoNLuYUjruOBwRib3X1RgiRyi2UWQYZOgphYbBWoD+DheIRQG
V5EMmr+Z2itwNMbrpCh/OauZMSkRqJk4H3j899wNtb10k+zh0BJtc/YF3ACiqfj8
qeyADaF1FZaV6w3S55CM7PWJuGEa8BCdL7F0FFXbexbnYL0X5pxI8a8ZMwWGpG/e
V8/d1znpcxvoDROO/auJLQX7+2SugH3wSdWsG5UQa6D5VZJj4+mK14DdIVmWFurY
t0tzvSJoJ++d5mya/8P/KCSREGtcMNJWvSeW9AUwTI4tlI+4t3NDJKm1g2sL+fxE
tV2UydtHUD2NGPVrC17x
=93dZ
-----END PGP SIGNATURE-----
Merge tag 'renesas-boards2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Second Round of Renesas ARM-based SoC board updates for v3.11
* Extended hardware coverage for the Bock-W board
by Goda-san and Morimoto-san
* Correction to Ether device name for the Bock-W board
from Sergei Shtylyov
* tag 'renesas-boards2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: BOCK-W: change Ether device name
ARM: shmobile: bockw: add MMCIF support
ARM: shmobile: bockw: add SPI FLASH support
ARM: shmobile: bockw: add I2C device support
ARM: shmobile: BOCK-W: add Ether support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- add support for exynos5420 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwLDWAAoJEA0Cl+kVi2xqTAwP/iSe9eYS4OeNmmURH4hmeD+Q
OTADXGs/CWzTeHBAXbJx/KUDtdRqvUDg38hwNZnuSTkyj8LLeGbqFn637mtVHZb0
i3NuGDv5W1WcBrqplmrGPOGyKfb0eNxPNCdK0g6w6eapHRmH/iNgbBE6ybEbAVyF
RjWIOb+zcLfVW6w8VVPVFKhVo9yh0JPJxT7evc0tjWrTHstljDQDDLmx1owAQWna
jKNL0S34fkDRJVGF1ehPhv33RFPkUljU0zSEKCyixg6RaU0/YAMnf6YooFS9xP1a
YFgIZsoIqNQJv2rj/TgWn8MA0HhESYORTw/UEB1q3TvxM3GMxrF/W0o2tcIyawVb
W94TnzQHDVyPIdm6rAgUbosZdRp0WxIg65st+w/A+uWySDn2V3+UE0ZBFLIMZsFu
oHJh4vZFDBX8E2SkypkJo3oEZTBN7pTFsLzo1+0H76BMGz34fXtYFnMRDOWKvudQ
88tKJduZyuedZqvaLckdaLrJA1iLCM2x+lXkxlvy3FMn8EAmRoKdV1fefqpqpDCC
iGgGzBWIVvRm2xUQ3SkW0cIny8S1lh1vwln9F2Vl/ZyoGlH/zr6IACrJuuMBNw/m
yeZJ3qnMm4kRaANUm+W7wFiT8bQGRm9gFzBpPfMET/xu9MXO5+FTBCTp8qScIlHC
538ZZfg0N0mOgx4IQ2Xn
=l2mp
-----END PGP SIGNATURE-----
Merge tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late
From Kukjin Kim:
based on tags/common-clk-audio
- add support for exynos5420 SoC
* tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: extend soft-reset support for EXYNOS5420
ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420
clocksource: exynos_mct: use (request/free)_irq calls for local timer registration
ARM: dts: Add initial device tree support for EXYNOS5420
clk: exynos5420: register clocks using common clock framework
ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family
serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is defined
ARM: EXYNOS: Add support for EXYNOS5420 SoC
ARM: dts: list the CPU nodes for EXYNOS5250
ARM: dts: fork out common EXYNOS5 nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRvsCNAAoJENfPZGlqN0++JDAP/ROJOKamUa2/b34ebTVq53Os
4u9twxIGRQ/HJzpFZSV4ak/M9G4sl19+V8s46qaKnCwoKlc7GZW/qNqIEgN9cDrz
ht9mbcJ8BTtinUo1nxzIFMOWB0WltSvmlxNeKm6OxG+BXu/lJ6BoPrhoO/qc49kc
eHYAHdVDYIlr+kMlAw8HIbpJqsMiQviq8b8S8aqoW1QSHHlTgL2GNoQH/tli/r8m
XNei4RrTABUq1r04oOBN+0FQKyn5lWgq5hMtdWsP8VvhaW6kwX3Hwl7f+dn/xDna
XB6J3z+/jFTs6aR0Njm8LlJv2Q4SFJE595z/6j9upWS+e7pG+et+SMVSwPCeKzr2
pcCfFpce9e8KIPVUdKlZqMw1BMO/ok1BnpTtdBuAZW2zriW0EeUe0SgFk8GzHC3E
p+JqgeEcbN0lO6WKJ9YfPH6WSt8JUYDse3ldxBlf3pGezaV8G/hccZFnOc0BHXV+
5cTGeJpFEdFcNWvxKvJytehQLTl05KvGyE52AnDLrjq1aIVflYUzTlccm14PpSAC
kTNqEpUd3qIcINi6Udt5WPRIMj6gIXl6zLAkqxufcIhYW86E2DejnWcxo5UbLXyH
30K0BbY90oVc2hJKu32HBu11kI6RlIa9qjBHYI8WAZ+uGplHqD2WaBmXojFElrbH
JVDkg2BtreVa5q4Xot0L
=1+Oa
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC boot cleanup for v3.11
Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
* tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove Bonito board support
ARM: shmobile: Remove AP4EVB board support
ARM: shmobile: Remove mach/memory.h
ARM: shmobile: Remove MEMORY_START/SIZE
ARM: shmobile: Enable ARM_PATCH_PHYS_VIRT
ARM: shmobile: Remove old SCU boot code
ARM: shmobile: EMEV2 SMP with SCU boot fn and args
ARM: shmobile: sh73a0 SMP with SCU boot fn and args
ARM: shmobile: r8a7779 SMP with SCU boot fn and args
ARM: shmobile: Add SCU boot function using argument
ARM: shmobile: Add SMP boot function and argument
ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()
ARM: shmobile: Remove romImage CONFIG_MEMORY_START
ARM: shmobile: Let romImage rely on default ATAGS
ARM: shmobile: uImage load address rework
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
__initdata annotations for the r8a7790 SoC by Morimoto-san.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRvrESAAoJENfPZGlqN0++Kl4P/j1twlyTQ7WA99/qba3Ql36u
hGUbqmpoq5MtqdIrkJh4L48Y5M2+MJmmQaH9CkxyxlsmIFDvAb5Ta55iQ6BJgap3
I6yLxRbhQ2ZhydaY/VrtSQLtPg1wAmAYdfTP/1FT+XuR5JddBk95j9I91LnzkTuP
pUr6k3Ahz9Uz6//cYIdyBvM5y1CWSMtwhSTjL7Fb8UXWls/PzRrvmP1lWH5h0v8L
PZAmVWIE5AaeChd8Z88rtlcf61TouxDnghe72yFlE4A9RD3JFjoduBo7/izn3EAA
BYEAyqJYvrW9mxrMuyJlpE8+Gy2CGB0asKYu63n9FYC6T+RKVhNtGNHJ35ys3xMa
hmAOkpa2oFTJI57APtmR+/SzCGTXElqRNw5LJP95GZkpa5PsugtRXVpczgdTOvnv
4VswyH6EzdzcW5KQYE3v/Zp3/58ZzbLzj+nRkjLG1shi739+CQuJngQin+GGdBWL
hUEIgoNuZl1GN/OjMQzpt5b+rWfIyy8jnRTcluvaNIulaFhqc/sYvolurqQGWa0n
U/mSIZT/PxQftguAgUfzhV1vgvJ80Kkb37c9UKwglJjX7E0oNCkZZ8JD9sce7EXn
IvOZL8k8IPDrl8URtNV3IialW3FpGCwM7S/DZ8qM4JHgBYEbJGZ2QGboUMgvnOBo
cEveedi1Qur0x4ZKYrS7
=i7Kv
-----END PGP SIGNATURE-----
Merge tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
From Simon Horman:
Renesas ARM based SoC cleanups for v3.11
__initdata annotations for the r8a7790 SoC by Morimoto-san.
* tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits)
ARM: shmobile: r8a7790: add __initdata on resource and device data
Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Patches from Lee Jones:
This gets rid of mop500_snowball_ethernet_clock_enable() which is no
longer in use. It also straightens out a bug which ensures the SMSC911x's
regulator is turned on at start-up when using Device Tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
mop500_snowball_ethernet_clock_enable() provided a means to enable a
clock which was used for the SMSC911x Ethernet device on Snowball. It
was merely a stand-in until the driver was common clk compliant. Now
that it is, this can be removed for both DT and ATAGs booting.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
When this node was added, the AB8500 GPIO driver was pretty broken.
As a hack, we pretended that NOMADIK GPIO 26 was the correct on/off
pin, as it was unused. It worked because AB8500 GPIO 26 was in an
'always on from boot' state. Now the AB8500 GPIO driver is working,
the default state for all the pins is 'off'. Let's flip back over to
use the correct GPIO which is _actually_ attached to the regulator.
We're also taking the opportunity to straighten out some formatting
misdemeanours, swapping spaces for tabs.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Here we're adding a node for the AB8500 GPIO device. This will allow
other DT:ed components to obtain GPIOs for use within their drivers.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
to initiate garbage collection. Also, free the kernel memory when
we're done with it instead of leaking - Ben Hutchings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRxCKWAAoJEC84WcCNIz1VIDcP/icYJSdXw/fKUgCG9+zAk3FE
xivUa6aJKG+GBL4Cg2VYTJ/sBDA1v0xdFcf73amCdTcWuor6ha5LxrYFwFhhKtYk
3O05spiCZ+F6nveZTrrxqKce3cN5XOYwbF8bZOAuJYmjaTvZQ0Cb89zf/asC4+Fx
ui6HCRmCy6nUy5Fn4A7fBHlTyuOE4xZXvZjOUXWGiUwmZK/SbHYtN1+4nXBTnAWF
yDcB8fkl4v7cYLIl9U8dc7Dg8ita4bj6F8RRNJf2WXipsOpMoMRtiua8VLCZ0ECc
9cpONx7wMQS5nDEfNefWm4vdqS8PEG1CkZ8tN37nIU/AlTi6mTyTqZv0ICQfgVna
6nChmkz9uxvzTzlMlOR5eGBu68xQLiyHhauTJBpMkwOp4q4gg/Ui+bhV7Vo9ySF3
DlrSekT0Uo1PLgdAUYg7+hZhN98HGHoGSEx7FsymOjqlY3nF+4k7ZeTerEI4vI2D
zqyj5QVWqS/M9zj1ojUu3nFDNhfQHO4PvVt9O8ca4/IJS1pbb/J8qtwIOFTNdJHf
2Iyk6GnT9UaKvOs4trWXmPjiZkBcS8JdQH80fDSIgIxLhwOQksT+q90TY5h3mAED
Hwm9JywXlxpFncPixAkpoorqDWSZmBTmUw9JR0FQNTFGuENPA0SGn51P2gGbTA+e
82ECeWRXMMoYA/qNxMI2
=kfTf
-----END PGP SIGNATURE-----
Merge tag 'efi-urgent' into x86/urgent
* Don't leak random kernel memory to EFI variable NVRAM when attempting
to initiate garbage collection. Also, free the kernel memory when
we're done with it instead of leaking - Ben Hutchings
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
1. Check for allocation failure
2. Clear the buffer contents, as they may actually be written to flash
3. Don't leak the buffer
Compile-tested only.
[ Tested successfully on my buggy ASUS machine - Matt ]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQEcBAABCAAGBQJRw/9tAAoJEPOmecmc0R2B3NMH/A609NR5Yag2vftml8Gl+Iya
2k/dligAPxx/WEogXwxrCcEwFvxA3iNvD9M7MuXZ25ffFL6SgYLnxNYCU53rXRmE
UBQP3OTW/5FyR3N/JGCLW4G8f6LoNWGtOaZqpMC97J4ucnWV/DtbEpoO7qlET/p0
zUsqIpFc9RGroRAmDuRRKpOuArBX5N9utH4fvpZ1XiXztIaESdCiGDFx4AN5g7Iq
uujcKK1NOoj4X/LXj0j4A1ECAhpJ5W8exacdwZZnKVVwA1CpEFxQLu9ekvCYYMNC
6LWhp2/ptgRj7Tv5uVqbHJn4jKd/OM+X0Rn6HcMY1Dwhf37Oa2wPEuQ2qMzcE6A=
=4BBI
-----END PGP SIGNATURE-----
Merge tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a generic devicetree board file and a dtsi for boards
based on the RK3066a SoCs from Rockchip.
Apart from the generic parts (gic, clocks, pinctrl) the only components
currently supported are the timers, uarts and mmc ports (all DesignWare-
based).
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Olof Johansson <olof@lixom.net>
Uarts on all recent Rockchip SoCs are Synopsis DesignWare 8250 types.
Only their addresses vary very much.
This patch adds the necessary definitions to use any of the uart ports
for early debug purposes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds a basic clock setup for rk3066a SoCs. Only the gates are
set up currently, as the mux and dividers should use the upcoming
generic devicetree bindings.
Clocks whose rates need to be known are supplied by fixed-rate
"dummy"-clocks that provide the correct rate. This is uncritical insofar
that the only bootloader currently in existence for Rockchip devices
is the propietary Rockchip one that always setups the clocks in the
necessary way.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Add CONFIG_BLK_DEV_INITRD to the defconfig to support
initramfs and initrd.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[Purpose of this patch]
As Vaibhav explained in the thread below, tracepoints for irq vectors
are useful.
http://www.spinics.net/lists/mm-commits/msg85707.html
<snip>
The current interrupt traces from irq_handler_entry and irq_handler_exit
provide when an interrupt is handled. They provide good data about when
the system has switched to kernel space and how it affects the currently
running processes.
There are some IRQ vectors which trigger the system into kernel space,
which are not handled in generic IRQ handlers. Tracing such events gives
us the information about IRQ interaction with other system events.
The trace also tells where the system is spending its time. We want to
know which cores are handling interrupts and how they are affecting other
processes in the system. Also, the trace provides information about when
the cores are idle and which interrupts are changing that state.
<snip>
On the other hand, my usecase is tracing just local timer event and
getting a value of instruction pointer.
I suggested to add an argument local timer event to get instruction pointer before.
But there is another way to get it with external module like systemtap.
So, I don't need to add any argument to irq vector tracepoints now.
[Patch Description]
Vaibhav's patch shared a trace point ,irq_vector_entry/irq_vector_exit, in all events.
But there is an above use case to trace specific irq_vector rather than tracing all events.
In this case, we are concerned about overhead due to unwanted events.
So, add following tracepoints instead of introducing irq_vector_entry/exit.
so that we can enable them independently.
- local_timer_vector
- reschedule_vector
- call_function_vector
- call_function_single_vector
- irq_work_entry_vector
- error_apic_vector
- thermal_apic_vector
- threshold_apic_vector
- spurious_apic_vector
- x86_platform_ipi_vector
Also, introduce a logic switching IDT at enabling/disabling time so that a time penalty
makes a zero when tracepoints are disabled. Detailed explanations are as follows.
- Create trace irq handlers with entering_irq()/exiting_irq().
- Create a new IDT, trace_idt_table, at boot time by adding a logic to
_set_gate(). It is just a copy of original idt table.
- Register the new handlers for tracpoints to the new IDT by introducing
macros to alloc_intr_gate() called at registering time of irq_vector handlers.
- Add checking, whether irq vector tracing is on/off, into load_current_idt().
This has to be done below debug checking for these reasons.
- Switching to debug IDT may be kicked while tracing is enabled.
- On the other hands, switching to trace IDT is kicked only when debugging
is disabled.
In addition, the new IDT is created only when CONFIG_TRACING is enabled to avoid being
used for other purposes.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323ED.5050708@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Rename variables for debugging to describe meaning of them precisely.
Also, introduce a generic way to switch IDT by checking a current state,
debug on/off.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C323A8.7050905@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
When implementing tracepoints in interrupt handers, if the tracepoints are
simply added in the performance sensitive path of interrupt handers,
it may cause potential performance problem due to the time penalty.
To solve the problem, an idea is to prepare non-trace/trace irq handers and
switch their IDTs at the enabling/disabling time.
So, let's introduce entering_irq()/exiting_irq() for pre/post-
processing of each irq handler.
A way to use them is as follows.
Non-trace irq handler:
smp_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
exiting_irq(); /* post-processing of this handler */
}
Trace irq_handler:
smp_trace_irq_handler()
{
entering_irq(); /* pre-processing of this handler */
trace_irq_entry(); /* tracepoint for irq entry */
__smp_irq_handler(); /*
* common logic between non-trace and trace handlers
* in a vector.
*/
trace_irq_exit(); /* tracepoint for irq exit */
exiting_irq(); /* post-processing of this handler */
}
If tracepoints can place outside entering_irq()/exiting_irq() as follows,
it looks cleaner.
smp_trace_irq_handler()
{
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
}
But it doesn't work.
The problem is with irq_enter/exit() being called. They must be called before
trace_irq_enter/exit(), because of the rcu_irq_enter() must be called before
any tracepoints are used, as tracepoints use rcu to synchronize.
As a possible alternative, we may be able to call irq_enter() first as follows
if irq_enter() can nest.
smp_trace_irq_hander()
{
irq_entry();
trace_irq_entry();
smp_irq_handler();
trace_irq_exit();
irq_exit();
}
But it doesn't work, either.
If irq_enter() is nested, it may have a time penalty because it has to check if it
was already called or not. The time penalty is not desired in performance sensitive
paths even if it is tiny.
Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com>
Link: http://lkml.kernel.org/r/51C3238D.9040706@hds.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
There is no point in using "xorq" to clear a register... use "xorl" to
clear the bottom 32 bits, and the upper 32 bits get cleared by virtue
of zero extension.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Kees Cook <keescook@chromium.org>
Link: http://lkml.kernel.org/n/tip-b76zi1gep39c0zs8fbvkhie9@git.kernel.org
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQEcBAABAgAGBQJRvOHmAAoJEHm+PkMAQRiGpOYIAI/OMDjCMro8S1FjDPGr+wsz
r/u4h4DiHQTdAUSBYhksgXVBSm02hGhDF3tz7u9oAXuv+4zlGUMZNjmEmLOFfdyd
Ve9vqMrUkdwA0jt0d7AYVjtCy/j/yVe5szXZCksHXOZiyb78SEZPQgHc13CJ4lKI
K2jPk0sMko7d5ptALPIX+ome48M+3w3k1HuQ62Znm4pFSADcFGpGdf40HP/5LL+I
Llp3XHJ5OZrcHRal0t39oHJOCWW61bnYXTWel9J7XoUztebF2cRgFydAhtrto42z
x7ELOKVY197WH8l56cnVHrISneQd4kgWrooxLYy6QsJl73/qvQBX+7nmkoes7so=
=qeV0
-----END PGP SIGNATURE-----
Merge tag 'v3.10-rc6' into x86/cleanups
Linux 3.10-rc6
We need a change that is the mainline tree for further work.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
The call stack below shows how this happens: basically eager_fpu_init()
calls __thread_fpu_begin(current) which then does if (!use_eager_fpu()),
which, in turn, uses static_cpu_has.
And we're executing before alternatives so static_cpu_has doesn't work
there yet.
Use the safe variant in this path which becomes optimal after
alternatives have run.
WARNING: at arch/x86/kernel/cpu/common.c:1368 warn_pre_alternatives+0x1e/0x20()
You're using static_cpu_has before alternatives have run!
Modules linked in:
Pid: 0, comm: swapper Not tainted 3.9.0-rc8+ #1
Call Trace:
warn_slowpath_common
warn_slowpath_fmt
? fpu_finit
warn_pre_alternatives
eager_fpu_init
fpu_init
cpu_init
trap_init
start_kernel
? repair_env_string
x86_64_start_reservations
x86_64_start_kernel
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1370772454-6106-6-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
We want to use this in early code where alternatives might not have run
yet and for that case we fall back to the dynamic boot_cpu_has.
For that, force a 5-byte jump since the compiler could be generating
differently sized jumps for each label.
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1370772454-6106-5-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
static_cpu_has may be used only after alternatives have run. Before that
it always returns false if constant folding with __builtin_constant_p()
doesn't happen. And you don't want that.
This patch is the result of me debugging an issue where I overzealously
put static_cpu_has in code which executed before alternatives have run
and had to spend some time with scratching head and cursing at the
monitor.
So add a jump to a warning which screams loudly when we use this
function too early. The alternatives patch that check away in
conjunction with patching the rest of the kernel image.
[ hpa: factored this into its own configuration option. If we want to
have an overarching option, it should be an option which selects
other options, not as a group option in the source code. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1370772454-6106-4-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
CodingStyle does not allow C99 style comments. Since the
dts files live in the kernel for now, make this compliant.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>
Add SDHCI bindings for the Broadcom 281xx SoCs.
Changes from V2:
- Documentation cleanups
Changes from V1:
- split original patch into 2, one for driver and this one for dt
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
- remove board file for exynos
- remove legacy files which are not used anymore
- decouple ARCH_EXYNOS from PLAT_S5P
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwK6OAAoJEA0Cl+kVi2xqOtsQAJV2wGPAXHHhAx4+OP1k763E
n8gT++jUk/VqkNtZciSghB3NkvHG61Y/4zzZIykrwq/ptCmhO/k3jhr4JsJmm6lN
rbszQ35OEZpCyiJtVJK/xLbfEbQvKyI+SleV+uCZPBg6QzfUsTxlChCm0aWvq6CJ
WTBvbv/Y3Gs0SW+h4D3Zk4gDWBaDNNvynMOjBTXIyeCiivRmRrZ2aGSB8xav7nAD
YBcOZRUX6B+KBGyUR3Y2eEh4vn1w2sKU5lGlFsEawbnOibepQjzFqEw19azIt7eI
oFuANcJrF3ITmffEsHnDO0Sq1DQUjcYWeuv5hrHL3uT6ORxqUu9uR/wfAXpmLoXg
R/Op73PkUW1hBqJnblO5uJ5Iyrtpx0qkusFX9H+7a9qu3i9GRUQtT4WlsBYnZzEj
G3TqEJF6hTi7K6t8G/Q+0ttkPOugEV/fFIXEdpjW/eJANKIa43A+NVEf7nLLWeHw
cMKi+LyDoE2biOmPEVKEJBdkFYwEGxErAyn77dnreBnfUIoQmoTxzNea6e+VVg2N
cU/eIrDkQWFqxyEcdiT9fwSxEBdH2oQMjIFiUKqcrhXOCHAGj1mFDAC6dRBTvJvt
6gCPw/IpD/w5w9xi/hWA8WBE/0zFb7Fqxf72JowNr4pvFsyXpVVuKKkCOOmuy+fQ
/xz6uETSXpOQG+3TQKPF
=SHg+
-----END PGP SIGNATURE-----
Merge tag 'remove-nondt-exynos-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim:
cleanup and removing dead code for only support DT for exynos
- remove board file for exynos
- remove legacy files which are not used anymore
- decouple ARCH_EXYNOS from PLAT_S5P
* tag 'remove-nondt-exynos-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (35 commits)
ARM: EXYNOS: Remove remaining dead code after non-DT support removal
ARM: EXYNOS: Remove legacy L2X0 initialization
ARM: EXYNOS: Use exynos_init_io() as map_io callback
ARM: EXYNOS: Remove custom init_irq callbacks
ARM: EXYNOS: Remove mach/regs-usb-phy.h header
thermal: exynos: Support both EXYNOS4X12 SoCs
ARM: EXYNOS: Remove unused base addresses from mach/map.h header
ARM: EXYNOS: Remove mach/irqs.h header
ARM: EXYNOS: Select SPARSE_IRQ for Exynos
ARM: SAMSUNG: Make legacy MFC support code depend on SAMSUNG_ATAGS
ARM: EXYNOS: Remove mach/regs-gpio.h header
ARM: EXYNOS: Remove mach/gpio.h
ARM: EXYNOS: Remove setup-i2c0.c
ARM: EXYNOS: Do not select legacy Kconfig symbols any more
ARM: SAMSUNG: Include most of mach/ headers conditionally
ARM: EXYNOS: Decouple ARCH_EXYNOS from PLAT_S5P
USB: Check for ARCH_EXYNOS separately
platform: Check for ARCH_EXYNOS separately
ARM: SAMSUNG: Compile legacy IRQ and GPIO PM code only with ATAGS support
ARM: EXYNOS: Provide compatibility stubs for PM code in pm-core.h header
...
Conflicts:
arch/arm/mach-exynos/Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- use #include for all Samsung DT
- add clk for exynos audio subsystem (audss) and i2s
- support audss and i2s for exynos5250
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwKhvAAoJEA0Cl+kVi2xqI5oP/3CgQCOQiNt+rPH4OyJvKg+D
ftZ5ZqXqdKTUtWdCqKqiO2Q6+AXeSr2ddiLO/dZAlwFZ3jfbefEgQ6IQbLNTFghz
feDQy5NrxalO0s9nkbdQ34hudDIRI39/+53W9cySnrHooSURvqR3+zLhzSewM6qz
fsivJKygq2TeXUobUDQr8HzajEIcSNCQzWOqu0JkTpe5AY+0QCpwKCFqHfTF9Ks9
9r6F9KO05EGuRwS66IGl0xvMiW5WWbFtM8RPEdRALyFBzsiHpltg9gTQq+ZBfodl
If6a7gclS+GP3WHou9NAy8/5otwFKg/DRZxgXjoVrst/4RmpcqzCnyBdmB/dP//z
ZyLIPXEAS1qv0SDTnbUA8qeW9/zrStV2nHHI5YoQq5L0J3zaSedKOeRq3m996jnw
PRo3HYIjMic6afotmnisXr2bAX9OLcrLnsJ6hDMjC0wZgCMAhKqJxIf3qAh1K8Sg
/oKyqihn/l8QbrubigcgGcwGXNb8HBEYHXgOXprVi7cJifpUaH5MOu7uBMEgQZkH
TpxDmgiNiggB1KT/xI4GhCothGJPLxh75gp5+VvII4pHym0l8jJDafMPA9i+0W/q
UML8CBLB+wfWq+gzc+OUbDQAkOWfQgAE1SuCxwK/BNanlu8ujRCuhQicuS3fNgBA
2ZDtOH6e4tsIiWgrnxz7
=0n6B
-----END PGP SIGNATURE-----
Merge tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim:
based on exynos-dt-2 and s3c24xx-dt-2
- use #include for all Samsung DT
- add clk for exynos audio subsystem (audss) and i2s
- support audss and i2s for exynos5250
* tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
ARM: dts: Update Samsung I2S documentation
ARM: dts: add clock provider information for i2s controllers in Exynos5250
ARM: dts: add Exynos audio subsystem clock controller node
clk: samsung: register audio subsystem clocks using common clock framework
ARM: dts: use #include for all device trees for Samsung
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- update uart addresses in s3c2416-dt auxdata due to removing S3C2410_PA_UARTX
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwK8hAAoJEA0Cl+kVi2xqPogP/iQcUyriupy1YuMuo5PZ6Gg9
zBgkE/DBsoMKEvc1WtK0EbGpQgC3/Ik9Zvp5sJdxpcdP7qMRMZRYt+b1kemYkAaQ
9MJVz5Fh4GGPWleXppCx/eviEHs8e5owXzbfF5iH36GLwFjvtfuNZx/Tlz72txjo
azwjgUBwY/KSyzXLbmp7hwN5plZd3RMvaiVeJel/tChJjZn7oaa7RSh5OU37KWHl
Vx7O4M7YiwcuECrZ7+F7/EIPlaUelNWPBLgXBS53ynUYzigfx2HWYwwHTnN839ZJ
yEx1J/8xDCgYkY+t9WXfbiTbcE1yU+Mff3Al6eGbg0JtzNU+zuzh1cvdLVIiaKmZ
fLYmJbTg/MJlZNJYbbwS4Oel8vqRhaaPdWE87rrz4bb+cMUidhiTCcQfAWY+OJYO
TdMAdwEBdISvd2flTjLWYMRTY66n19FAaFalYWd9MJLHnyxx5+P/5Xju4Bc1gC5A
cIS5Eck5VVS2EDj2WFJzfzP3CYj2p+2U2ymNHKo+ob/DZ3xETlomTVhc6fnTJy94
mVUvk6aYvX/D5dYdjdmx890q9A900pmNgIHejg+tkZQZrEUc6ZtzvOIovlrw7ExI
GasI65trpsREpgYHrUiJHZjJNBWwb7yBvZ2wrwvynEnCN5HRsvgXkztDtt8NTEdY
agQfkvxa3BpHYZ2iPULb
=Cuff
-----END PGP SIGNATURE-----
Merge tag 's3c24xx-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim:
based on tags/s3c24xx-dt-1
- update uart addresses in s3c2416-dt auxdata due to removing S3C2410_PA_UARTX
* tag 's3c24xx-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C24XX: update uart addresses in s3c2416-dt auxdata
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- enable RTC on exynos5250 snow and Arndale boards
- add support LCD and PWM for exynos4210 Origen board
- update bootargs to support 8GiB for exynos5440 SSDK5440 and SD5v1 boards
- enable spi and add opp level for exynos5440
- add example doc for samsung-pinctrl dt bindings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwKxNAAoJEA0Cl+kVi2xqNEwP/1ULCiSfYPtaOZ6G/0R/yHvt
6DMYqUo8d4XjLfM4B+inKsxnplAdi+oR7yOmp2OTVVxZn5FI2qxP8FytxjnFClJw
nNCBtGMbyDD81eSdDjatbIJj9jslkgHKvlUkf9mixGUi/DZof7uCbK0qdvd9puk8
NC8FIXEIRlm8KOcGZ8TEh4f5tqkDCopDbyjEuXP8WsmJjdsDYvtWy4FmrxT34KWV
3VSppbCF9GHIi3hKlC2W9j6XOb1b1n8xL4Iv0KFwOTEDb5GSOwwPtUpk5BLvclDP
W1LGFl9A3ZU5TAa3B0Hsk5nFy6C1lhOPowraHSlnGg4wvm5q1i1YDZfhYJ3tl7rQ
TRUb7ZV1A9Wku2sxqy2S3G/Xxk7ixsuM1iqUF+HWpwb0mykXdH8UpJRR/6Jl20Ds
bh4MElqquQlkj25aZmj0w+YldkWhalup7lPFAcwnJsDPtZVeZ21RY6f0WBUsH3rl
NYtSBwR/NPVxtdtCLzKyY7ortrqCJ42vCvpWgPSPN+C5sGo30ZHGQmIu83mvvSe+
ik96gp57fk6+crVmv5GJS8vvVFzT4MvTzAgL+mB4icpdn6ZYBUiPnaUSNi2rlXGt
B0GK66cTaX4p+GO3SkjYkojmV8cMPG7R2EoNgx77ggXJmTDnb3a+3uYDxlNGO/EE
9iw39+efVucxKV4wnEYE
=sN6E
-----END PGP SIGNATURE-----
Merge tag 'exynos-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
From Kukjin Kim:
2nd exynos dt update based on tags/exynos-dt-1
- enable RTC on exynos5250 snow and Arndale boards
- add support LCD and PWM for exynos4210 Origen board
- update bootargs to support 8GiB for exynos5440 SSDK5440 and SD5v1 boards
- enable spi and add opp level for exynos5440
- add example doc for samsung-pinctrl dt bindings
* tag 'exynos-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Set BUCK7 as always on for Origen board
ARM: dts: Add FIMD node to Origen4210 board
ARM: dts: Add LCD related pinctrl entries for exynos4210
ARM: dts: Add PWM related pinctrl entries for exynos4210
Documentation: Add examples to samsung-pinctrl device tree bindings documentation
ARM: dts: Enable RTC node for exynos5250-snow
ARM: dts: Enable RTC node for Arndale
ARM: dts: Removing pdma for exynos5440
ARM: dts: update bootargs to support 8GiB for SSDK5440 and SD5v1
ARM: dts: Add more opp levels in exynos5440
ARM: dts: Add wm8994 regulator support on smdk5250
ARM: dts: enable spi for EXYNOS5440 SOC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- enable XHCI on exynos5
- enable Pinctrl on exynos4 and exynos5
- calling scu_enable() is only available on Cortex-A9
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwKr0AAoJEA0Cl+kVi2xqd58P/A4WmBGgE+OuWni1VJh87Dj9
FOHEt0ZadtnE7YQ/eaTFalWEUecxyKGAy4TlgViDFy1Wkm6YlVVv8tpauSQBBt2g
dcIW8oO3Bo/yh7t6x1sWkdrzD/CXGTuHJedztg18ViuycmLFqkySj/q7jfLONdw+
SPYggkXofbeBmzFLde2eMPK1o0xd8EpkMaoJcqTe5hLhCw3kIYlkqrQlm5gILgHH
vnJwV0vuAUrUwWttMZ0K3Q2YQ00axXrbaMSEosO+c8BbpDgFhRvRK7LVlBQLJUnI
VjYCXwFQsu1hUU+iWFYlL1Y1ZHcLNWqXCiV1rySFpAHyNCkm4/Hkeny2NB3/Lzs9
YL74jGn2ZBX2Pd5ybE02gn0dsRZg7Pwvjh3ECF7y45K7eYx1QAUpzqrEkY6LMM2u
XWV+ZwX7RI6bhjwUGxXY9bijFmDv3JnoQV1ZzZ0QaAGeE+vmcs8YpeMY31sA7VJR
o/KHEPmBUfMJpUssqD54bEYRjcVWFoRb8dsZRPI2yNgVC95ewprba3S2DEMYFIdT
nahndfdvL+GXENa9+BS/q08Oh4PlP21OGBM5Nv1lgbc0SLsyAfQG5rMogsrj5KNU
izc4PLIf0mUvCudkaDxRdGywpjK3FGFZB4C114Zn3eJOPBF+m6n5T/BRjXn6dfPa
mITERPhogy60HFTzlkVl
=oexl
-----END PGP SIGNATURE-----
Merge tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc
From Kukjin Kim:
arch/arm/mach-exynos update
- enable XHCI on exynos5
- enable Pinctrl on exynos4 and exynos5
- calling scu_enable() is only available on Cortex-A9
* tag 'exynos-arch-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: call scu_enable() only in case of cortex-A9 processor
ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
ARM: EXYNOS: Enable XHCI support on exynos5
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The OMAP Mailbox driver framework is moved out of arch/arm folder
into drivers/mailbox folder, to re-enable building it and also serve
as a baseline for adapting to the new mailbox driver framework. The
changes mainly contain:
- a minor bug fix and cleanup of mach-specific mailbox code
- remove any header dependencies from plat-omap for multi-platform
support
- represent mailbox device data through platform data/hwmod attrs
- move the omap mailbox code out of plat-omap/mach-omapX to
drivers/mailbox folder
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRvusIAAoJEBvUPslcq6VzQLoP/Rua4CwUWWYWOXGWW1/Mnf9m
suVWrYDwkpcSmWeshNSthoF9d0iLKGTSK2mSNsqjBDyKwpqG3SHaS5vIPoRtc58T
wHoS/a6rubo1ar8mWrxxHPP0eol0VXR1PwJGMNJrmx7Akzs6DHsiCgmTyoTTmSW7
Rs9fJnfbV/DLz4nlmlL3sm+SDv7lbFZbowZPLKZl9LiUuoCIznq2hsIPW6XMufIa
TeFpezMzxP55L2Yxya4Gc29bVSJO2PRdtn0d1UaJufcNfNdKnbrx0c2ksMwS8Kfn
kuw3H5sohCN+vJX/Hd2OX0icv3W+k/6UtwBMZ3Nu65BvzAcggytskITCuGbRLOkz
t0oKM5U+7tsnPpg5Wy/ZvuUj1TNgVrgbjWD26FnFbpRMnZ1kZGuIjgltrasGpjXP
N7judIr1jgvy2+1sz8Rfeh0ymsu3PBss00A6hBk+WEErq554ajC4/e4p0Rk6GXPL
SszQFdwOc/pvGTnbYR33BI1d465QEpgu6RDOevWKPGwmkqB0E7agQ/tOpp+M32Gu
GL2YLFzqEr8cFZ6Rl/jixPXZnvjJs9GjzeQaSctgM1694kddwjWz3LnOUFUVlHFJ
Vxg7ilw6YdrDvkdDxL2kiOQ3d9PAjaArhBjgPKgLr/riZ5+7XwY90eO70WvvhfJT
S5Wklgl+mpILN/W6h6wy
=j0vK
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/mailbox-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
From Tony Lindgren:
Move OMAP Mailbox framework to drivers via Suman Anna <s-anna@ti.com>
The OMAP Mailbox driver framework is moved out of arch/arm folder
into drivers/mailbox folder, to re-enable building it and also serve
as a baseline for adapting to the new mailbox driver framework. The
changes mainly contain:
- a minor bug fix and cleanup of mach-specific mailbox code
- remove any header dependencies from plat-omap for multi-platform
support
- represent mailbox device data through platform data/hwmod attrs
- move the omap mailbox code out of plat-omap/mach-omapX to
drivers/mailbox folder
* tag 'omap-for-v3.11/mailbox-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
mailbox/omap: move the OMAP mailbox framework to drivers
ARM: OMAP2+: add user and fifo info to mailbox platform data
ARM: OMAP2+: mbox: remove dependencies with soc.h
omap: mailbox: correct the argument type for irq ops
omap: mailbox: call request_irq after mbox queues are allocated
omap: mailbox: check iomem resource before dereferencing it
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
omap-for-v3.11/gpmc-signed branch because of a compile error
it caused. The compile error is fixed in this version.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwEBTAAoJEBvUPslcq6VzObAP/0oVkNu48xa0YKFWwvGOiKRo
jlavXOgycPsG5BNPD6nPC+KAsFSy0cxG1aRiS2oyC3Q/VlqRJQnCaW786JDWDOGh
q5ycZNTeJPGIrV6XdzGhD7MjDUM6YeZnkqC6LDy3hv+6LpObATlWBd/72/PJS+1X
UsIVrTHnaQo1Jq5xOTQ2knauwPX35qcaCsPPDndTscvC6iio1USOTYtigBYmUeF/
sKAPHxSTwb/uQsd4c6YeocLxdrgGGkFDbf2pN+DQgx5TesvjG+xYMVibSQSsjfWj
I+HkulYsFA4rOQvtqcb1/GG5w2VVLZqRBJQVlqshieGJXxdWWlSO0PPUGj2Hd14I
jiD6kdEis+avMu/SCRLniZ7JQ1nXTJdyW+sEiwKtpfQC6wlHmF6ckUT0tvGx6d9k
DO6QFnQgn6Pntt/JlZaETw9CSZbYzKwBI0P3cHNLlJP42cm6cqTmhxTJHrCq87m+
zFHSydwhWn3Dg1ckKDKqUSfC25qL4mSi6iZWvpzMoisIPWPM/oPGIHOwFCinIMEh
VjtdS+xjkGkelO0mmLcQakRxyqxzwV8+ERBCAN3XX7xgDas6HDwfX2pQ5mln6wxv
gG1gcnDi4DkaynfWsIJM4FGWw7Vm3PApI+eF6oK5pkL+15kzjdPly98iLO9Ulyy2
D22PyhC3hAt80yw4yZEj
=IxbH
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/gpmc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
From Tony Lindgren:
GPMC suspend patch that was left out of the earlier
omap-for-v3.11/gpmc-signed branch because of a compile error
it caused. The compile error is fixed in this version.
* tag 'omap-for-v3.11/gpmc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: gpmc: Low power transition support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
tapering down finally as we're getting closer to making
omap2+ DT only.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwFIaAAoJEBvUPslcq6VzrlkP/R6CuqOMfk4IZZpsvFMSlxmF
dG8fFxtCf5yEL+s65svN8bMdu+HpoIl71C3tO4geTB+ThBy1IyxU2CV68V4GOtyn
npKhmcnpFxtf3eF9Vwp4rcruqRCh77B4Yjx88SecVoS1fX6voGSDUgxNWt7FXJ0P
g5Bvzf8atQ6T5nzUubO87uX6MWa2vSZGXRjqUX2DLkYLZj2P8Bp7xIMD/SVY8WTz
GEXM1ZiMx1kYvbNiTj31CopKDipIUwJbGM0dr5QevdUOyVQPaNvSmr1+4Fd0OJ5z
dsmTe2aLWIWK3URtIv0QeooBmfn4OQtOj9CZR9ejbTtPKEuzONBAFm/yZQ4Ekx0a
7MbqlQYbj6kP8YIYa2wkUIdc2QWeH2SBgfWcOSzewzQ32q94HpKmxzwsRDP0DZKE
DMaGLHgbtl7rxr6AUEac3obVI3edIuPpcIVsQtPuXgPejee9gxRkE9/WQGY78uyc
O2ZzW1CZAqHetl0z0IZLErGm/6iQAVCvVnYjZcQwyLBNF79nh9KIbqkQNxnZa8H0
E5sj0CqGQbtwHOBbrTZdggw2CCGNvMcIN+3Bt0mbAboCY6SrRhZkZ9SsHStNFTc+
VNWxQG4dx/0hbKwXw2LQTq0B+D3iEKPGE38MyI/ix+agD+GuFQ+2weZAyVF9oFdL
c5x579nW3smpsq+T5EIq
=5gWz
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/board-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
From Tony Lindgren:
Minor board changes for v3.11 merge window. These are
tapering down finally as we're getting closer to making
omap2+ DT only.
* tag 'omap-for-v3.11/board-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: enable USB_PHY and NOP_USB_XCEIV
ARM: OMAP1: nokia770: enable Tahvo
ARM: OMAP3EVM: Marking omap3_evm_display_init() with CONFIG_BROKEN
arm: omap: board-overo: reset GPIO for SMSC911x
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A recent cleanup caused build errors in some configurations
because the header defining NR_IRQS_LEGACY is not included
here. Since that value is the default, we can just as well
leave it out.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Pull scheduler fixes from Ingo Molnar:
"Two smaller fixes - plus a context tracking tracing fix that is a bit
bigger"
* 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
tracing/context-tracking: Add preempt_schedule_context() for tracing
sched: Fix clear NOHZ_BALANCE_KICK
sched/x86: Construct all sibling maps if smt
Pull perf fixes from Ingo Molnar:
"Four fixes. The mmap ones are unfortunately larger than desired -
fuzzing uncovered bugs that needed perf context life time management
changes to fix properly"
* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86: Fix broken PEBS-LL support on SNB-EP/IVB-EP
perf: Fix mmap() accounting hole
perf: Fix perf mmap bugs
kprobes: Fix to free gone and unused optprobes
Pull cpu idle fixes from Thomas Gleixner:
- Add a missing irq enable. Fallout of the idle conversion
- Fix stackprotector wreckage caused by the idle conversion
* 'core-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
idle: Enable interrupts in the weak arch_cpu_idle() implementation
idle: Add the stack canary init to cpu_startup_entry()
Pull powerpc fix fro, Benjamin Herrenschmidt:
"We accidentally broke hugetlbfs on Freescale embedded processors which
use a slightly different page table layout than our server processors"
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Fix bad pmd error with book3E config
Pull tilepro fix from Chris Metcalf:
"This change allows the older tilepro architecture to be correctly
built by newer gccs, despite a change that caused gcc to start trying
to use an out-of-line implementation for __builtin_ffsll().
This should be inline again starting with gcc 4.7.4 and 4.8.2 or so,
but meanwhile this change keeps things from breaking, with the only
cost being a few bytes of code in the kernel to provide __ffsdi2 even
for compilers that do inline it"
* 'stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
tilepro: work around module link error with gcc 4.7
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)
iQIcBAABAgAGBQJRwxnfAAoJEGvWsS0AyF7xtTYP/jZGv5tZVdEOswJrtsAfHM1Q
6P6E9JjZFLagnt1lKx1xmJv23wVBY+1GRi4GBOhAPhXua9xe7pxuu82EDB4gjpwj
hSS2owe9sXGhaoGZiBClDDIDj5L6sfscJNM6tdfxdqQvGidr23b8Zo3sqspTvUdC
EKUH6leI/Spzec3jGBLfHiF45bz0f73E38/3TRxtVNuRxmjJcTCiXLgV8xkaYNy4
cnook8ZJa9IYDHF4o8Rf/63o0Y85cD2e1kNAxQkf28WGYD0v0HwQkBJeAYyihRjA
Gla3E1xAGduak3fF5Lo5PjOmkhIAbd8VFZ0CAn19NaTPwLsgTVWgtNw1sgtNm+Ju
IVTQK0OPXxpjM3TJIWTJO8sGJ1sa2fkhoD1YqS1mNFehKBHqgdY6xktAFYosBFr5
Yjs6Cd0TRAM9XZFxuCF15u8uJ/LGe7jAofh09JdUop+eGHw1LA9+GtVTzaN0dFyx
oRpMSC3k9fy/EA6L0hM7Gl6/JWI8mI6eOngrdV7XG27YH5NPZtI0gc8gSXJo2DtA
urK2f8h3zRS6kNAFsL7kqxSiAWUSGdhyttD406G3XjsLd84bUmWe2wvbS0OEa0ix
eZiM48wxdpLYq2fFQP7eetATAnif4Tpd1J4uHlAk0hFHOy/0iieJHJ2cJ/9G+tq2
Fh/vqnHwlr4iTmfAQzrY
=BcrY
-----END PGP SIGNATURE-----
Merge tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64
Pull arm64 perf fix from Catalin Marinas:
"Perf fix (user-mode PC recording)"
* tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
perf: arm64: Record the user-mode PC in the call chain.
This patch adds defines for APM CPU implementer ID and APM CPU part numbers in asm/cputype.h
Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch enables APM X-Gene SOC family in the defconfig. It also enables 8250 serial driver needed by X-Gene SOC family.
Signed-off-by: Kumar Sankaran <ksankaran@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>
Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Commit 5336539 "ARM: S5P64X0: Use common uncompress.h part
for plat-samsung" was missing a type cast, this brings
it in line with the other samsung platforms.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Cleanup watchdog support on Samsung to support multiplatform
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRwKUiAAoJEA0Cl+kVi2xqRMMP/j9Ml+uPgh1NNF/kYOaZB5kl
oDaSTUK34TXIN2MCPGPf3Yck9dtt3P92kXpJPaSkqoc5ioY4h/nTEBFPxc6zcnh0
xCg9+4m7NTzxSSfbxwVBSCZFcGto0lb9d8IzB38czXENMpKOKgfQ0X7KeFmXkOXY
j2iJzAuAGkCt+qEpsGL+GoAdu+vMAScvD9Z5oT+IV0Jc9xFacgCArm8kOla5zPtt
/I7li+D3QjKytft8Av6fmSICr+gs14IQuz+ZqaxiwDhMosyzzHarAOLZnE8oJCdt
VAE6turEyI0c4uAKfJrBaq6m+NNOa1mAqyCRQsjHtt7YFpxXdjFcnMH6PrwyeVsr
Z9XkrRwTJOdlVIzE1IpF55cptBCqZu33gRBfyfbztPn0X96CES3lSZOY780NUOH1
4yTA3Bb1cCStXhusjdz/sRj8qhBsR5TT/LI9igVUQeW+07TTGkw44/5xJmB+VOM2
fwdKplXWWrZV7oe8I8b8GR/AeZvCOGKLIrtqDD0D3bm8fPq/ByMif3PZ58weFKBV
B6Ts6YwvRqhovXu2gvU0WQVnBjye8cOen2+Nlny5J+lML4C19qSOsgxy2WPN4PHC
nEFYaM8CCQ7wf3bClZVX8Fg/SewG/A84vORhlAcV9C4Ezk/x3sGDmv7bsuUM+g+F
ajLhIC1GZVkyX4qfYSxm
=zkPJ
-----END PGP SIGNATURE-----
Merge tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
From Kukjin Kim:
- Consolidate uncompress subroutines and s5p64x0-uncompress
- Cleanup watchdog support on Samsung to support multiplatform
* tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: Remove unused plat/regs-watchdog.h header
ARM: SAMSUNG: Remove legacy watchdog reset code
ARM: SAMSUNG: Let platforms use the new watchdog reset driver
ARM: SAMSUNG: Add watchdog reset driver
ARM: SAMSUNG: Use local definitions of watchdog registers
watchdog: s3c2410_wdt: Use local register definitions
ARM: S5P64X0: Use common uncompress.h part for plat-samsung
ARM: SAMSUNG: Consolidate uncompress subroutine
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OMAP: PM: remove requirement for voltage domain data; remove dummy data
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwBYDAAoJEBvUPslcq6VzTIUP/3Cv+G/yAtbegSsodSmgBMhh
0qor0Kon/zO7rNYr2IEWI/kvVB7PwqLWxooJHc2/HXGSinb49Y4BUQbkRevYxqno
I4hieuFivSgprVSgpwmNGdLFzEslVID2orTFot29UXGLqqtQ6qPtO/hZhbHWG5Uv
bLQ+fCB3Rx4AKfEMWSdqrcnufjMB1GJJozvwgCMZY1KbCn30hx+fGQCBVFcXc84W
yTpq6c9tYLEJjcB+KaTesd343rjV0SP28pzbdivpylSdVoDR2g/oqv8twqHlW8KI
jrHDryCVmuZh6iFifhN3BwWtKti0/zqeb0e3UPV3SA+Uo0S4UFemwG/y4/rLF89y
mKLYlASoBdLiqwu8uhpuAK5qHOcQ74WCGMJf9JKDf1oOZ63AUo9oYrQHdKK2GR8o
tzQiRQ843yY3hmbsKe9j2LDKw/eMzoU0E7bR6DL6uZTOhxnHgYDSFBQc+QURcdy7
QRyeTrjVCUo3HV4AM2V1jKUeCQzaY2g6ZKGxS9MZUKyyP5pW71sJZvVP9fB9VJ/d
Sbiqmz0ULyw08HeZfq45J96F2WZRvoqP8kFzustOzXoRijrl+Mcg63A3B3El1onW
THBNw27+MC0x7Omfe6t4fDflKc5n0PzemqjWTwBuJgLvSrIBYVhVFpmtKBmCc9oH
mL8VHpjVpNtpU+pM8v0m
=KjMH
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/pm-voltdomain-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren:
PM voltage domain clean-up via Kevin Hilman <khilman@linaro.org>:
OMAP: PM: remove requirement for voltage domain data; remove dummy data
* tag 'omap-for-v3.11/pm-voltdomain-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: AM33xx: Remove the unused voltagedomain data
ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm associated to a pwrdm
Includes an update to Linux 3.10-rc6.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
OMAP: PM: the serial core + driver can no handle no_console_suspend support
without any SoC specific handlding or SoC-specific DT bindings. Remove
the now unused SoC specifics for OMAP.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRvvGmAAoJEBvUPslcq6VztPwQANKaWdv4OJ9stQmXG/zstdSu
kbBsr/Cx5kc5gt0ScvLFK8Hfm2tBukE5XfnPGxs6dAZudUIl58rXeUM7hH/h0WLo
TImpFuptEY6zpzBLaX1OKz/icSDqgo8M3pBBjSZHsJNslq2G7I2ZwcrD1qJqE4wt
nMN3HKoEZr23kGIbUsv83CI5wAtyF3j/glZVT2HtePRdDjBw51oOK4HNB7bEL1v8
3aB/pfqGVMJz+KotNAFdbQObEo/he58dXsl9l3Opo+TKwmjsXRqAFn7LbvMl8OwY
+Q12cqwk3auc7RtiaPQoupKunYQW7c2ysxqdA3YY57K5P1WTNAGLjmpdwa5E+9m1
6AUI/qWS+mFmK9sjKRp8jii+sNUT+3K+OQcWfwhoXjl3zZtVno3ZIOFA1a5WuFKC
f44FRcaSfKXWbgIJaqZ+2XKGx9oT9TxwL5NXqj4kx5mgqkRJR9D/Qt2lYdf9kPd+
kKkSdOIzhgcKTBiRYYJgXSQkylr/ldZOmres11y4toG5iBTjk0VJkMzwR5CXxdpY
5ZKhSMmd/hnPRs/u2WBkZ9wS6jcIpo83JPXvEWUK6CS3nkjtCp/YF9ygArsql8+P
pwLQJQn62OpIldMjHlrtDh9XMFu/eqaNZ688DIEUoWBz9sEMcLnUsZcZLb+f76kU
Y6QeC9ard2rbxi4LmYmc
=yja+
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/pm-serial-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
From Tony Lindgren:
Serial driver platform init code clean-up via Kevin Hilman <khilman@linaro.org>:
OMAP: PM: the serial core + driver can no handle no_console_suspend support
without any SoC specific handlding or SoC-specific DT bindings. Remove
the now unused SoC specifics for OMAP.
* tag 'omap-for-v3.11/pm-serial-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
arm: omap2+: omap_device: remove no_idle_on_suspend
arm: dts: am33xx: Remove "ti,no_idle_on_suspend" property.
arm: omap2+: serial: remove no_console_suspend support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
patch from the already merged omap-for-v3.11/soc-signed branch.
Also fixes for ti81x booting and revision check updates.
These are based on omap-for-v3.11/soc-signed because of the
am43x dependency to earlier patches.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwDlPAAoJEBvUPslcq6VzJQ4P/AuF/HWAm8p+pP/qgkPK7JYF
9UdT+RwvBbXkcx3Hx75qSaHCjWHrVHFXOctFWc/dUePvLiWsh/Krjawu/zHRoWXR
jxZdFogCtQbYPIDBd+YlEasb16uLFioSO3DiaMYJCwrEFO2Iln7/U3YmSnyM/u5M
nkcFVfjmBxdJwLdghXoXRvCtv4LWYDRRyA0v5bWMQmqQCraBs9jzHXRQlpA5332y
UWr1XRvGL/LtHZroKtiItkR1FkM8NeO/7JqP4rmy2+ebXWKeAJRtWdKrjDK8M0/6
1zWy5v3M1BSI8RUAL1TODx/ZIHEDtO5Npy9qxMCUqRK0F/y9/u0w8ibPRZabRaNJ
zqVYQ+0NqD4gQf8bVRFZaSgk9U0ZABVbc6jQn6YCmsF2l0uQqG418DWuDWvahqRC
/oOb1vI7vR/Q0rXESwWtIj2z/IQlKnr+Yo+q01eTDjyIEq6vDiHveEV5+fC3qydn
6mcF4P2N5o6fSSH3E6LW3UIUDplZi4VFYfHyyN6F/hTmyzJvAw8oh05CCOSEEfy1
VAkwI3WRwRaCeSoHsT2d3HOXU/kJvKLNzlb233FTt/B9tH40uoBy1C9iRshCJlG8
SOyPq/0pK4TPajEbPFB/SX3KS2LFNz+iZ94Q7Dpbc4jSDxLodTn89Qm5yQ8g4kYS
ivex2S/X+AceVfekvozl
=4brz
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/soc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Fix am43x minimal booting as I accidentally left out one
patch from the already merged omap-for-v3.11/soc-signed branch.
Also fixes for ti81x booting and revision check updates.
These are based on omap-for-v3.11/soc-signed because of the
am43x dependency to earlier patches.
* tag 'omap-for-v3.11/soc-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3+: am33xx id: Add new am33xx specific function to check dev_feature
ARM: OMAP: TI816X: add powerdomains for TI816x
ARM: OMAP2: TI81XX: id: Add cpu id for TI816x ES2.0 and ES2.1
ARM: OMAP2+: AM43x: basic dt support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Lee Jones' pinctrl compat ontology patches
- A real clock driver for the Nomadik, 100% DT-based
- Device tree changes for the Nomadik clocks
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRwrp4AAoJEEEQszewGV1zLVkP/1c/zyS4gOjMZLf2aqhT/KAR
K5NRuNQgWnzLtZiEV/sEfiG1aXdJIRUiRwYYOBm//DiTduEURh60H4xIU+BgwaA8
FjwZw52y9iFp92uASz0IGyBoWc3x8poEPVgM9qStSMKLPdpU0IvsYxRi9reFUtM3
XQrs8geZ2Twjzwu81655D/aIbps1dhN6JvUtclhHKdcqcISndOk8LGqTPLhqo7R1
nBmKMmM04uQz/sov/iKiOG9LeUPgJwBzgdDtP/qgmGMDbZqMF9Hy6ErNYL4X2iNa
wzJNl17n0Ml2Z1qoB+WCrpF7sNRKj66ee0T6K0L4MpIHM4NsXuRg0hV7Hzkzd5aY
FBSNu02m9k7Cz8RHlqd1ova1deqCsER04gIF/06kyqWq2g+l8ACeAVxUOHHD/cnr
JX4nNfmDowzKCneJVa+CWmh9DWIzAocCFTEBRb4DkHHZypWzR7OKXAI/L1mzDtV+
n2uKu9lQt/0dzVv87fxh4cBWswsl28ADJdc9l7S4PILkYTYBL7oz/UXL6A/xBZY1
NBsIHp23/QJiGVXkbKeMAjt7kTVQIPtti/NxWAjGrJcEc5BTT8031SLnOrdTLmtD
IixP6r0ZaTHKpYkgEygZHOYrcOh4TbbQ57Cb0cuzl/Ph/u7RgtaYfpbRumhHTbUM
rHEvMBVGgN7dzOoJ+/oS
=0yyI
-----END PGP SIGNATURE-----
Merge tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
From Linus Walleij:
Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
- A real clock driver for the Nomadik, 100% DT-based
- Device tree changes for the Nomadik clocks
* tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: add the new clocks to the device tree
clk: nomadik: implement the Nomadik clocks properly
pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS
Conflicts:
arch/arm/boot/dts/ste-nomadik-s8815.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Adds machine support for the Allwinner A10s SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRwX/OAAoJEBx+YmzsjxAgsWMP/0wgCyPTHIObQfLrAixSWMeD
eMilBFfHr4qvQPl91ZGAmMkAGT/U4jNJc89uUe2Wpa6/0nQmk4kH6t+6bc6pt4vW
e6dsDPTjwm0HPg5UnQ0hzDsFE6rpoCLTlRMZ6AKcIIgUTaTI3mdNJEEtu/qH9OrG
pJ9AdUK/zbIauqLOa+OaiNPvnDss2JeJlacdnvYvsZ6O8I/Cidt1NvV6BQ6asGAE
Ih7eWmphKqzGBH8/jBp3PNzN1WzBFVtOnxf5dYEZhFym0Bb9jEWeCKJdRuQ5yxiE
XbRJEsiCDR4kW5upqELBiMkwrmsnFwpfe2V2ZymbDf+Y9edyDbhwKIeDgAW4t2Sx
c8mRB6bi/qkRuoYSoT+ovCs95WHTpkmQ0bLNgoecPPvD/BASNWaoUsDXoP87cfmI
+/GlsxxDQz8ZJ2sJqUe+2pQEt7iHJdHS5E2XRZvxodpw4/RXCtuCtRbQCER7BTQV
cmeTcKP0NW65+fjepmfhMLfpFI2Il7M11zLBczOzJGgoZrzCs2wccsLpHQ+yEwKz
FZaF+nNA0LXCoQQIGtgwZmxA5dZJW+D7C7JO4zD911zJMmUVLROKYuL21feQ11/d
C21q/A1vpQu2VlT+mCAomO9lrJWhUP0+gSKPPBeJXNmgbu1Wq88k4FaeqJ2Py+zb
QHWMeOuq3U72xwaqa69g
=XZDd
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-3.11-2' of git://github.com/mripard/linux into next/soc
From Maxime Ripard:
Allwinner platform additions, take 2
Adds machine support for the Allwinner A10s SoC
* tag 'sunxi-core-for-3.11-2' of git://github.com/mripard/linux:
ARM: sunxi: Add Allwinner A10s machine compatible
Depends on the sunxi/cleanup branch
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRwBmFAAoJEAf03oE53VmQ66wH/Rs/7NV9kJZgpkLALi04Sw23
Mee2+wyu0NHPtJCu95FxsnP2JZD2NcoCA08iHiRg256BIFj/w62T5wgW672bt0oo
nuniLsqjPhbl7+j9mZPVZ2aWJtoo8gptKIuZxKIMsr4jfKd876CL3QoA/zjUNK5I
WAkYd6HOGRKPhIUy95sN0u4v6Clj43GNNp2RTsTnvUKg0v/gJJjERete0VDew/+P
WGK8VlHyvP/n5weSKIUTzFEBhBqfAYcqINejPCo6IzuUNseclJFcrnQBSKZb6KLP
RRMoB9kU4j2en9q7tpOFEtz/s1knc+c93YMkmjCkoDSRbgOENcppfYYdnVAznWk=
=gkn4
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into next/fixes-non-critical
From Nicolas Ferre:
Two non critical fixes that can go in 3.11.
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91: Change the internal SRAM memory type MT_MEMORY_NONCACHED
ARM: at91: Fix link breakage when !CONFIG_PHYLIB
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRwBu9AAoJEAf03oE53VmQWokIAMLVbdBGfBOLV2O3rl/Yo07d
CD3ZG+eRzq4Rzms3qRnl57m9ESiPMVnkuvxdy3E7/ZKkihdUQKHMBGY9r1oHIjO2
KzA2QI5LRb6pOqtPH4HoTWmQYg8Tcg27ofjrTRfUDtG1jNENVMXfZCD5dF5V/ICx
vcfDuauqaLnJfsX+EO9Eedu90lBtP22M3dJqcZAozWPxM7FjUnEG4guvfDbo40lT
gj3xhwnx9BBpETyJFizcpW8nxPCANPIYhyPmw7SwvpVUjN487/O/yiR+kf4oXoQ4
vZFpXfOV6L4D/rg8G9gu9Lz6mXxnAyZDWkfQucfuMbIknK5Gg8FZCiH+fPoZZSg=
=INB9
-----END PGP SIGNATURE-----
Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
From Nicolas Ferre:
One old board removal.
* tag 'at91-cleanup' of git://github.com/at91linux/linux-at91:
ARM: at91: drop rm9200dk board support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This pull request moves DaVinci EDMA library to
arch/arm/common so it can be used by OMAP based AM335x.
This is a temporary step until all drivers are converted
to use the dmaengine driver in drivers/dma/edma.c.
Several drivers like SPI, MMC/SD have already been converted.
Some like audio are pending.
The other two patches in the pull request are cleanup in nature.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRv+92AAoJEGFBu2jqvgRNo5kP/AmUETjUCik9j9mVUzuv0k57
c+EO63zqtWfU9ryVaziZOnLqFK51eLbNVV0I04pjZQzsrox+X9fasRRbXPdzCCW8
+A1AcAmNGpKNVTaXSpHZJxI7Pq57mdAo4YrdaOjOICcjUgikqSibUxg4Yojz9OxL
mOl9dPMSXDnXKaPLSbVz/jBDJSrYvBKXpO7/kyDbnmiQ+kqw4pY0F3NLkxWtsEFF
L4nnwrLRdoTOnqAGQsTqUl9WcNr53EZc+gc0m4cJs3Fj2GLl2gQaiCb0hZLKzSwk
Awa0mVZHUgJx5lCS2dyhk7cq/wIv1AO8GAnq0XP/04sajJqBz1B4eDfncYP4+qph
Z6FXEAhNj0Fo+x8ZYmGr+cep2hmkUbBmPkNDWuTcU8VtH5FlXH4BCLREoSISBktD
lpymYaRx7G1c9gZFYVfZbInWqrF1s8avqs/UlHdp96SgHNpQsrpxyyq4VSytGWOP
aodbcOqktK+9Sn6vmRPTELlpYmPJnpX2rbhnVj20zED+uSO5IVL194+ggrLIc/V+
SObGLib4/FkqyJp4/WVir7TLchsj1BKASmlF0a9HZ+1wuaRyC48J0kjYINY8ycBz
rxfG5frG4tXSObuk0zMlhNoQRh6elT9eO67uflgjSkXFxLm7Tzd4omHTokAKAo1E
F81IsqEDqYhbrbmzj2Na
=BH9M
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
From Sekhar Nori:
DaVinci SoC changes for v3.11
This pull request moves DaVinci EDMA library to
arch/arm/common so it can be used by OMAP based AM335x.
This is a temporary step until all drivers are converted
to use the dmaengine driver in drivers/dma/edma.c.
Several drivers like SPI, MMC/SD have already been converted.
Some like audio are pending.
The other two patches in the pull request are cleanup in nature.
* tag 'davinci-for-v3.11/soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: edma: remove unused transfer controller handlers
ARM: davinci: move private EDMA API to arm/common
ARM: davinci: remove __init atrribute from function declaration
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix arch_prepare_kprobe() to handle failures in copy instruction
correctly. This fix is related to the previous fix: 8101376
which made __copy_instruction return an error result if failed,
but caller site was not updated to handle it. Thus, this is the
other half of the bugfix.
This fix is also related to the following bug-report:
https://bugzilla.redhat.com/show_bug.cgi?id=910649
Signed-off-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Tested-by: Jonathan Lebon <jlebon@redhat.com>
Cc: Frank Ch. Eigler <fche@redhat.com>
Cc: systemtap@sourceware.org
Cc: yrl.pp-manager.tt@hitachi.com
Link: http://lkml.kernel.org/r/20130605031216.15285.2001.stgit@mhiramat-M0-7522
Signed-off-by: Ingo Molnar <mingo@kernel.org>
As noticed by Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>, commit
865e0527d2 ('arm: mvebu: avoid hardcoded virtual address in
coherency code') added a postcore_initcall() to register the bus
notifier that the mvebu code needs to apply correct DMA operations on
its platform devices breaks the multiplatform boot on other platforms,
because the bus notifier registration is unconditional.
This commit fixes that by registering the bus notifier only if we have
the mvebu coherency unit described in the Device Tree. The conditional
used is exactly the same in which the bus_register_notifier() call was
originally enclosed before 865e0527d2 ('arm: mvebu: avoid hardcoded
virtual address in coherency code').
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reported-by: Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The following change fixes the x86 implementation of
trigger_all_cpu_backtrace(), which was previously (accidentally,
as far as I can tell) disabled to always return false as on
architectures that do not implement this function.
trigger_all_cpu_backtrace(), as defined in include/linux/nmi.h,
should call arch_trigger_all_cpu_backtrace() if available, or
return false if the underlying arch doesn't implement this
function.
x86 did provide a suitable arch_trigger_all_cpu_backtrace()
implementation, but it wasn't actually being used because it was
declared in asm/nmi.h, which linux/nmi.h doesn't include. Also,
linux/nmi.h couldn't easily be fixed by including asm/nmi.h,
because that file is not available on all architectures.
I am proposing to fix this by moving the x86 definition of
arch_trigger_all_cpu_backtrace() to asm/irq.h.
Tested via: echo l > /proc/sysrq-trigger
Before the change, this uses a fallback implementation which
shows backtraces on active CPUs (using
smp_call_function_interrupt() )
After the change, this shows NMI backtraces on all CPUs
Signed-off-by: Michel Lespinasse <walken@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: http://lkml.kernel.org/r/1370518875-1346-1-git-send-email-walken@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/intel_cacheinfo.c: In function ‘init_intel_cacheinfo’:
arch/x86/kernel/cpu/intel_cacheinfo.c:642:28: warning: ‘this_leaf.size’ may be used uninitialized in this function [-Wmaybe-uninitialized] arch/x86/kernel/cpu/intel_cacheinfo.c:643:29: warning: ‘this_leaf.eax.split.num_threads_sharing’ may be used uninitialized in this function [-Wmaybe-uninitialized]
This keeps on happening during randbuilds and the compiler is
wrong here:
In the case where cpuid4_cache_lookup_regs() returns 0, both
this_leaf.size and this_leaf.eax get initialized. In the case
where the CPUID leaf doesn't contain valid cache info, we error
out which init_intel_cacheinfo() handles correctly without
touching the abovementioned fields.
So shut up the warning by clearing out the struct which we hand
down.
While at it, reverse error handling and gain one indentation
level.
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/1370710095-20547-1-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Current implementation of cpu_{suspend}/cpu_{resume} relies on the MPIDR
to index the array of pointers where the context is saved and restored.
The current approach works as long as the MPIDR can be considered a
linear index, so that the pointers array can simply be dereferenced by
using the MPIDR[7:0] value.
On ARM multi-cluster systems, where the MPIDR may not be a linear index,
to properly dereference the stack pointer array, a mapping function should
be applied to it so that it can be used for arrays look-ups.
This patch adds code in the cpu_{suspend}/cpu_{resume} implementation
that relies on shifting and ORing hashing method to map a MPIDR value to a
set of buckets precomputed at boot to have a collision free mapping from
MPIDR to context pointers.
The hashing algorithm must be simple, fast, and implementable with few
instructions since in the cpu_resume path the mapping is carried out with
the MMU off and the I-cache off, hence code and data are fetched from DRAM
with no-caching available. Simplicity is counterbalanced with a little
increase of memory (allocated dynamically) for stack pointers buckets, that
should be anyway fairly limited on most systems.
Memory for context pointers is allocated in a early_initcall with
size precomputed and stashed previously in kernel data structures.
Memory for context pointers is allocated through kmalloc; this
guarantees contiguous physical addresses for the allocated memory which
is fundamental to the correct functioning of the resume mechanism that
relies on the context pointer array to be a chunk of contiguous physical
memory. Virtual to physical address conversion for the context pointer
array base is carried out at boot to avoid fiddling with virt_to_phys
conversions in the cpu_resume path which is quite fragile and should be
optimized to execute as few instructions as possible.
Virtual and physical context pointer base array addresses are stashed in a
struct that is accessible from assembly using values generated through the
asm-offsets.c mechanism.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Colin Cross <ccross@android.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
On ARM SMP systems, cores are identified by their MPIDR register.
The MPIDR guidelines in the ARM ARM do not provide strict enforcement of
MPIDR layout, only recommendations that, if followed, split the MPIDR
on ARM 32 bit platforms in three affinity levels. In multi-cluster
systems like big.LITTLE, if the affinity guidelines are followed, the
MPIDR can not be considered an index anymore. This means that the
association between logical CPU in the kernel and the HW CPU identifier
becomes somewhat more complicated requiring methods like hashing to
associate a given MPIDR to a CPU logical index, in order for the look-up
to be carried out in an efficient and scalable way.
This patch provides a function in the kernel that starting from the
cpu_logical_map, implement collision-free hashing of MPIDR values by checking
all significative bits of MPIDR affinity level bitfields. The hashing
can then be carried out through bits shifting and ORing; the resulting
hash algorithm is a collision-free though not minimal hash that can be
executed with few assembly instructions. The mpidr is filtered through a
mpidr mask that is built by checking all bits that toggle in the set of
MPIDRs corresponding to possible CPUs. Bits that do not toggle do not carry
information so they do not contribute to the resulting hash.
Pseudo code:
/* check all bits that toggle, so they are required */
for (i = 1, mpidr_mask = 0; i < num_possible_cpus(); i++)
mpidr_mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
/*
* Build shifts to be applied to aff0, aff1, aff2 values to hash the mpidr
* fls() returns the last bit set in a word, 0 if none
* ffs() returns the first bit set in a word, 0 if none
*/
fs0 = mpidr_mask[7:0] ? ffs(mpidr_mask[7:0]) - 1 : 0;
fs1 = mpidr_mask[15:8] ? ffs(mpidr_mask[15:8]) - 1 : 0;
fs2 = mpidr_mask[23:16] ? ffs(mpidr_mask[23:16]) - 1 : 0;
ls0 = fls(mpidr_mask[7:0]);
ls1 = fls(mpidr_mask[15:8]);
ls2 = fls(mpidr_mask[23:16]);
bits0 = ls0 - fs0;
bits1 = ls1 - fs1;
bits2 = ls2 - fs2;
aff0_shift = fs0;
aff1_shift = 8 + fs1 - bits0;
aff2_shift = 16 + fs2 - (bits0 + bits1);
u32 hash(u32 mpidr) {
u32 l0, l1, l2;
u32 mpidr_masked = mpidr & mpidr_mask;
l0 = mpidr_masked & 0xff;
l1 = mpidr_masked & 0xff00;
l2 = mpidr_masked & 0xff0000;
return (l0 >> aff0_shift | l1 >> aff1_shift | l2 >> aff2_shift);
}
The hashing algorithm relies on the inherent properties set in the ARM ARM
recommendations for the MPIDR. Exotic configurations, where for instance the
MPIDR values at a given affinity level have large holes, can end up requiring
big hash tables since the compression of values that can be achieved through
shifting is somewhat crippled when holes are present. Kernel warns if
the number of buckets of the resulting hash table exceeds the number of
possible CPUs by a factor of 4, which is a symptom of a very sparse HW
MPIDR configuration.
The hash algorithm is quite simple and can easily be implemented in assembly
code, to be used in code paths where the kernel virtual address space is
not set-up (ie cpu_resume) and instruction and data fetches are strongly
ordered so code must be compact and must carry out few data accesses.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Colin Cross <ccross@android.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Replace /include/ by #include for da850 device tree files, in order to
use the C pre-processor, making use of #define features possible.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
With this change, we no longer lose the innermost entry in the user-mode
part of the call chain. See also the x86 port, which includes the ip,
and the corresponding change in arch/arm.
Signed-off-by: Jed Davis <jld@mozilla.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This revamps the device tree to fit with the new clock
implementation and brings it quite a bit closer to how
the hardware actually works.
After this the clock implementation knows about all
clock gates and will gate off all unused clocks at
boot time and save a bit of power.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Book3E uses the hugepd at PMD level and don't encode pte directly
at the pmd level. So it will find the lower bits of pmd set
and the pmd_bad check throws error. Infact the current code
will never take the free_hugepd_range call at all because it will
clear the pmd if it find a hugepd pointer. Fix this by clearing
bad pmd only if it is not a hugepd pointer.
This is regression introduced by e2b3d202d1
"powerpc: Switch 16GB and 16MB explicit hugepages to a different page table format"
Reported-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvsJmAAoJEFBXWFqHsHzOHOIH/jjVCaAFdOskPI4d9qPPAt9C
5o0aJDjerzTm+vH2mbec2507fChaYrLybAypJUj6wDYRf03RhAgPXorY83Y+3WtG
SYz2UWza7MY8GeZv6e9tdrYS3JUSicFXPf8MsOcINsuyIub3dD96z36OqrnWZLFy
uH5V81e4gOHECd4PWIxmhdjwawqmwb/Pqzl0V3+vXi2JM07xrn7/SqlZ7VfUwM2q
DNhu5ugH7FtaFp75YrmTIhp6i+tovguRr0RIt6dnk/9gbJBQnV2Cw2MzdRPT12U5
bC79P7sojkKRtITcq9c1fnUNhkgc0+hS8HoezcQmzKMin6nFmVAh5wQFSlRJMJE=
=mZw+
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
imx soc changes for 3.11:
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
* tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (29 commits)
ARM: imx_v6_v7_defconfig: Enable Vybrid VF610
ARM: imx_v6_v7_defconfig: Enable imx-wm8962 by default
ARM: clk-imx6qdl: Add clko1 configuration for imx6qdl-sabresd
ARM: imx_v6_v7_defconfig: Enable PWM and backlight options
ARM: imx: Remove mxc specific ulpi access ops
ARM: imx: add initial support for VF610
ARM: imx: add VF610 clock support
ARM: imx_v6_v7_defconfig: enable parallel display
ARM: imx: clk: No need to initialize phandle struct
ARM: imx: irq-common: Include header to avoid sparse warning
ARM: imx: Enable mx6 solo-lite support
ARM: imx6: use common of_clk_init() call to initialize clocks
ARM: imx6q: call of_clk_init() to register fixed rate clocks
ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVE
ARM: i.MX6: clk: add different DualLite MLB clock config
ARM i.MX5: Add S/PDIF clocks
ARM i.MX53: Add SATA clock
ARM: imx6q: clk: add the eim_slow clock
ARM: imx: remove MLB PLL from pllv3
ARM: imx: disable pll8_mlb in mx6q_clks
...
Conflicts:
arch/arm/Kconfig.debug (simple add/add conflict)
Includes an update to 3.10-rc6
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* A bunch of new board additions, imx6sl-evk, vf610-twr, imx53-tx53,
imx53-m53evk and imx27-phytec-phycore
* Various pinctrl setting updates and additions
* Enable various on board peripherals, usb, audio, nor, display etc.
* Configure L2 cache data and tag latency from device tree
* Add imx-weim bus driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvsoqAAoJEFBXWFqHsHzOWCsIAIhbVAz9Q/HvRrrT2/viiu5G
S6/O16PbTqCmRPOgjnABGNOzRxo94/abhYT7gbGDz/zqAK2wEzEtUMwX8SXJbvl2
ynt4oX/QTgeQsZZXW+dCdet6XiBSJwfbFFo0c01pCBvPb7os739pO3u3CUvNeqKx
vsEfiq190PSPVL0FdfyLpQB+64ApUB1L/Ez9BaWmJjQYN2LWM0lxyvbC0SPo1vrw
eb8NJ7qz/qq3zXCKgD8LEvkfal4ZsezPYzap1sqKl1+T2aN4CsgzYaRra/wDv7BC
0ssW3+11StrwrbdwOEQRwiSU15fc9ckVldoFGlB+9HKTZxh80u0HmZRvFWbWo0E=
=jngF
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo:
imx device tree changes for 3.11:
* A bunch of new board additions, imx6sl-evk, vf610-twr, imx53-tx53,
imx53-m53evk and imx27-phytec-phycore
* Various pinctrl setting updates and additions
* Enable various on board peripherals, usb, audio, nor, display etc.
* Configure L2 cache data and tag latency from device tree
* Add imx-weim bus driver
* tag 'imx-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6: (82 commits)
ARM: dts: imx27: Add VPU devicetree node
ARM: mxc: fix gpio-ranges for VF610
ARM: dtsi: imx6qdl-sabresd: Enable WM8962 audio support
ARM: dtsi: imx6qdl-sabresd: Enable SSI2 and AUDMUX
ARM: dtsi: imx6qdl-sabresd: Add WM8962 CODEC support
ARM: dtsi: imx6qdl-sabresd: add a fixed regulator for WM8962
ARM: dtsi: imx6dl: Add a pinctrl for AUDMUX
ARM: dtsi: imx6q/imx6dl: Add a pinctrl for I2C1
ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration
ARM: dts: Phytec imx6q pfla02 and pbab01 support
ARM: dts: imx6q: Add pinctrl for usdhc2 and enet
ARM: dts: imx27-phytec-phycore-rdk: Add MTD name for NOR flash
ARM: dts: imx27-phytec-phycore-rdk: Add SDHC support
ARM: dts: i.MX27: Add SDHC devicetree nodes
ARM: dts: i.MX27: Add DMA devicetree node
ARM: dts: imx6qdl-sabreauto: enable the WEIM NOR
ARM: dts: imx6dl: add pinctrls for WEIM NOR
ARM: dts: imx6q: add pinctrls for WEIM NOR
ARM: dts: imx6qdl: add more information for WEIM
ARM: dts: imx6q{dl}: fix the pin conflict between SPI and WEIM
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* New SoCs i.MX6 Sololite and Vybrid VF610 support
* imx5 and imx6 clock fixes and additions
* Update clock driver to use of_clk_init() function
* Refactor restart routine mxc_restart() to get it work for DT boot
as well
* Clean up mxc specific ulpi access ops
* imx defconfig updates
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvsJmAAoJEFBXWFqHsHzOHOIH/jjVCaAFdOskPI4d9qPPAt9C
5o0aJDjerzTm+vH2mbec2507fChaYrLybAypJUj6wDYRf03RhAgPXorY83Y+3WtG
SYz2UWza7MY8GeZv6e9tdrYS3JUSicFXPf8MsOcINsuyIub3dD96z36OqrnWZLFy
uH5V81e4gOHECd4PWIxmhdjwawqmwb/Pqzl0V3+vXi2JM07xrn7/SqlZ7VfUwM2q
DNhu5ugH7FtaFp75YrmTIhp6i+tovguRr0RIt6dnk/9gbJBQnV2Cw2MzdRPT12U5
bC79P7sojkKRtITcq9c1fnUNhkgc0+hS8HoezcQmzKMin6nFmVAh5wQFSlRJMJE=
=mZw+
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
This is a dependency for imx/dt
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* A couple of new board support, cfa10055 and cfa10057
* A few updates on cfa10036 device tree source
* Some auart pinctrl data addition
* Adopt soc bus infrastructure for mach-mxs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRvwUEAAoJEFBXWFqHsHzOZXgH/jYs9okBIb6UtYegmdGUinCD
VHJJT+RT8ceosMjBt+aBfpKplUG1X3OOoWbpU7Uv5JKNfY+0QbYTr4bdSE0YTF19
/ml5lCLLqW1MouErxIIe9yFrs4ZhZLLuW0Uy+ze7XVO/VPUlmJWYGU4D5gLcN+SH
aDdwAfe0SEydxWKp5euh6O2qPuuOro5/kUOPvYs6xaJj3marWkD9M6YyhaWvaFwF
2iUWzSd6dGabHRYwG2r38IlKMo6xncnu3b1NPifVMiPtiHFJ8t0SyTEGmpq19G+x
G6q0TneOUVIgH0PN4YQoCGOR6oAB52Z/dVTVlGx6LE6w9Q95wI3XNHltP5U+bF0=
=Oeyn
-----END PGP SIGNATURE-----
Merge tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo:
mxs device tree changes for 3.11:
* A couple of new board support, cfa10055 and cfa10057
* A few updates on cfa10036 device tree source
* Some auart pinctrl data addition
* Adopt soc bus infrastructure for mach-mxs
* tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: dt: Add Crystalfontz CFA-10057 device tree
ARM: mxs: dt: Add the Crystalfontz CFA-10055 device tree
ARM: cfa10049: Switch the chip select pin of the LCD controller
ARM: cfa10036: Add USB0 OTG port
ARM: dts: apf28dev: Add touchscreen support for APF28dev
ARM: mxs: Fix UARTs on M28EVK
ARM: cfa10036: dt: Change i2c0 clock frequency
ARM: dts: cfa10036: Change the OLED display to SSD1306
ARM: mx28: add auart4 2 pins pinmux to imx28.dtsi
ARM: mx28: add auart3 2 pins pinmux to imx28.dtsi
ARM: mx28: add auart2 2 pins pinmux to imx28.dtsi
ARM: mxs: Use soc bus infrastructure
ARM: dts: mx28: Adjust the digctl compatible string
ARM: mxs: Remove init_irq declaration in machine description
Includes an update to 3.10-rc6
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add devicetree support to timer, pinctrl (probe), I2C block,
watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJRvvkdAAoJEEEQszewGV1zqjQQAMFYxb4B0c2YweNzDzWjuWM/
STZNyAV62LcE7GvssFYpeJ/+lrB7tNwgplJQ13uluEdFws2Xd63G+qIVznkBE7rW
+ZLHG+MPi/uia2yYcg9Vz1M42Aj5COuu1q6ex9OfR2v/tX3G2G/rjIzAaiiEvWWd
ljcBGlDh41iphY6dsBtFFXR0b9rzzyhhmY5wS1P+bMyl9YlqYp0x0oznLo5eFTlA
9ad9H0oeYYXCcB0V5UI1wsRGCaJqa04xotb6uqn1TUPpVc9ZpYQUkVI/1Fb3gVez
3MrLW2/9tDfXWUOTZTo9VtC4rpbmGSsvBc3C0IUGEj9ovmWTCA/OU/WXsEOAymb9
+F36wMX07z8OmmebBn06s6/Zhy0ht9BoV+NeW4lz3s3uiuE3vxnaxW/kb845xfUI
7o87kV8DpXuEokNP+jYyCDJTw/feq5Dy0HXr4KFOAwXMd3imRREnHgvihCsFtNj4
vRkz+6A17YrtpuvCqnuXiM5Ts+Dz4MAEJ/Iokrm1e28fUw/wuklAXeII8+kxc36R
w6AHTbXpWPjglVAn3DTuh4BjIoN53/cLhttezg7NcgtgRW3AxyHGx3T+345mHsgT
dbust8Qow/bapby8NPHKJDHM5A9RGNWX4rJ+abTxI0iJ0fpcEWT1c5TKlpUR+0KZ
qMTNGvDfonu1xaoPLo81
=fstd
-----END PGP SIGNATURE-----
Merge tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc
From Linus Walleij:
Device Tree and Multiplatform support for U300:
- Add devicetree support to timer, pinctrl (probe), I2C block,
watchdog, DMA controller and clocks.
- Piecewise add a device tree containing all peripherals.
- Delete the ATAG boot path.
- Delete redundant platform data and board files.
- Convert to multiplatform.
* tag 'u300-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (40 commits)
ARM: u300: switch to using syscon regmap for board
ARM: u300: Update MMC configs for u300 defconfig
spi: pl022: use DMA by default when probing from DT
pinctrl: get rid of all platform data for coh901
ARM: u300: convert MMC/SD clock to device tree
ARM: u300: move the gated system controller clocks to DT
i2c: stu300: do not request a specific clock name
clk: move the U300 fixed and fixed-factor to DT
ARM: u300: remove register definition file
ARM: u300: add syscon node
ARM: u300 use module_spi_driver to register driver
ARM: u300: delete remnant machine headers
ARM: u300: convert to multiplatform
ARM: u300: localize <mach/u300-regs.h>
ARM: u300: delete <mach/irqs.h>
ARM: u300: delete <mach/hardware.h>
ARM: u300: push down syscon registers
ARM: u300: remove deps from debug macro
ARM: u300: move debugmacro to debug includes
ARM: u300: delete all static board data
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The branch contains:
- DT uart handling cleanup
- Support for zc706 and zed board
- Removal of board compatible string
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iEYEABECAAYFAlG+ysgACgkQykllyylKDCENewCgk3LUwpMxepV1JOaNBmUJ0A09
jtMAnA395sve+FBxYjfM+nSAmbnl5RYl
=KBrZ
-----END PGP SIGNATURE-----
Merge tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx into next/dt
From Michal Simek:
arm: Xilinx Zynq dt changes for v3.11
The branch contains:
- DT uart handling cleanup
- Support for zc706 and zed board
- Removal of board compatible string
* tag 'zynq-dt-for-3.11' of git://git.xilinx.com/linux-xlnx:
arm: dt: zynq: Add support for the zed platform
arm: dt: zynq: Add support for the zc706 platform
arm: dt: zynq: Use 'status' property for UART nodes
arm: zynq: Remove board specific compatibility string
clk: zynq: Remove deprecated clock code
arm: zynq: Migrate platform to clock controller
clk: zynq: Add clock controller driver
clk: zynq: Factor out PLL driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch contains two fixes:
- Fix zynq smp code
- Do not specify init_irq ptr
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iEYEABECAAYFAlG+pu4ACgkQykllyylKDCEEdwCcCfP7JyGt58zpJWPJOqiS9WQO
uLkAnjDZbMSgcHfOKZTrRgSdpdWnss1C
=njE0
-----END PGP SIGNATURE-----
Merge tag 'zynq-cleanup-for-3.11' of git://git.xilinx.com/linux-xlnx into next/cleanup
From Michal Simek:
arm: Xilinx Zynq cleanup patches for v3.11
This branch contains two fixes:
- Fix zynq smp code
- Do not specify init_irq ptr
* tag 'zynq-cleanup-for-3.11' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: Not to rewrite jump code when starting address is 0x0
ARM: zynq: Remove init_irq declaration in machine description
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
I got a build error today that made me realize that it is not
possible to build a kernel for a SiRF platform without enabling
CONFIG_PRIMA2, since a lot of common code depends on CONFIG_PRIMA2.
This fixes all occurences that appear like common SiRF code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
- Pulls the Integrator/AP PCI bridge driver into one file
- Adds full device tree support for it
- Keeps ATAG support around for the time being
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJRvMzZAAoJEEEQszewGV1zUQUQAJbES7DXw+lPSIYaI6MFEFJa
SHAD0T3J91ya5chawMC4U5g60734Q8K1k052KpIPNoBBby7spve2zklON8wCVWnj
ta5TAzDQy+T5TRMpIap6bhvMJQQw+qvTCbxIYivb4WtaBgByBXfJCyCiKjJ+yX28
KQlyMIqrH8G1GyItC1e4gnUP9KJb9djT51nRL6asvLcD4/Cf9OJadXUCAUmwHDWK
PUvZm5R8zDFnwNTh5tIrTuac4rY/vsJd2PLvbsai9hghOwhUT6I+pHpP2snUq+0e
77+K4LnOIbh9nNMATJHgP6iSLjc8ncfPwCGmf27bA968am9arYJMnX8sKFTNms9s
n1qvaOQnYclrujX2Sy25PXBc/3FCoVP0e2nNzG3e7fdn3gVQDrmSw1ag7/vTDbS5
kFrWjJFnr6Sxy3FthzTwWGgb4IHIRTZg+MuHjjyf4iSq14IGZoHal9n/GvGL3MUL
G5o1lvxXBC9UKYslUmfvYM1yIMzUqSxYs09d96KRHF+XGNnk0GaMgUqfXqFb33JH
HocHqevH+WGgach6Qqgop7ZGrdjOe75wDn03yIgM29SL4WKtFbfY0KPySBFqHPd/
RNCwFQZo1N8rhbfB/sCFDVAAZfbbQxomID8p5KAvD0IaVIiE9eLbSgJdDQR0o148
lFhe+9QCIRQkiLmYc+Sf
=bzpe
-----END PGP SIGNATURE-----
Merge tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
From Linus Walleij:
This is a patch series that:
- Pulls the Integrator/AP PCI bridge driver into one file
- Adds full device tree support for it
- Keeps ATAG support around for the time being
* tag 'integrator-pci-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: basic PCIv3 device tree support
ARM: integrator: move static ioremapping into PCIv3 driver
ARM: integrator: move VGA base assignment
ARM: integrator: remap PCIv3 base dynamically
ARM: integrator: move V3 register definitions into driver
ARM: integrator: move PCI base address grab to probe
ARM: integrator: grab PCI error IRQ in probe()
ARM: integrator: convert PCIv3 bridge to platform device
ARM: integrator: merge PCIv3 driver into one file
ARM: pci: create pci_common_init_dev()
Documentation/devicetree: add a small note on PCI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
USB Host PHY clock on port 2 must be configured to 19.2MHz.
Provide this information.
Cc: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
On Panda the +5V supply for DVI EDID is supplied by the
same regulator that poweres the USB Hub. Currently, the
DSS/DVI subsystem doesn't know how to manage this regulator
and so DVI EDID reads will fail if USB Hub is not enabled.
As a temporary fix we keep this regulator permanently enabled
on boot. This fixes the DVI EDID read problem.
CC: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Provide the RESET and Power regulators for the USB PHY,
the USB Host port mode and the PHY device.
Also provide pin multiplexer information for the USB host
pins.
HACK: The reset control need to be replaced with the proper
gpio-controlled reset driver as soon it will be merged [1].
[1] http://thread.gmane.org/gmane.linux.drivers.devicetree/36830
Signed-off-by: Roger Quadros <rogerq@ti.com>
[benoit.cousson@linaro.org: Add disclaimer about the reset control
inside changelog and code]
Cc: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
We are in the process of removing all the __cpuinit annotations.
While working on making that change, an existing problem was
made evident:
WARNING: arch/x86/kernel/built-in.o(.text+0x198f2): Section mismatch
in reference from the function cpu_init() to the function
.init.text:load_ucode_ap() The function cpu_init() references
the function __init load_ucode_ap(). This is often because cpu_init
lacks a __init annotation or the annotation of load_ucode_ap is wrong.
This now appears because in my working tree, cpu_init() is no longer
tagged as __cpuinit, and so the audit picks up the mismatch. The 2nd
hypothesis from the audit is the correct one, as there was an incorrect
__init tag on the prototype in the header (but __cpuinit was used on
the function itself.)
The audit is telling us that the prototype's __init annotation took
effect and the function did land in the .init.text section. Checking
with objdump on a mainline tree that still has __cpuinit shows that
the __cpuinit on the function takes precedence over the __init on the
prototype, but that won't be true once we make __cpuinit a no-op.
Even though we are removing __cpuinit, we temporarily align both
the function and the prototype on __cpuinit so that the changeset
can be applied to stable trees if desired.
[ hpa: build fix only, no object code change ]
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: stable <stable@vger.kernel.org> # 3.9+
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Link: http://lkml.kernel.org/r/1371654926-11729-1-git-send-email-paul.gortmaker@windriver.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Provide a vdso_install target in the arm64 Makefile, as other architectures
with a vdso do.
Signed-off-by: Kyle McMartin <kyle@redhat.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
We need to pick up the definition of raw_smp_processor_id() from
asm/smp.h. For the !SMP case, we need to supply a definition of
raw_smp_processor_id().
Because of the include dependencies we cannot use smp_call_func_t in
asm/smp.h, but we do need linux/thread_info.h
Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull sparc fixes from David Miller:
"Various sparc bug fixes, in particular:
1) TSB hashes have to be flushed before TLB on sparc64, from Dave
Kleikamp.
2) LEON timer interrupts can get stuck, from Andreas Larsson.
3) Sparc64 needs to handle lack of address-congruence devicetree
property, from Bob Picco"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc: tsb must be flushed before tlb
sparc,leon: Convert to use devm_ioremap_resource
sparc64 address-congruence property
sparc32, leon: Enable interrupts before going idle to avoid getting stuck
sparc32, leon: Remove separate "ticker" timer for SMP
sparc: kernel: using strlcpy() instead of strcpy()
arch: sparc: prom: looping issue, need additional length check in the outside looping
sparc: remove inline marking of EXPORT_SYMBOL functions
sparc: Switch to asm-generic/linkage.h
Pull parisc fixes from Helge Deller:
"This contains a kernel segfault fix when reading /proc/kpageflags or
/proc/kpagecount, two fixes for the serial port and PCI graphic card
support on C8000 workstations and a fix to use unshadowed registers
for flushing D- and I-caches."
* 'parisc-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Use unshadowed index register for flush instructions in flush_dcache_page_asm and flush_icache_page_asm
parisc: provide pci_mmap_page_range() for parisc
parisc: fix serial ports on C8000 workstation
parisc: fix kernel BUG at arch/parisc/include/asm/mmzone.h:50 (part 2)
Commit 106c992a5e ("mm/hugetlb: add more arch-defined huge_pte
functions") added an include of <asm-generic/hugetlb.h> to each
architecture's <asm/hugetlb.h> (except s390). Unfortunately metag was
missed which resulted in build errors when hugetlbfs is enabled (see
below).
Add the include for metag too to fix the build errors:
mm/hugetlb.c In function 'make_huge_pte':
mm/hugetlb.c +2250 : error: implicit declaration of function 'huge_pte_mkwrite'
mm/hugetlb.c +2250 : error: implicit declaration of function 'huge_pte_mkdirty'
...
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Michal Hocko <mhocko@suse.cz>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Pull ARM fixes from Russell King:
"The larger changes this time are
- "ARM: 7755/1: handle user space mapped pages in flush_kernel_dcache_page"
which fixes more data corruption problems with O_DIRECT
- "ARM: 7759/1: decouple CPU offlining from reboot/shutdown" which
gets us back to working shutdown/reboot on SMP platforms
- "ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect"
which fixes a shutdown regression found in v3.10 on Versatile
Express platforms.
The remainder are the quite small, maybe one or two line changes"
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7759/1: decouple CPU offlining from reboot/shutdown
ARM: 7756/1: zImage/virt: remove hyp-stub.S during distclean
ARM: 7755/1: handle user space mapped pages in flush_kernel_dcache_page
ARM: 7754/1: Fix the CPU ID and the mask associated to the PJ4B
ARM: 7753/1: map_init_section flushes incorrect pmd
ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect
The Armada 370 RD board has two internal mini-PCIe connectors. This
commit adds the necessary Device Tree informations to enable the usage
of those mini-PCIe connectors.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With git commit 996b4a7d "s390/mem_detect: remove artificial kdump
memory types" the memory detection code got simplified.
As a side effect the array that describes memory chunks may now
contain empty (zeroed) entries.
All call sites can handle this except for
drivers/s390/char/zcore.c::zcore_memmap_open
which has a really odd user space interface. The easiest fix is to
change the memory hole handling code, so that no empty entries exist
before the last valid entry is reached.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Add the required pin configuration support to EXYNOS5420
using pinctrl interface.
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Tested-by : Sunil Joshi <joshi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
62edab905 changed the argument to notify_die() from dr6 to &dr6,
but weirdly, used PTR_ERR() to cast it to a long. Since dr6 is
on the stack, this is an abuse of PTR_ERR(). Cast to long, as
per kernel standard.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Cc: K.Prasad <prasad@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/r/1371357768-4968-8-git-send-email-rusty@rustcorp.com.au
Signed-off-by: Ingo Molnar <mingo@kernel.org>
mem-loads is basically the same as Sandy Bridge,
but we use a separate string for changes later.
Haswell doesn't support the full precise store mode,
so we emulate it using the "DataLA" facility.
This allows to do everything, but for data sources we
can only detect L1 hit or not.
There is no explicit enable bit anymore, so we have
to tie it to a perf internal only flag.
The address is supported for all memory related PEBS
events with DataLA. Instead of only logging for the
load and store events we allow logging it for all
(it will be simply 0 if the current event does not
support it)
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-7-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Haswell has two additional LBR from flags for TSX: in_tx and
abort_tx, implemented as a new "v4" version of the LBR format.
Handle those in and adjust the sign extension code to still
correctly extend. The flags are exported similarly in the LBR
record to the existing misprediction flag
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-6-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This avoids some problems with spurious PMIs on Haswell.
Haswell seems to behave more like P4 in this regard. Do
the same thing as the P4 perf handler by unmasking
the NMI only at the end. Shouldn't make any difference
for earlier family 6 cores.
(Tested on Haswell, IvyBridge, Westmere, Saltwell (Atom).)
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-5-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add simple PEBS support for Haswell.
The constraints are similar to SandyBridge with a few new
events.
Reviewed-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-4-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Similar to SandyBridge, but has a few new events and two
new counter bits.
There are some new counter flags that need to be prevented
from being set on fixed counters, and allowed to be set
for generic counters.
Also we add support for the counter 2 constraint to handle
all raw events.
(Contains fixes from Stephane Eranian.)
Reviewed-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add support for the Haswell extended (fmt2) PEBS format.
It has a superset of the nhm (fmt1) PEBS fields, but has a
longer record so we need to adjust the code paths.
The main advantage is the new "EventingRip" support which
directly gives the instruction, not off-by-one instruction. So
with precise == 2 we use that directly and don't try to use LBRs
and walking basic blocks. This lowers the overhead of using
precise significantly.
Some other features are added in later patches.
Reviewed-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Andi Kleen <ak@linux.jf.intel.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Link: http://lkml.kernel.org/r/1371515812-9646-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The DR registers are rarely useful when decoding oopses.
With screen real estate during oopses at a premium, we can save
two lines by only printing out these registers when they are set
to something other than they power-on state.
Signed-off-by: Dave Jones <davej@redhat.com>
Acked-by: Borislav Petkov <bp@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20130618160911.GA24487@redhat.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Pull RCU changes from Paul E. McKenney:
"The major changes for this series are:
1. Simplify RCU's grace-period and callback processing based on
the new numbering for callbacks. These were posted to LKML at
https://lkml.org/lkml/2013/5/20/330.
2. Documentation updates. These were posted to LKML at
https://lkml.org/lkml/2013/5/20/348.
3. Miscellaneous fixes, including converting a few remaining printk()
calls to pr_*(). These were posted to LKML at
https://lkml.org/lkml/2013/5/20/324.
4. SRCU-related changes and fixes. These were posted to LKML at
https://lkml.org/lkml/2013/5/20/425.
5. Removal of TINY_PREEMPT_RCU in favor of TREE_PREEMPT_RCU for
single-CPU low-latency systems. These were posted to LKML at
https://lkml.org/lkml/2013/5/20/427."
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Implement a perf PMU to handle IOMMU performance counters and events.
The PMU only supports counting mode (e.g. perf stat). Since the counters
are shared across all cores, the PMU is implemented as "system-wide" mode.
To invoke the AMD IOMMU PMU, issue a perf tool command such as:
./perf stat -a -e amd_iommu/<events>/ <command>
or:
./perf stat -a -e amd_iommu/config=<config-data>,config1=<config1-data>/ <command>
For example:
./perf stat -a -e amd_iommu/mem_trans_total/ <command>
The resulting count will be how many IOMMU total peripheral memory
operations were performed during the command execution window.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1370466709-3212-3-git-send-email-suravee.suthikulpanit@amd.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Most of the stuff from kernel/sched.c was moved to kernel/sched/core.c long time
back and the comments/Documentation never got updated.
I figured it out when I was going through sched-domains.txt and so thought of
fixing it globally.
I haven't crossed check if the stuff that is referenced in sched/core.c by all
these files is still present and hasn't changed as that wasn't the motive behind
this patch.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/cdff76a265326ab8d71922a1db5be599f20aad45.1370329560.git.viresh.kumar@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
intel_pmu_handle_irq() has a warning in it if it does too many
loops. It is a WARN_ONCE(), but the perf_event_print_debug()
call beneath it is unconditional. For the first warning, you get
a nice backtrace and message, but subsequent ones just dump the
PMU state with no leading messages. I doubt this is what was
intended.
This patch will only print the PMU state when paired with the
WARN_ON() text. It effectively open-codes WARN_ONCE()'s
one-time-only logic.
My suspicion is that the code really just wants to make sure we
do not sit in the loop and spit out a warning for every loop
iteration after the 100th. From what I've seen, this is very
unlikely to happen since we also clear the PMU state.
After this patch, instead of seeing the PMU state dumped each
time, you will just see:
[57494.894540] perf_event_intel: clearing PMU state on CPU#129
[57579.539668] perf_event_intel: clearing PMU state on CPU#10
[57587.137762] perf_event_intel: clearing PMU state on CPU#134
[57623.039912] perf_event_intel: clearing PMU state on CPU#114
[57644.559943] perf_event_intel: clearing PMU state on CPU#118
...
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20130530174559.0DB049F4@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
x86_schedule_events() caches event constraints on the stack during
scheduling. Given the number of possible events, this is 512 bytes of
stack; since it can be invoked under schedule() under god-knows-what,
this is causing stack blowouts.
Trade some space usage for stack safety: add a place to cache the
constraint pointer to struct perf_event. For 8 bytes per event (1% of
its size) we can save the giant stack frame.
This shouldn't change any aspect of scheduling whatsoever and while in
theory the locality's a tiny bit worse, I doubt we'll see any
performance impact either.
Tested: `perf stat whatever` does not blow up and produces
results that aren't hugely obviously wrong. I'm not sure how to run
particularly good tests of perf code, but this should not produce any
functional change whatsoever.
Signed-off-by: Andrew Hunter <ahh@google.com>
Reviewed-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1369332423-4400-1-git-send-email-ahh@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This allows us to use pdev->name for registering a PMU device.
IMO the name is not supposed to be changed anyway.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1370339148-5566-1-git-send-email-mjonker@synopsys.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This patch fixes broken support of PEBS-LL on SNB-EP/IVB-EP.
For some reason, the LDLAT extra reg definition for snb_ep
showed up as duplicate in the snb table.
This patch moves the definition of LDLAT back into the
snb_ep table.
Thanks to Don Zickus for tracking this one down.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20130607212210.GA11849@quad
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Add AM43x ePOS EVM minimal DT source - this is a minimal one to get
it booting. Also include it in omap2plus dtbs and document bindings.
The hardware is under development.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
Add bandgap device DT entry for OMAP5 dtsi.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: J Keerthy <j-keerthy@ti.com>
[benoit.cousson@linaro.org: Fix alignement and use the macros
for IRQ attributes]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
