A significant part of the changes for these two platforms went into
power management, so they are split out into a separate branch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIVAwUATwtaEmCrR//JCVInAQIUqBAAkqKDGCyKmC2nDfz5ejYNUvugkDxgYv5I
fl9UUfBc2cLDVyOynzjH9SLTphVAI8jZa0KZAlvB8/+4Wcg7XNhUFPDH868zlPzP
mSsPPTnb3WJTqb1PLKi7oTbA7CfsX/srRaAtrEX7Nng7uGTZZq+5RL6mOR/bqHyR
F/VuV5U9HkDjgM7T7NtcNMqP9ysHDSrcNDse62yKh8FLot59rqXEEXZWTIYZphbI
v+BURp4EHs5Wm5AVJbpGmWhk4+NgRCLE0ZKZlfxnJctFz5+bW11TX/85ua+UXtmt
Fnij44jSmAzbQ1o0VLbN760iBsbPN/JElYWXwIqR6v5M+Hd2UDRm3a6Bc1xqUNx0
0C8DEoo78XebhldAsN1TL/V94j1ojuNyWC7qkn9VBZLTiVYPyV/oeIdxtR19u1lB
QctpXeUPCfdDyD+wAWbqid0MExayP3TAwJ5vK8Tw+ssIv3A19RkUI6kdGaW4RqyL
5n5o7Ze4CGOzrthWuyfw5flKbjRUrmtLO6TTgPZKCwxeiQh3G1GJcCL6lKbGbH3M
Z8jNWzEMMExZU+55P8hRrtNgnx6rqn2bWi/3cCSmuKB6KHBUWXfKJw3rmTcWOsLB
aNSXqYoWtTK9hJ0zo1xIAGmnJlfrO9I66abCuHHjDKVh1W5j7zmZwrj4ErUuS/dO
UHOmrQN/GOY=
=P4kO
-----END PGP SIGNATURE-----
Merge tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
power management changes for omap and imx
A significant part of the changes for these two platforms went into
power management, so they are split out into a separate branch.
* tag 'pm' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (65 commits)
ARM: imx6: remove __CPUINIT annotation from v7_invalidate_l1
ARM: imx6: fix v7_invalidate_l1 by adding I-Cache invalidation
ARM: imx6q: resume PL310 only when CACHE_L2X0 defined
ARM: imx6q: build pm code only when CONFIG_PM selected
ARM: mx5: use generic irq chip pm interface for pm functions on
ARM: omap: pass minimal SoC/board data for UART from dt
arm/dts: Add minimal device tree support for omap2420 and omap2430
omap-serial: Add minimal device tree support
omap-serial: Use default clock speed (48Mhz) if not specified
omap-serial: Get rid of all pdev->id usage
ARM: OMAP2+: hwmod: Add a new flag to handle hwmods left enabled at init
ARM: OMAP4: PRM: use PRCM interrupt handler
ARM: OMAP3: pm: use prcm chain handler
ARM: OMAP: hwmod: add support for selecting mpu_irq for each wakeup pad
ARM: OMAP2+: mux: add support for PAD wakeup interrupts
ARM: OMAP: PRCM: add suspend prepare / finish support
ARM: OMAP: PRCM: add support for chain interrupt handler
ARM: OMAP3/4: PRM: add functions to read pending IRQs, PRM barrier
ARM: OMAP2+: hwmod: Add API to enable IO ring wakeup
ARM: OMAP2+: mux: add wakeup-capable hwmod mux entries to dynamic list
...
Add device tree based discovery support for Samsung's uart controller.
Cc: Ben Dooks <ben-linux@fluff.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adapt the driver to device tree and pass minimal platform
data from device tree needed for console boot.
No power management features will be suppported for now
since it requires more tweaks around OCP settings
to toggle forceidle/noidle/smartidle bits and handling
remote wakeup and dynamic muxing.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Generic bindings for RS485 feature included in some UARTs.
Those bindings have to be used withing an UART device tree node.
Documentation updated to link to the bindings definition.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Advertise the possibility to use this driver with device tree if
CONFIG_OF is set.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
With the recent switch of the (currently still out-of-tree) Nios2 Linux
port to devicetree we want to be able to retrieve the resources and
properties from dts.
The old method to retrieve resources and properties from platform data
is still supported.
Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>