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Commit Graph

11037 Commits

Author SHA1 Message Date
Michael Ellerman
8feaeca23a [POWERPC] Cleanup pseries smp initialisation code
Move some extern declarations from setup.c into the new pseries.h.
While we're at it, provide dummy implementations for !SMP, to avoid
cluttering the C file with more #ifdefs.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-14 11:50:03 +11:00
Michael Ellerman
577830b034 [POWERPC] Consolidate pseries platform header files into pseries.h
Following the example of platforms/pasemi, consolidate a couple of
tiny header files in platforms/pseries into pseries.h.

This gives us a convenient place to put things that need to be
available to the platform code, but not public. And hopefully will
help people resist the temptation of sticking externs in C files.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-14 11:50:03 +11:00
Paul Mackerras
944b380e0c Merge branch 'cell-merge' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arnd/cell-2.6 2007-02-14 11:33:39 +11:00
Linus Torvalds
463020ce42 Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Fix sigset_t endianess swapping issues in 32-bit compat code.
  [MIPS] Fix uniprocessor Sibyte builds.
  [MIPS] Make entry.S a little more readable.
  [MIPS] Remove stray instruction from __get_user_asm_ll32.
  [MIPS] 32-bit: Fix warning about cast for fetching pointer from userspace.
  [MIPS] DECstation: Fix irq handling
  [MIPS] signals: make common _BLOCKABLE macro
  [MIPS] signal: Move sigframe definition for native O32/N64 into signal.c
  [MIPS] signal: Move {restore,setup}_sigcontext prototypes to their user
  [MIPS] signal: Fix warnings in o32 compat code.
  [MIPS] IP27: Enable N32 support in defconfig.
  Revert "[MIPS] Fix warning in get_user when fetching pointer object from userspace."
  [MIPS] Don't claim we support dma_declare_coherent_memory - we don't.
  [MIPS] Unify dma-{coherent,noncoherent.ip27,ip32}
  [MIPS] Improve branch prediction in ll/sc atomic operations.
2007-02-13 16:12:23 -08:00
Ralf Baechle
431dc80403 [MIPS] Fix sigset_t endianess swapping issues in 32-bit compat code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:51 +00:00
Andrew Sharp
366d6aef28 [MIPS] Fix uniprocessor Sibyte builds.
Signed-off-by: Andrew Sharp <tigerand@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:51 +00:00
Franck Bui-Huu
7da8a581f5 [MIPS] Make entry.S a little more readable.
When CONFIG_PREEMPT is not set, it also moves one branch instruction from
ret_from_irq() to ret_from_exception().  Therefore we favour the return
from irq case which should be more common than the other one.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:51 +00:00
Atsushi Nemoto
d01f06ef0c [MIPS] DECstation: Fix irq handling
When I post a patch (commit f431baa55a),
I just tried to not change behavior of existing codes, but it seems
dec/int-handler.S had been broken since its previous commit
937a801576.

The caller of plat_irq_dispatch do setup/restore TI_REGS($28), so
dec's plat_irq_dispatch should not do it, and there is no need to
adjust RA.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:51 +00:00
Franck Bui-Huu
24c556e99e [MIPS] signals: make common _BLOCKABLE macro
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:51 +00:00
Ralf Baechle
6668058346 [MIPS] signal: Move sigframe definition for native O32/N64 into signal.c
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:50 +00:00
Ralf Baechle
205d84aaea [MIPS] signal: Move {restore,setup}_sigcontext prototypes to their user
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:50 +00:00
Ralf Baechle
dd02f06aa9 [MIPS] signal: Fix warnings in o32 compat code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:50 +00:00
Ralf Baechle
af3d10d52d [MIPS] IP27: Enable N32 support in defconfig.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:50 +00:00
Ralf Baechle
9a88cbb522 [MIPS] Unify dma-{coherent,noncoherent.ip27,ip32}
Platforms will now have to supply a function dma_device_is_coherent which
returns if a particular device participates in the coherence domain.  For
most platforms this function will always return 0 or 1.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-13 22:40:50 +00:00
Kumar Gala
fff5f52808 Merge branch '85xx' into for_paulus 2007-02-13 16:14:01 -06:00
Becky Bruce
02ed82ccc5 [POWERPC] 85xx: Drop use of SYNC macro in head_fsl_booke.S
Eliminate needless invocation of the SYNC macro (which always evaluates to
nothing on BookE) from head_fsl_booke.S (for both arch/ppc & arch/powerpc).

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-13 16:13:27 -06:00
Maynard Johnson
c7eb734766 [POWERPC] cell: pm_rtas_activat_signals routine cleanup
The code was setting up the debug bus for group 21 when profiling on the
event PPU CYCLES.  The debug bus is not actually used by the hardware
performance counters when counting PPU CYCLES.  Setting up the debug bus
for PPU CYCLES causes signal routing conflicts on the debug bus when
profiling PPU cycles and another PPU event.  This patch fixes the code to
only setup the debug bus to route the performance signals for the non
PPU CYCLE events.

Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 22:03:07 +01:00
Carl Love
bcb63e25ed [POWERPC] cell: PPU Oprofile cleanup patch
This is a clean up patch that includes the following changes:

 -Some comments were added to clarify the code based on feedback
  from the community.
 -The write_pm_cntrl() and set_count_mode() were passed a
  structure element from a global variable.  The argument was
  removed so the functions now just operate on the global directly.
 -The set_pm_event() function call in the cell_virtual_cntr()
  routine was moved to a for-loop before the for_each_cpu loop

Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 22:03:06 +01:00
Masato Noguchi
128b8546a8 [POWERPC] spufs: avoid accessing kernel memory through mmapped /mem node
I found an exploit in current kernel.
Currently, there is no range check about mmapping "/mem" node in
spufs. Thus, an application can access privilege memory region.

In case this kernel already worked on a public server, I send this
information only here.
If there are such servers in somewhere, please replace it, ASAP.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:43 +01:00
Christoph Hellwig
2eb1b12049 [POWERPC] spu sched: static timeslicing for SCHED_RR contexts
For SCHED_RR tasks we can do some really trivial timeslicing.  Basically
we fire up a time for every scheduler tick that searches for a higher
or same priority thread that is on the runqueue and if there is one
context switches to it.  Because we can't lock spus from timer context
we actually run this from a delayed runqueue instead of a timer.

A nice optimization would be to skip the actual priority bitmap search
when there are less contexts than physical spus available.  To implement
this I need a so far unpublished patch from Andre, and it will be added
after we have that patch in.

Note that right now we only do the time slicing for SCHED_RR tasks.
The code would work for SCHED_OTHER tasks aswell, but their prio
value is defered from the one the PPU thread has at time of spu_run,
and using this for spu scheduling decisions would make the code very
unfair.  SCHED_OTHER support will be enabled once we the spu scheduler
knows how to calculcate cpu_context.prio (very soon)

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:43 +01:00
Christoph Hellwig
72cb360839 [POWERPC] spu sched: use DECLARE_BITMAP
use DECLARE_BITMAP in the spu scheduler instead of reimplementing it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:42 +01:00
Christoph Hellwig
52f04fcf66 [POWERPC] spu sched: forced preemption at execution
If we start a spu context with realtime priority we want it to run
immediately and not wait until some other lower priority thread has
finished.  Try to find a suitable victim and use it's spu in this
case.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:42 +01:00
Christoph Hellwig
ae7b4c5284 [POWERPC] spu sched: update some comments
Give spu_yield a kerneldoc comment and remove the old comment
documenting spu_activate, spu_deactive and spu_yield as all of them
now have descriptive kerneldoc comments of their own.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:42 +01:00
Christoph Hellwig
678b2ff1e6 [POWERPC] spu sched: simplity spu_remove_from_active_list
If we call spu_remove_from_active_list that spu is always guaranteed
to be on the active list and in runnable state, so we can simply
do a list_del to remove it and unconditionally take the was_active
codepath.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:41 +01:00
Christoph Hellwig
26bec67386 [POWERPC] spufs: optimize spu_run
There is no need to directly wake up contexts in spu_activate when
called from spu_run, so add a flag to surpress this wakeup.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:41 +01:00
Christoph Hellwig
079cdb6161 [POWERPC] spufs: runqueue simplification
This is the biggest patch in this series, and it reworks the guts of
the spu scheduler runqueue mechanism:

 - instead of embedding a waitqueue in the runqueue there is now a
   simple doubly-linked list, the actual wakeups happen by reusing
   the stop_wq in the spu context (maybe we should rename it one day)
 - spu_free and spu_prio_wakeup are merged into a single spu_reschedule
   function
 - various functionality is split out into small helpers, and kerneldoc
   comments are added in various places to document what's going on.
 - spu_activate is rewritten into a tight loop by removing test for
   various impossible conditions and using the infrastructure in this
   patch.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:41 +01:00
Christoph Hellwig
8389998ae9 [POWERPC] spufs: move prio to spu_context
It doesn't make any sense to have a priority field in the physical spu
structure.  Move it into the spu context instead.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:40 +01:00
Christoph Hellwig
6a0641e510 [POWERPC] spufs: state_mutex cleanup
Various cleanups in code surrounding the state semaphore:

 - inline spu_acquire/spu_release
 - cleanup spu_acquire_* and add kerneldoc comments to these functions
 - remove spu_release_exclusive and replace it with spu_release

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:55:40 +01:00
Christoph Hellwig
650f8b0291 [POWERPC] spufs: simplify state_mutex
The r/w semaphore to lock the spus was overkill and can be replaced
with a mutex to make it faster, simpler and easier to debug.  It also
helps to allow making most spufs interruptible in future patches.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:37 +01:00
Christoph Hellwig
202557d29e [POWERPC] spufs: sched.c cleanups
Various cleanups to sched.c that don't change the global control flow:

 - add kerneldoc comments to various functions
 - add spu_ prefixes to various functions
 - add/remove context from the runqueue in bind/unbind_context as
   it's part of the logical operation
 - add a call to put_active_spu to spu_unbind_contex as it's logically
   part of the unbind operation

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:36 +01:00
Christoph Hellwig
81998bafe2 [POWERPC] spufs: bind_context sets SPU_STATE_RUNNABLE
Only bind_context/unbind_context change the spu context state.  Thus
we can move all assignents of SPU_STATE_RUNNABLE into bind_context,
which parallels the unbind side aswell.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:36 +01:00
Christoph Hellwig
aa56c16807 [POWERPC] spufs: remove superfluous SPU_STATE_SAVED assignments
unbind_context already sets the context state to SPU_STATE_SAVED, thus
the spu_deactivate callers don't need to do it again.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:36 +01:00
Christoph Hellwig
5cb23afc9e [POWERPC] spufs: remove empty last line in run.c
Remove the empty last line in arch/powerpc/platforms/cell/spufs/run.c.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:35 +01:00
Christoph Hellwig
30a6c337dc [POWERPC] spufs: remove SPU_CONTEXT_PREEMPT
Remove the SPU_CONTEXT_PREEMPT define.  It's unused and won't be used
in this form after the scheduler rework.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-02-13 21:52:35 +01:00
Kumar Gala
f909f10621 Merge branch '83xx' into for_paulus 2007-02-13 12:51:38 -06:00
Timur Tabi
a20d0ce694 [POWERPC] 83xx: Updated mpc834x_itx_defconfig
This patch updates the defconfig for the MPC8349E-mITX.  In addition to picking
up changes from recent kernels, disables support for e100 (which doesn't ship
with the system), turns off input devices, turns on some I2C support, turns
off HW monitoring (HW not yet supported), turns off OHCI USB (not used), turns
off USB gadget support (HW not yet supported), turns on DOS FS support, and
turns off kernel debugging.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-13 12:51:20 -06:00
Timur Tabi
8c4a013da8 [POWERPC] 83xx: Add support for MPC8349E-mITX-GP
This patch adds a defconfig and a DTS for the MPC8349E-mITX-GP, a variant of
the MPC8349E-mITX.

USB is disabled because the only USB port is not setup properly by
firmware/kernel

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-13 12:48:56 -06:00
Andy Fleming
eb11a720a8 [POWERPC] 85xx: Add a defconfig for the 8568 MDS
Add defconfig for the MPC8568 MDS reference board

Signed-off-by: Andrew Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-13 12:36:53 -06:00
Andy Fleming
c2882bb12c [POWERPC] 85xx: Add support for the 8568 MDS board
Add support for the MPC8568 MDS reference board

Signed-off-by: Andrew Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-02-13 12:36:23 -06:00
Andi Kleen
126b192236 [PATCH] x86-64: Remove mk_pte_phys()
- Convert last user to pfn_pte
- Remove mk_pte_phys

Suggested by Jan Beulich

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Jan Beulich
22c5ace729 [PATCH] i386: Fix broken CONFIG_COMPAT_VDSO on i386
After updating several machines to 2.6.20, I can't boot  anymore the single
one of them that supports the NX bit and is configured as a 32-bit system.

My understanding is that the VDSO changes in 2.6.20-rc7 were not fully
cooked, in that with that config option enabled VDSO_SYM(x) now equals
x, meaning that an address in the fixmap area is now being passed to
apps via AT_SYSINFO. However, the page is mapped with PAGE_READONLY
rather than PAGE_READONLY_EXEC.

I'm not certain whether having app code go through the fixmap area is
intended, but in case it is here is the simple patch that makes things work
again.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Giuliano Procida
98838ec984 [PATCH] i386: fix 32-bit ioctls on x64_32
[MTRR] fix 32-bit ioctls on x64_32

Signed-off-by: Giuliano Procida <giuliano.procida@googlemail.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Andi Kleen
62cc49396e [PATCH] x86: Unify pcspeaker platform device code between i386/x86-64
Trivial cleanup.

Only change is that it is always compiled in now on x86-64 like on i386.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Rusty Russell
40d22c1b56 [PATCH] i386: Remove extern declaration from mm/discontig.c, put in header.
Extern declarations belong in headers.  Times, they are a'changin.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>

===================================================================
2007-02-13 13:26:26 +01:00
Rusty Russell
2a57ff1a70 [PATCH] i386: Rename cpu_gdt_descr and remove extern declaration from smpboot.c
When I implemented the DECLARE_PER_CPU(var) macros, I was careful that
people couldn't use "var" in a non-percpu context, by prepending
percpu__.  I never considered that this would allow them to overload
the same name for a per-cpu and a non-percpu variable.

It is only one of many horrors in the i386 boot code, but let's rename
the non-perpcu cpu_gdt_descr to early_gdt_descr (not boot_gdt_descr,
that's something else...)

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>

===================================================================
2007-02-13 13:26:26 +01:00
Rusty Russell
105fddb862 [PATCH] i386: Move mce_disabled to asm/mce.h
Allows external actors to disable mce.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>

===================================================================
2007-02-13 13:26:26 +01:00
Rusty Russell
992af68147 [PATCH] i386: paravirt unhandled fallthrough
The current code simply calls "start_kernel" directly if we're under a
hypervisor and no paravirt_ops backend wants us, because paravirt.c
registers that as a backend.

This was always a vain hope; start_kernel won't get far without setup.
It's also impossible for paravirt_ops backends which don't sit in the
arch/i386/kernel directory: they can't link before paravirt.o anyway.

Keep it simple: if we pass all the registered paravirt probes, BUG().

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Ralf Baechle
9af3cf0546 [PATCH] x86_64: Wire up compat epoll_pwait
> Which remembers me that I think that MIPS is using the non-compat version
> of sys_epoll_pwait for compat syscalls. But maybe MIPS doesn't need a compat
> syscall for some reason. Dunno.

Which reminds me that x86_64 i386 compat doesn't wire up sys_epoll_pwait ;-)

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Andi Kleen
9fbbd4dd17 [PATCH] x86: Don't require the vDSO for handling a.out signals
and in other strange binfmts. vDSO is not necessarily mapped there.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:26 +01:00
Alan
120fad7240 [PATCH] i386: Fix Cyrix MediaGX detection
The old Cyrix 5520 CPU detection code relied upon the PCI layer setup being
done earlier than the CPU setup, which is no longer true.  Fortunately we
know that if the processor is a MediaGX we can do type 1 pci config
accesses to check the companion chip.  We thus do those directly and from
this find the 5520 and implement the workarounds for the timer problem

Original report from takada@mbf.nifty.com, I sent a proposed patch which
Takara then corrected, tested and sent back to the list on 10th January.

Submitting for merging as it seems to have been missed

AK: Changed to use pci-direct.h and fix warning for !CONFIG_PCI (later
AK: originally from akpm)

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: <takada@mbf.nifty.com>
Cc: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:26 +01:00
Andi Kleen
7de6d3618b [PATCH] i386: Fix warning in cpu initialization
Fix bogus warning

linux/arch/i386/kernel/cpu/transmeta.c:12: warning: ‘cpu_freq’ may be used uninitialized in this function

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Andi Kleen
2ba1ff2b79 [PATCH] i386: Fix warning in microcode.c
Fix bogus gcc warning

linux/arch/i386/kernel/microcode.c:387: warning: ‘new_mc’ may be used uninitialized in this function

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Andi Kleen
0a4599c894 [PATCH] x86: Enable NMI watchdog for AMD Family 0x10 CPUs
For i386/x86-64.

Straight forward -- just reuse the Family 0xf code.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Andi Kleen
f790cd30d0 [PATCH] x86: Add new CPUID bits for AMD Family 10 CPUs in /proc/cpuinfo
Just various new acronyms. The new popcnt bit is in the middle
of Intel space. This looks a little weird, but I've been assured
it's ok.

Also I fixed RDTSCP for i386 which was at the wrong place.

For i386 and x86-64.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Andi Kleen
1a1eecd1c2 [PATCH] i386: Remove fastcall in paravirt.[ch]
Not needed because fastcall is always default now

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Eric W. Biederman
2fb12a9bca [PATCH] x86-64: survive having no irq mapping for a vector
Occasionally the kernel has bugs that result in no irq being found for a
given cpu vector.  If we acknowledge the irq the system has a good chance
of continuing even though we dropped an irq message.  If we continue to
simply print a message and not acknowledge the irq the system is likely to
become non-responsive shortly there after.

AK: Fixed compilation for UP kernels

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: "Luigi Genoni" <luigi.genoni@pirelli.com>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
TAKADA Yoshihito
bcde1ebb81 [PATCH] i386: geode configuration fixes
Original code doesn't write back to CCR4 register.  This patch reflects a
value of a register.

Cc: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Chuck Ebbert
86c4183742 [PATCH] i386: add option to show more code in oops reports
Sometimes developers need to see more object code in an oops report,
e.g. when kernel may be corrupted at runtime.

Add the "code_bytes" option for this.

Signed-off-by: Chuck Ebbert <cebbert@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
Evgeniy Polyakov
8469adde59 [PATCH] x86-64: Minor patch for compilation warning in x86_64 signal code
If DEBUG_SIG is enbaled in source code, ia32_signal.c compiles with warning
due to wrong format string.  Attached patch fixes that.  It is quite minor
update, since by default DEBUG_SIG is not enabled and can not be turned on
without code modification.

Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
Roland Dreier
3e94fb8f54 [PATCH] x86-64: avoid warning message livelock
I've seen my box paralyzed by an endless spew of

    rtc: lost some interrupts at 1024Hz.

messages on the serial console.  What seems to be happening is that
something real causes an interrupt to be lost and triggers the
message.  But then printing the message to the serial console (from
the hpet interrupt handler) takes more than 1/1024th of a second, and
then some more interrupts are lost, so the message triggers again....

Fix this by adding a printk_ratelimit() before printing the warning.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:25 +01:00
Benjamin Romer
ee4eff6ff6 [PATCH] x86-64: update IO-APIC dest field to 8-bit for xAPIC
On the Unisys ES7000/ONE system, we encountered a problem where performing
a kexec reboot or dump on any cell other than cell 0 causes the system
timer to stop working, resulting in a hang during timer calibration in the
new kernel.

We traced the problem to one line of code in disable_IO_APIC(), which needs
to restore the timer's IO-APIC configuration before rebooting.  The code is
currently using the 4-bit physical destination field, rather than using the
8-bit logical destination field, and it cuts off the upper 4 bits of the
timer's APIC ID.  If we change this to use the logical destination field,
the timer works and we can kexec on the upper cells.  This was tested on
two different cells (0 and 2) in an ES7000/ONE system.

For reference, the relevant Intel xAPIC spec is kept at
ftp://download.intel.com/design/chipsets/e8501/datashts/30962001.pdf,
specifically on page 334.

Signed-off-by: Benjamin M Romer <benjamin.romer@unisys.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
Robert P. J. Day
a4af60aa64 [PATCH] i386: Remove unused kernel config option X86_XADD
Remove the unused kernel config option X86_XADD, which is unused in any
source or header file.

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
Bob Picco
f0a5a58aa8 [PATCH] x86-64: clean up sparsemem memory_present call
Eliminate arch specific memory_present call x86_64 NUMA by utilizing
sparse_memory_present_with_active_regions.

Acked-by: Mel Gorman <mel@csn.ul.ie>
Signed-off-by: Bob Picco <bob.picco@hp.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:25 +01:00
Jan Beulich
47a55cd795 [PATCH] i386: entry.S END/ENDPROC annotations
Annotate i386/kernel/entry.S with END/ENDPROC to assist disassemblers and
other analysis tools.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:24 +01:00
takada
2632f01a66 [PATCH] i386: support Classic MediaGXm
I hope to support "classic" MediaGXm in kernel.

The DIR1 register of MediaGXm( or Geode) shows the following values for
identify CPU.  For example, My MediaGXm shows 0x42.

We can read National Semiconductor's datasheet without any NDAs.
  http://www.national.com/pf/GX/GXLV.html

from datasheets:
DIR1
0x30 - 0x33 GXm rev. 1.0 - 2.3
0x34 - 0x4f GXm rev. 2.4 - 3.x
0x5x        GXm rev. 5.0 - 5.4
0x6x        GXLV
0x7x         (unknow)
0x8x	    Gx1

In nsc driver of X, accept 0x30 through 0x82. What will 0x7x mean?

Cc: Jordan Crouse <jordan.crouse@amd.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Randy Dunlap
3101673b65 [PATCH] i386: avoid gcc extension
setcc() in math-emu is written as a gcc extension statement expression
macro that returns a value.  However, it's not used that way and it's not
needed like that, so just make it a inline function so that we
don't use an extension when it's not needed.

Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Christoph Hellwig <hch@infradead.org>
Cc: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:24 +01:00
H. Peter Anvin
30b82ea08c [PATCH] i386: All Transmeta CPUs have constant TSCs
All Transmeta CPUs ever produced have constant-rate TSCs.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:24 +01:00
Ingo Molnar
5d0e600d90 [PATCH] x86: fix laptop bootup hang in init_acpi()
During kernel bootup, a new T60 laptop (CoreDuo, 32-bit) hangs about
10%-20% of the time in acpi_init():

 Calling initcall 0xc055ce1a: topology_init+0x0/0x2f()
 Calling initcall 0xc055d75e: mtrr_init_finialize+0x0/0x2c()
 Calling initcall 0xc05664f3: param_sysfs_init+0x0/0x175()
 Calling initcall 0xc014cb65: pm_sysrq_init+0x0/0x17()
 Calling initcall 0xc0569f99: init_bio+0x0/0xf4()
 Calling initcall 0xc056b865: genhd_device_init+0x0/0x50()
 Calling initcall 0xc056c4bd: fbmem_init+0x0/0x87()
 Calling initcall 0xc056dd74: acpi_init+0x0/0x1ee()

It's a hard hang that not even an NMI could punch through!  Frustratingly,
adding printks or function tracing to the ACPI code made the hangs go away
...

After some time an additional detail emerged: disabling the NMI watchdog
made these occasional hangs go away.

So i spent the better part of today trying to debug this and trying out
various theories when i finally found the likely reason for the hang: if
acpi_ns_initialize_devices() executes an _INI AML method and an NMI
happens to hit that AML execution in the wrong moment, the machine would
hang.  (my theory is that this must be some sort of chipset setup method
doing stores to chipset mmio registers?)

Unfortunately given the characteristics of the hang it was sheer
impossible to figure out which of the numerous AML methods is impacted
by this problem.

As a workaround i wrote an interface to disable chipset-based NMIs while
executing _INI sections - and indeed this fixed the hang.  I did a
boot-loop of 100 separate reboots and none hung - while without the patch
it would hang every 5-10 attempts.  Out of caution i did not touch the
nmi_watchdog=2 case (it's not related to the chipset anyway and didnt
hang).

I implemented this for both x86_64 and i686, tested the i686 laptop both
with nmi_watchdog=1 [which triggered the hangs] and nmi_watchdog=2, and
tested an Athlon64 box with the 64-bit kernel as well. Everything builds
and works with the patch applied.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Len Brown <lenb@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13 13:26:24 +01:00
Muli Ben-Yehuda
310adfdd91 [PATCH] x86-64: robustify bad_dma_address handling
- set bad_dma_address explicitly to 0x0
- reserve 32 pages from bad_dma_address and up
- WARN_ON() a driver feeding us bad_dma_address

Thanks to Leo Duran <leo.duran@amd.com> for the suggestion.

Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Leo Duran <leo.duran@amd.com>
Cc: Job Mason <jdmason@kudzu.us>
2007-02-13 13:26:24 +01:00
Andi Kleen
fc986db4fc [PATCH] x86-64: Don't reserve ROMs
We trust the e820 table, so explicitely reserving ROMs shouldn't
be needed.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Andi Kleen
00edefae05 [PATCH] x86-64: Fix off by one error in IOMMU boundary checking
Should be harmless because there is normally no memory there, but
technically it was incorrect.

Pointed out by Leo Duran

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Zachary Amsden
ffb6017563 [PATCH] x86-64: x86_64 - Fix FS/GS registers for VT execution
Initialize FS and GS to __KERNEL_DS as well.  The actual value of them is not
important, but it is important to reload them in protected mode.  At this time,
they still retain the real mode values from initial boot.  VT disallows
execution of code under such conditions, which means hardware virtualization
can not be used to boot the kernel on Intel platforms, making the boot time
painfully slow.

This requires moving the GS load before the load of GS_BASE, so just move
all the segments loads there to keep them together in the code.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Andi Kleen
9a11ff6827 [PATCH] x86-64: Unexport __supported_pte_mask
The symbol is needed to manipulate page tables, and modules shouldn't
do that.

Leftover from 2.4, but no in tree module should need it now.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Andi Kleen
f49481bc50 [PATCH] x86-64: Check return value of putreg in PTRACE_SETREGS
This means if an illegal value is set for the segment registers there
ptrace will error out now with an errno instead of silently ignoring
it.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Jack Steiner
2f7a2a79c3 [PATCH] x86-64: - Ignore long SMI interrupts in clock calibration code - update 1
Add failsafe mechanism to HPET/TSC clock calibration.

	Signed-off-by: Jack Steiner <steiner@sgi.com>

Updated to include failsafe mechanism & additional community feedback.
Patch built on latest 2.6.20-rc4-mm1 tree.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:24 +01:00
Andreas Herrmann
6c5806cae5 [PATCH] i386: fix size_or_mask and size_and_mask
mtrr: fix size_or_mask and size_and_mask

This fixes two bugs in /proc/mtrr interface:
o If physical address size crosses the 44 bit boundary
  size_or_mask is evaluated wrong.
o size_and_mask limits width of physical base
  address for an MTRR to be less than 44 bits.

TBD: later patch had one more change, but I think that was bogus.
TBD: need to double check

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Alexey Dobriyan
016d6f3580 [PATCH] i386: Convert /proc/apm to seqfile
Byte-to-byte identical /proc/apm here.

Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Alexey Dobriyan
ad4e680fb2 [PATCH] i386: use smp_call_function_single()
It will execure cpuid only on the cpu we need.

Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Alexey Dobriyan
d958f14332 [PATCH] i386: use smp_call_function_single()
It will execute rdmsr and wrmsr only on the cpu we need.

Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Nicolas Kaiser
edf8dd36b5 [PATCH] x86-64: Kconfig typos
Some typos in Kconfig.

Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Andi Kleen
8c40ad02e5 [PATCH] i386: Small cleanup to TLB flush code
- Remove outdated comment
- Use cpu_relax() in a busy loop

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Andi Kleen
a98f0dd34d [PATCH] x86-64: Allow to run a program when a machine check event is detected
When a machine check event is detected (including a AMD RevF threshold
overflow event) allow to run a "trigger" program. This allows user space
to react to such events sooner.

The trigger is configured using a new trigger entry in the
machinecheck sysfs interface. It is currently shared between
all CPUs.

I also fixed the AMD threshold handler to run the machine
check polling code immediately to actually log any events
that might have caused the threshold interrupt.

Also added some documentation for the mce sysfs interface.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Jan Beulich
24ce0e96f2 [PATCH] x86-64: Tighten mce_amd driver MSR reads
while debugging an unrelated problem in Xen, I noticed odd reads from
non-existent MSRs. Having now found time to look why these happen, I
came up with below patch, which
- prevents accessing MCi_MISCj with j > 0 when the block pointer in
MCi_MISC0 is zero
- accesses only contiguous MCi_MISCj until a non-implemented one is
found
- doesn't touch unimplemented blocks in mce_threshold_interrupt at all
- gives names to two bits previously derived from MASK_VALID_HI (it
took me some time to understand the code without this)

The first three items, besides being apparently closer to the spec, should
namely help cutting down on the time mce_threshold_interrupt() takes.

Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Jan Beulich
9b35589756 [PATCH] x86: simplify notify_page_fault()
Remove all parameters from this function that aren't really variable.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Venkatesh Pallipadi
44264261d8 [PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in oprofile
Handle these 32 bit perfmon counter MSR writes cleanly in oprofile.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:23 +01:00
Venkatesh Pallipadi
90ce4bc454 [PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in i386 nmi_watchdog
Change i386 nmi handler to handle 32 bit perfmon counter MSR writes cleanly.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Venkatesh Pallipadi
1676193937 [PATCH] x86-64: Handle 32 bit PerfMon Counter writes cleanly in x86_64 nmi_watchdog
P6 CPUs and Core/Core 2 CPUs which has 'architectural perf mon' feature,
only supports write of low 32 bits in Performance Monitoring Counters.
Bits 32..39 are sign extended based on bit 31 and bits 40..63 are reserved
and should be zero.

This patch:

Change x86_64 nmi handler to handle this case cleanly.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Glauber de Oliveira Costa
4c3cbf75b2 [PATCH] x86-64: Use constant instead of raw number in x86_64 ioperm.c
This is a tiny cleanup to increase readability

Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13 13:26:22 +01:00
Glauber de Oliveira Costa
c49c5330c9 [PATCH] x86-64: Remove fastcall references in x86_64 code
Unlike x86, x86_64 already passes arguments in registers.  The use of
regparm attribute makes no difference in produced code, and the use of
fastcall just bloats the code.

Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13 13:26:22 +01:00
Rohit Seth
53fee04f31 [PATCH] x86-64: Fix fake numa for x86_64 machines with big IO hole
This patch resolves the issue of running with numa=fake=X on kernel command
line on x86_64 machines that have big IO hole.  While calculating the size
of each node now we look at the total hole size in that range.

Previously there were nodes that only had IO holes in them causing kernel
boot problems.  We now use the NODE_MIN_SIZE (64MB) as the minimum size of
memory that any node must have.  We reduce the number of allocated nodes if
the number of nodes specified on kernel command line results in any node
getting memory smaller than NODE_MIN_SIZE.

This change allows the extra memory to be incremented in NODE_MIN_SIZE
granule and uniformly distribute among as many nodes (called big nodes) as
possible.

[akpm@osdl.org: build fix]
Signed-off-by: David Rientjes <reintjes@google.com>
Signed-off-by: Paul Menage <menage@google.com>
Signed-off-by: Rohit Seth <rohitseth@google.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13 13:26:22 +01:00
Rene Herman
3b3d5e1db6 [PATCH] i386: romsignature/checksum cleanup
Use adding __init to romsignature() (it's only called from probe_roms()
which is itself __init) as an excuse to submit a pedantic cleanup.

Signed-off-by: Rene Herman <rene.herman@gmail.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13 13:26:22 +01:00
Ingo Molnar
f9690982b8 [PATCH] i386: improve sched_clock() on i686
Clean up sched_clock() on i686: it will use the TSC if available and falls
back to jiffies only if the user asked for it to be disabled via notsc or
the CPU calibration code didnt figure out the right cpu_khz.

This generally makes the scheduler timestamps more finegrained, on all
hardware.  (the current scheduler is pretty resistant against asynchronous
sched_clock() values on different CPUs, it will allow at most up to a jiffy
of jitter.)

Also simplify sched_clock()'s check for TSC availability: propagate the
desire and ability to use the TSC into the tsc_disable flag, previously
this flag only indicated whether the notsc option was passed.  This makes
the rare low-res sched_clock() codepath a single branch off a read-mostly
flag.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Stephane Eranian
2ff2d3d747 [PATCH] i386: add idle notifier
Add a notifier mechanism to the low level idle loop.  You can register a
callback function which gets invoked on entry and exit from the low level idle
loop.  The low level idle loop is defined as the polling loop, low-power call,
or the mwait instruction.  Interrupts processed by the idle thread are not
considered part of the low level loop.

The notifier can be used to measure precisely how much is spent in useless
execution (or low power mode).  The perfmon subsystem uses it to turn on/off
monitoring.

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Adrian Bunk
86a978837c [PATCH] i386: arch/i386/kernel/cpu/mcheck/mce.c should #include <asm/mce.h>
Every file should include the headers containing the prototypes for
it's global functions.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Vivek Goyal
f8657e1b55 [PATCH] i386: move startup_32() in text.head section
o Entry startup_32 was in .text section but it was accessing some init
  data too and it prompts MODPOST to generate compilation warnings.

WARNING: vmlinux - Section mismatch: reference to .init.data:boot_params from
.text between '_text' (at offset 0xc0100029) and 'startup_32_smp'
WARNING: vmlinux - Section mismatch: reference to .init.data:boot_params from
.text between '_text' (at offset 0xc0100037) and 'startup_32_smp'
WARNING: vmlinux - Section mismatch: reference to
.init.data:init_pg_tables_end from .text between '_text' (at offset
0xc0100099) and 'startup_32_smp'

o Can't move startup_32 to .init.text as this entry point has to be at the
  start of bzImage. Hence moved startup_32 to a new section .text.head and
  instructed MODPOST to not to generate warnings if init data is being
  accessed from .text.head section. This code has been audited.

o SMP boot up code (startup_32_smp) can go into .init.text if CPU hotplug
  is not supported. Otherwise it generates more warnings

WARNING: vmlinux - Section mismatch: reference to .init.data:new_cpu_data from
.text between 'checkCPUtype' (at offset 0xc0100126) and 'is486'
WARNING: vmlinux - Section mismatch: reference to .init.data:new_cpu_data from
.text between 'checkCPUtype' (at offset 0xc0100130) and 'is486'

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Zachary Amsden
7c0b49f9d1 [PATCH] i386: Paravirt debug defaults off
Deliberate register clobber around performance critical inline code is great for
testing, bad to leave on by default.  Many people ship with DEBUG_KERNEL turned
on, so stop making DEBUG_PARAVIRT default on.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:22 +01:00
Zachary Amsden
90736e20e3 [PATCH] i386: Vmi timer race
Because timer code moves around, and we might eventually move our init to a
late_time_init hook, save and restore IRQs around this code because it is
definitely not interrupt safe.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:21 +01:00
Zachary Amsden
ac3b6faff9 [PATCH] i386: Kprobe rpl fix
Kprobes bugfix for paravirt compatibility - RPL on the CS when inserting
BPs must match running kernel.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
CC: Eric Biederman <ebiederm@xmission.com>
2007-02-13 13:26:21 +01:00
Zachary Amsden
7b35520243 [PATCH] i386: Profile pc badness
Profile_pc was broken when using paravirtualization because the
assumption the kernel was running at CPL 0 was violated, causing
bad logic to read a random value off the stack.

The only way to be in kernel lock functions is to be in kernel
code, so validate that assumption explicitly by checking the CS
value.  We don't want to be fooled by BIOS / APM segments and
try to read those stacks, so only match KERNEL_CS.

I moved some stuff in segment.h to make it prettier.

Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13 13:26:21 +01:00
Zachary Amsden
bbab4f3bb7 [PATCH] i386: vMI timer patches
VMI timer code.  It works by taking over the local APIC clock when APIC is
configured, which requires a couple hooks into the APIC code.  The backend
timer code could be commonized into the timer infrastructure, but there are
some pieces missing (stolen time, in particular), and the exact semantics of
when to do accounting for NO_IDLE need to be shared between different
hypervisors as well.  So for now, VMI timer is a separate module.

[Adrian Bunk: cleanups]

Subject: VMI timer patches
Signed-off-by: Zachary Amsden <zach@vmware.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Chris Wright <chrisw@sous-sol.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13 13:26:21 +01:00