2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 18:23:53 +08:00
Commit Graph

362677 Commits

Author SHA1 Message Date
Olof Johansson
567b1b0839 The imx soc changes for 3.10:
* Enable anatop, well bisa and RBC for suspend to optimize the power
   consumption a little bit
 * Clock changes for TVE, LDB, PATA, SRTC support
 * Add System Reset Controller (SRC) support for imx5 and imx6
 * Add initial imx6dl support based on imx6q code
 * Kconfig for cpufreq-cpu0, defconfig updates and few other changes
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJRZ/viAAoJEFBXWFqHsHzOyqUH/2t7CCwlfTVUJYDCeo6PaE9x
 41cV5zG6RvX1OfkRUmJ2N2klGn4zhwg6GHsCDQmvs+IODs4E7JeB9M92FAaPng71
 NnuuwCQ01iIoaTtkz8z/n3tSet3fYB+xfNCMJoWIyS0edFFkCjOgnqRsA0pHRIOp
 G6ey1kU80D0f4+DjAUg1mkIvJrZxbRKDwmwqfDGJzQ4VU7cv70n027YuMKbeMyCC
 zdeKmpKSEl9AY+O/zeMrf03zEW+kdZ4eB6cTUFlpzYwPYY9o+XHx0U0535F7/x4+
 KObUZ9Qg7liP5WO3ZzkVff5HJqPs6s/q99eOsU4/okF1x0fpq2mSgIHlSw4HpK8=
 =TuTx
 -----END PGP SIGNATURE-----

Merge tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2

From Shawn Guo:
The imx soc changes for 3.10:

* Enable anatop, well bisa and RBC for suspend to optimize the power
  consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes

* tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (275 commits)
  ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
  ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
  ARM i.MX53: make tve_ext_sel propagate rate change to PLL
  ARM i.MX53: Remove unused tve_gate clkdev entry
  ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
  ARM: i.MX5: Add PATA and SRTC clocks
  ARM: imx: do not bring up unavailable cores
  ARM: imx: add initial imx6dl support
  ARM: imx1: mm: add call to mxc_device_init
  ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
  ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
  ARM: i.MX53 Add the cko1, cko2 clock outputs.
  staging: drm/imx: Use SRC to reset IPU
  ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
  ARM: imx: do not use regmap_read for ANADIG_DIGPROG
  ARM i.MX6q: set the LDB serial clock parent to the video PLL
  ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
  ARM i.MX6q: fix ldb di divider and selector clocks
  ARM i.MX53: fix ldb di divider and selector clocks
  ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

Trivial change/change conflict in arch/arm/mach-imx/mach-imx6q.c resolved.
2013-04-12 23:55:05 -07:00
Philipp Zabel
80f72d2d33 ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
Use imx_clk_mux_flags to set the appropriate flags for the TVE
selector clock. This is needed so tve_clk rate changes can propagate
up to pll4_sw.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:17 +08:00
Philipp Zabel
d24de49523 ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
Remove the tve_di clock from the CCM clock tree. It will be provided
by the Television Encoder driver, as this clock is an output signal
of the TVE module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
f550e70175 ARM i.MX53: make tve_ext_sel propagate rate change to PLL
This is needed so the Television Encoder driver can set the rate
on tve_clk and have it propagated up to pll4_sw.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
866f2f0d8d ARM i.MX53: Remove unused tve_gate clkdev entry
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Philipp Zabel
3f487bed1b ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
On i.MX53, there is only tve_ext_sel.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:16 +08:00
Sascha Hauer
5d530bb0ad ARM: i.MX5: Add PATA and SRTC clocks
This adds the clock gates and the binding documentation
for PATA and SRTC.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Shawn Guo
dc13ba2950 ARM: imx: do not bring up unavailable cores
The i.MX6 Quad can be fused as i.MX6 Dual chip, and similarly i.MX6
DualLite can be fused as i.MX6 Solo.  The actual number of available
cores can be found out from SCU.

Since we do not reflect the fusing thing in device tree, the function
arm_dt_init_cpu_maps() will always call set_cpu_possible(true) for 4
cores on i.MX6 Quad/Dual and 2 cores for i.MX6 DualLite/Solo.  This
causes failures when kernel tries to bring those unavailable cores
online.  For example, the following failure message will be seen when
booting an i.MX6 Solo chip.

  CPU1: failed to come online

Though kernel will still boot fine, the message is somehow annoying.
Let's get rid of it by calling set_cpu_possible(false) on those
unavailable cores.

While at it, the set_cpu_possible(true) for available cores is removed,
since it's already been done in arm_dt_init_cpu_maps().

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Shawn Guo
3c03a2fed6 ARM: imx: add initial imx6dl support
The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly
compatible with i.MX6 Quad/Dual.  And that's why we choose to support
it using imx6q code with cpu_is_imx6dl() check when necessary.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Gwenhael Goavec-Merou
9a37ac481a ARM: imx1: mm: add call to mxc_device_init
mxc_device_init() is mandatory for mxc_aips and mxc_ahb bus registration, needed
as parents, at least, for gpio and dma.

Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:15 +08:00
Fabio Estevam
7c3e48b5a4 ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
Add CONFIG_GPIO_SYSFS as it is helpful for accessing GPIO from userspace.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Fabio Estevam
e72f745c46 ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
Select CONFIG_PERF_EVENTS so that oprofile can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Martin Fuzzey
04b41e84ff ARM: i.MX53 Add the cko1, cko2 clock outputs.
These two clocks connect to external pins and can be muxed to
various internal clocks.
They are typically used either for debugging or to provide
clocks to external chips (eg audio codecs).

Currently only the selectable clocks that already exist in the clock tree
have been added.

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:14 +08:00
Philipp Zabel
6c64155de9 staging: drm/imx: Use SRC to reset IPU
Request the System Reset Controller to reset the IPU if
specified via device tree phandle.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
02985b9463 ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
The SRC has auto-deasserting reset bits that control reset lines to
the GPU, VPU, IPU, and OpenVG IP modules. This patch adds a reset
controller that can be controlled by those devices using the
reset controller API.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Shawn Guo
7006ba24c2 ARM: imx: do not use regmap_read for ANADIG_DIGPROG
Function imx_anatop_get_digprog() that reads register ANADIG_DIGPROG is
called to identify silicon version.  Users might query silicon version
earlier than regmap subsystem is ready.  For example, imx6q clock driver
query revision in mx6q_clocks_init(), where regmap is not initialized
yet.

Change imx_anatop_get_digprog() to map anatop block and read
ANADIG_DIGPROG in the native way, so that the function can work at very
early stage.

While at it, let's move imx_print_silicon_rev() back to
imx6q_timer_init() to have the message show up a little earlier.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
32f3b8da22 ARM i.MX6q: set the LDB serial clock parent to the video PLL
On i.MX6q revision 1.1 and later, set the video PLL as parent for
the LDB clock branch. On revision 1.0, the video PLL is useless
due to missing dividers, so keep the default parent (mmdc_ch1_axi).

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:13 +08:00
Philipp Zabel
2df1d026ed ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
Query silicon revision to determine clock tree and add post
dividers for newer revisions.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:28:12 +08:00
Philipp Zabel
d19dacb732 ARM i.MX6q: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
cc7b633909 ARM i.MX53: fix ldb di divider and selector clocks
Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate
flags for the LDB display interface divider and selector clocks.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:45 +08:00
Philipp Zabel
3ce921702b ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
The default is for dividers to set CLK_SET_PARENT_RATE and for muxes to
not set that flag. In the LDB clock tree, we need the opposite, so add
functions to create divider and mux clocks with configurable flags.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
b1a3582dc6 ARM i.MX6q: export imx6q_revision
So it can be used in clk-imx6q.c for revision dependent clock tree setup.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Markus Pargmann
6866310423 ARM: imx27, imx5: Add kconfig selects for cpufreq-cpu0
There are some config options not selected by imx27 and imx5 that are
necessary to use the cpufreq-cpu0 driver.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Philipp Zabel
8ecb167f49 ARM i.MX53: Add GPU clocks to clock tree
This patch adds the missing GPU2D and GPU3D mux and gate clocks,
and the graphics arbiter gate clock.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:44 +08:00
Fabio Estevam
fcc4f9fc5b ARM: mach-imx: anatop: Include "common.h"
Fix the following sparse warnings:

arch/arm/mach-imx/anatop.c:56:6: warning: symbol 'imx_anatop_pre_suspend' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:62:6: warning: symbol 'imx_anatop_post_resume' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:68:6: warning: symbol 'imx_anatop_usb_chrg_detect_disable' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:78:5: warning: symbol 'imx_anatop_get_digprog' was not declared. Should it be static?
arch/arm/mach-imx/anatop.c:86:13: warning: symbol 'imx_anatop_init' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
263475d4e0 ARM: imx: enable RBC to support anatop LPM mode
RBC is to control whether some ANATOP sub modules
can enter lpm mode when SOC is into STOP mode, if
RBC is enabled and PMIC_VSTBY_REQ is set, ANATOP
will have below behaviors:

1. Digital LDOs(CORE, SOC and PU) are bypassed;
2. Analog LDOs(1P1, 2P5, 3P0) are disabled;

As the 2P5 is necessary for DRAM IO pre-drive in
STOP mode, so we need to enable weak 2P5 in STOP
mode when 2P5 LDO is disabled.

For RBC settings, there are some rules as below
due to hardware design:

1. All interrupts must be masked during operating
   RBC registers;
2. At least 2 CKIL(32K) cycles is needed after the
   RBC setting is changed.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e7b82d645d ARM: imx: enable periphery well bias for suspend
Enable periphery charge pump for well biasing
at suspend to reduce periphery leakage.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:43 +08:00
Anson Huang
e95dddb34c ARM: imx: enable anatop suspend/resume
Anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.

As we have a common anatop file, remove all the operations
of anatop module in other files, use anatop interfaces to
do that.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-12 19:01:42 +08:00
Shawn Guo
cb872cacb2 Merge remote-tracking branch 'pza/reset/for_v3.10' into imx/soc 2013-04-12 19:00:44 +08:00
Shawn Guo
a862d88d3f The imx cleanup for 3.10:
* Clean up a couple of unneeded function declarations
 * Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
   as the replacement
 * Remove platform ahci support
 * Clean up unused ARCH/MACH Kconfig symbols
 * Remove a couple of unused files
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJRZBpzAAoJEFBXWFqHsHzOfyAH/RdvhORI0rNhBAOrSxleWlMy
 AMP9x6G5tXNK/fgtxopvCiS4VXw5MB01uqJWMVM9+hx6676oCXWc/L3I6iT5l87B
 qPY/e9LyGJa5aOYczPuUT2sG+Ga8989GhOksA+L6kWHZ2df0BIB9rBRZnoPezEAx
 u2ATdioyzfj2rAnDNFOxsw6oai265mowt/f8J/7EQfxgkAMcKov7/BpVac0po55R
 tv+Hr3T7OBg3p/h5PYi5iAehVCToCKOD31QpnlhS+dmKS52w7tEO6T75INt7HzC8
 CJT0zi5jJ3/tDJsdYJ1SS4MHK4U43y0oV7cw7sO7TzNreyOB6bzTWDqhdJY2oMM=
 =N7xl
 -----END PGP SIGNATURE-----

Merge tag 'imx-cleanup-3.10' into imx/soc

The imx cleanup for 3.10:

* Clean up a couple of unneeded function declarations
* Remove imx specific cpufreq driver as generic cpufreq-cpu0 works well
  as the replacement
* Remove platform ahci support
* Clean up unused ARCH/MACH Kconfig symbols
* Remove a couple of unused files
2013-04-12 19:00:28 +08:00
Shawn Guo
7c3c1b8c90 The imx fixes for 3.9, take 5:
* A couple imx35 clock fixes for regressions caused by common clock
   framework conversion.  The admux and iomux get disabled by common
   clock framework late initcall, and hence causes problems.
 * Add missing twd clock lookup in device tree.  This becomes required
   since commit bd60345 (ARM: use device tree to get smp_twd clock)
   forces all DT boot to find lookup from device tree.
 * Fix imx6q ldb_di clock parents mismatch per reference manual.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQEcBAABAgAGBQJRZAZBAAoJEFBXWFqHsHzOy60H/0RIxFO1TSQVVPTuJRtHr9qk
 BtszcLOwiRbWipuG1OiosEKXMeOXjAPtOG8P9tReC/oJN4WL5CmGW3PrPQ/9DEbZ
 OTYVPhgmGKDB/2n5BVvvTDISTovvlQRju4ht+70j1BnAlpbzGLbKMG4o6zHOROoh
 d15dqg/Ny1ovsCvva2ODbwRtBkBaBqDC+RGqNPrhTN7WSk+nv6yITYZCREI1mjGH
 RG7B62hn+1aD6tMdigFu9xS4vTkHXjFC0AVEixBEi3iWqofSz3Cb6Zq4MpRGNXGZ
 o/tfc4/2q6uF/UEpTQJDhYbHjwesySsIwdu4vsvI2lh9EGqUgyC3YE+VbDwOeGE=
 =tztW
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-3.9-5' into imx/soc

The imx fixes for 3.9, take 5:

* A couple imx35 clock fixes for regressions caused by common clock
  framework conversion.  The admux and iomux get disabled by common
  clock framework late initcall, and hence causes problems.
* Add missing twd clock lookup in device tree.  This becomes required
  since commit bd60345 (ARM: use device tree to get smp_twd clock)
  forces all DT boot to find lookup from device tree.
* Fix imx6q ldb_di clock parents mismatch per reference manual.
2013-04-12 18:59:30 +08:00
Dan Carpenter
6034bb22d8 reset: NULL deref on allocation failure
"rstc" is NULL here and we should use "rcdev" instead of "rstc->rcdev".

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2013-04-12 10:26:24 +02:00
Philipp Zabel
61fc413176 reset: Add reset controller API
This adds a simple API for devices to request being reset
by separate reset controller hardware and implements the
reset signal device tree binding.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
2013-04-12 10:26:23 +02:00
Stephen Warren
4e11f848c6 dt: describe base reset signal binding
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
It consists of a binding for a reset controller device (provider), and a
pair of properties, "resets" and "reset-names", to link a device node
(consumer) to its reset controller via phandle, similarly to the clock
and interrupt bindings.

The reset controller has all information necessary to reset the consumer
device. That could be provided via device tree, or it could be implemented
in hardware.
The aim is to enable device drivers to request a framework API to issue a
reset simply by providing their struct device pointer as the most common
case.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Acked-by: Rob Herring <rob.herring@calxeda.com>
2013-04-12 10:25:25 +02:00
Olof Johansson
f6940610c7 Renesas ARM based r8a7790 SoC update for v3.10
* Force architecture timer to be activated regardless of bootloader
   - This is necessary for the lager board to boot
 * Add second memory range to r8a7790 PFC device
   - This is in preparation for further PFC work.
     It should not break anything as it is not used yet.
 
 This pull request is based on:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc2-for-v3.10
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRZmnuAAoJENfPZGlqN0++6AAP/3edyVpqono4N8ACAKt5EMUN
 EOkJdTtsvdmI+1O3kSWNIp3WSaObYzzqGYpmKMZqIjlCzWVgNpazYvTGGPgBCy/B
 J3VGmLerTdy6GMX8lr0Xk3/wU6nKVU9j1znwTDXzcaU9Mpo7naHmirrULL2uAiVX
 ZJVNIN0P4cz8yWN4MtTz7slWFoR1aHr1GHEE7/PqFiMFWNeCjSI6z7HQYZggSlz5
 p4EH0ZwmVs9jBNoP/TniOobUXqYVtTkO4TsAWnhKWnz2VJGSfs1wY7dYq95tX4pZ
 ffuaFfrTRE9dY/dJvnbWpyD8iF7VU4XuvqJBdy7U6JWB9HBBRY6mSNFn5MGMLGI1
 sf7ndPZDHLkRV67Sg8/znkssBqR/UW1b90b5yK9jSYdfVmm7lX+GupNjLd1eI5Y7
 j+RmA5F3s+nwew0Z5Q0PxWTY2RuuykkawHSrryCvxOXTZ3pVzVxrgFACzanISPeZ
 gxU7m7ahrDve0UECX1HH2QErdZwPSY02ZZF9fZoOEnOivNI44e/Vhgh2KKgj/C4e
 oDASEUVJwi2KiQAnvt7hO8FG7K4CnPMAjDQaABGML9zUiYd7P/qWoyyos0b9XbKR
 LN9iqKjRvNxIuraUpkH5qnotfcPmorNdMOz6D6Qlm2hSwk8XTChCMb3E3gCRO5CZ
 WiEq+JcSc2r9LxL/hdpj
 =qNDI
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-r8a7790-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman:
Renesas ARM based r8a7790 SoC update for v3.10

* Force architecture timer to be activated regardless of bootloader
  - This is necessary for the lager board to boot
* Add second memory range to r8a7790 PFC device
  - This is in preparation for further PFC work.
    It should not break anything as it is not used yet.

This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git renesas-soc2-for-v3.10

* tag 'renesas-soc-r8a7790-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: force enable of r8a7790 arch timer
  ARM: shmobile: Add second I/O range for r8a7790 PFC

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-11 10:32:39 -07:00
Olof Johansson
432b473419 Renesas ARM and SH based SoC pinmux fixes for v3.10
Correct a typo in sh-pfc r8a7779
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRZOt+AAoJENfPZGlqN0++gUEP/A2wShRhR8uLgTSC4cj4HgLc
 00HsZePtMtzaKGY43kRtO6KoAhxjC9Z9vVqek4L5KSDdsE4yyTJfhlsNdW+/VTL6
 dYVvaU5Hq2ewX/VzNVKN6Q6qSrw1T4v+nzlfYSRQdj3MMrBGMAZISn/zMcOdOeOQ
 nqq63UiyRvtdwKBL/bdTlkEybMC7Wu3gIv5sh/r4zpwEfMmEmZzsA+e1BWX8YRdX
 OTY/RNN4LS2CciuBSBEmAM/VjXH1mRiqLIxCxZRWPph/RyfXBjbfu99Kub15jmcr
 bQ5gumr1X/x4cbtfM1KQgw1umXqcx6JiD2CO4LCS5ox1RO4iGhqCm/r2UmVygpjW
 aGiWU6L/tRfNnmpjPQPJNAuHyi+rpJEB3XXlezOycjMEA96X/jPDl3E7jBsodH6e
 ph3V9TaN9JiNlm+FjMUyIddyNZ6sRT0Ki9vhwV8w4gmuQzYaw3SgbX88fjV92Cfp
 eTB+Are/XLgQC2Ne8wiXdd4JYUE2LIy8KILCH7dnY1mrHR2Oe5VnjmWdvWVsvUlc
 WuFI1WXYE45gQ6aDj2Q462+mcnkuVOtjP5I9qZ6YGDDri3cX0cclTgmL0i8VJMHg
 fHLqQD0+/2kNSky39lLK3H+cq3nM5YlIXsP89tPb/WR5l28OGBDlhkjXsoGgLS1B
 2zqVj+Z6zmYhEu7CUw8u
 =0Xk/
 -----END PGP SIGNATURE-----

Merge tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman:
Renesas ARM and SH based SoC pinmux fixes for v3.10

Correct a typo in sh-pfc r8a7779

* tag 'renesas-pinmux-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  sh-pfc: r8a7779: tidyup intc_irq3_b typo

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-04-11 10:30:28 -07:00
Paul Bolle
3442a7b51d ARM: i.MX: remove unused ARCH_* configs
This removes the unused Kconfig options ARCH_MX5, ARCH_MX51,
ARCH_MX53 and MACH_MX21.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 21:07:36 +08:00
Sascha Hauer
e27da53bae ARM i.MX53: remove platform ahci support
The i.MX53 ahci platform support is unused in mainline. To demotivate
people using it just remove it from the tree.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 21:07:20 +08:00
Arnd Bergmann
9df00f634a Renesas ARM r8a7778 SoC update for v3.10
Update to the r8a7778 SoC:
 * Add SH Ethernet support
 * Add r8a7778_init_irq_extpin() to allow configuration of IRQ0 - IRQ3
   - This is a requirement for SMSC ethernet support
 * Cleanup: remove PLATFORM_INFO macro
 
 This pull request is based on:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRXj6zAAoJENfPZGlqN0++b5UP+gJlCY6SfXKCBvITT5vkTzG5
 UIkxR8YrhxVGjZJ5vdpe1rbf9/mVtXMM+NOvIpLss0+qNDi5pnIl2ghifj2hYzB9
 k2jwULUcvXcgiuaoSLDII/ClvYPatEy2Ld0FQmz3RKk3h9E2CdGepsYBpbQKRoYT
 ZSDzBWq/pjGMI7kTacCtGyh81xKWB+hZCQkD4eiPG9vcnYU1Al6JqaNe506L5mBG
 WjLPFZaAs9yXBbGEYZtdGD8s9qZQnKUoPjRLaBSWDtkc7CdvpP4GTCCFRgOKCQ3Z
 WHexhxzde9lp85oOvk9X+PQ6Q65CNHBa9Rl+P71/viURNANLeO0cfQusJ6NmqnDa
 1OYo9b7LGTvPTbKO/9A6GyCP8oX4ZJuDUMxSSUvdkWyM8TV23st4JneHS5bjWAj4
 GRJ4Fevq1qMioAle0HUOGCZMgAbmjiXwfWvh7RVBa2RcJziKjZH2zJxQX+LdKUWV
 xcnNkDFNK2YVn5l15JD+5xbKNiZx2YWTFcaLR5mSAjg10ppJonEWPtvPxq82PkGF
 KQq3HF9Pykgpt3BT8BZQtvLqwHV6qac0dLTqvJUdtNj2cvABuFjQS79xu0pXkvy6
 GDBmMyyLMiMECPHHzV7PDqSfrU+MYNbglIJ3U9HYs20rRvK4BgKXVuGVFjoVJtZE
 ttIn1kNxwuKI7kJcPq2d
 =ih3D
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-r8a7778-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman <horms+renesas@verge.net.au>:

Renesas ARM r8a7778 SoC update for v3.10

Update to the r8a7778 SoC:
* Add SH Ethernet support
* Add r8a7778_init_irq_extpin() to allow configuration of IRQ0 - IRQ3
  - This is a requirement for SMSC ethernet support
* Cleanup: remove PLATFORM_INFO macro

This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

* tag 'renesas-soc-r8a7778-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: R8A7778: add Ether support
  ARM: shmobile: r8a7778: add r8a7778_init_irq_extpin()
  ARM: shmobile: r8a7778: remove pointless PLATFORM_INFO()

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 14:44:07 +02:00
Arnd Bergmann
2fce7e1106 Renesas ARM r8a7779 SoC update for v3.10
Update to the r8a7779 SoC:
 * Add SH Ethernet support
 * Add comment describing clock ratios
 
 This pull request is based on:
 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJRXjspAAoJENfPZGlqN0++hK8P/1IPQUnrKWrySDJmDjgMVd6P
 yayOvZ5OAAHuhzvON+gkIk1VZ2Ic6fLcE0rPwTU+2WWjRfQ7Be7TRED73Ukl+/oN
 AOsUkOuuxILit/XQ+6LnMqFJMCz18Y6ZIQc9qgselMUVplNcYsDeHC1sawS9mBdi
 B13WPQU2mEEWhso7JLgNiIdLauf74N74hnzRDK6Xml7dOTgUBnH6QEOL7gud4jqP
 ymaauSfdkI58/swZY4DtIbnnchiVmrg4doTa1tdpaCQORYACTD1ahJaEfBxuScjy
 WK1O8XBDzYPVYhcVMXzu/PSKTkHtb+SJWVz81OthhNX4PFzk9bQuVXWqWz9kEiEY
 PFFRuPM8SMLFajtjsDVfj2EWUhbRagoAAIHKfL+yaDUXFGWwwOrRuoHKHtegx53o
 ArMwkYTDcD3UfHZhlVabtvG2Y/DabowYStamZjjtDP9pFERIvhXcZVaw8kcNZxpC
 ysj6bsA4lazoIa2v0g68TJSjxPPhzCgjJB+VcTE8Coe+voyP27CQwbMelFzyDl/z
 Grfi13UCly29MtqLH85txD3J4k40OCrKinnrblxk6RQBVRkHezMT5YLIVrdSu4FI
 oub/dsZi2scCHRb/5vS4/4sQIcoknDhE/0s5d1V51N6cu2AxspBRI/kbziDhQa9j
 X1jSjcp+/sbOkHq9y85H
 =YyOX
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2

From Simon Horman <horms+renesas@verge.net.au>:

Renesas ARM r8a7779 SoC update for v3.10

Update to the r8a7779 SoC:
* Add SH Ethernet support
* Add comment describing clock ratios

This pull request is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10

* tag 'renesas-soc-r8a7779-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: R8A7779: add Ether support
  ARM: shmobile: r8a7779: add each clocks ratio on comment area

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-09 14:43:00 +02:00
Magnus Damm
ab5fdfd5ea ARM: shmobile: force enable of r8a7790 arch timer
Implement a SoC-specific timer init function for
r8a7790 that makes sure the architected timer
is started regardless of boot loader setting.

Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-09 21:37:36 +09:00
Dirk Behme
e8094b2c17 ARM i.MX6: Fix ldb_di clock selection
According to the recent i.MX6 Quad technical reference manual, mode 0x4 (100b)
of the CCM_CS2DCR register (address 0x020C402C) bits [11-9] and [14-12] select
the PLL3 clock, and not the PLL3 PFD1 540M clock. In our code, the PLL3 root
clock is named 'pll3_usb_otg', select this instead of the 540M clock.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:48:09 +08:00
Shawn Guo
2bb4b70b1d ARM: imx: provide twd clock lookup from device tree
While booting from device tree, imx6q used to provide twd clock lookup
by calling clk_register_clkdev() in clock driver.  However, the commit
bd60345 (ARM: use device tree to get smp_twd clock) forces DT boot to
look up the clock from device tree.  It causes the failure below when
twd driver tries to get the clock, and hence kernel has to calibrate the
local timer frequency.

 smp_twd: clock not found -2
 ...
 Calibrating local timer... 396.13MHz.

Fix the regression by providing twd clock lookup from device tree, and
remove the unused twd clk_register_clkdev() call from clock driver.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:31 +08:00
Markus Pargmann
75498083e2 ARM: imx35 Bugfix admux clock
The admux clock seems to be the audmux clock as tests show. audmux does
not work without this clock enabled. Currently imx35 does not register a
clock device for audmux. This patch adds this registration. imx-audmux
driver already handles a clock device, so no changes are necessary
there.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:30 +08:00
Markus Pargmann
cab1e0a36c ARM: clk-imx35: Bugfix iomux clock
This patch enables iomuxc_gate clock. It is necessary to be able to
reconfigure iomux pads. Without this clock enabled, the
clk_disable_unused function will disable this clock and the iomux pads
are not configurable anymore. This happens at every boot. After a reboot
(watchdog system reset) the clock is not enabled again, so all iomux pad
reconfigurations in boot code are without effect.

The iomux pads should be always configurable, so this patch always
enables it.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Cc: stable@vger.kernel.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-04-09 19:46:30 +08:00
Magnus Damm
c9dff05030 ARM: shmobile: Add second I/O range for r8a7790 PFC
Add the GPIO I/O memory range to the r8a7790 PFC device.

This extra I/O memory range is needed when using the PFC
tables to drive both pin functions (using PINCTRL or
function GPIO for old code) and actual GPIO. The goal is
however to use a separate GPIO driver in the long run
and when that happens this extra I/O memory range can
be removed.

Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-04-09 17:58:42 +09:00
Kuninori Morimoto
407cd59798 sh-pfc: r8a7779: tidyup intc_irq3_b typo
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
2013-04-09 17:56:08 +09:00
Arnd Bergmann
797b3a9ee7 Merge branch 'gic/cleanup' into next/soc2
Both zynq and shmobile have conflicts against the gic cleanup
series, resolved here.

Conflicts:
	arch/arm/mach-shmobile/smp-emev2.c
	arch/arm/mach-shmobile/smp-r8a7779.c
	arch/arm/mach-shmobile/smp-sh73a0.c
	arch/arm/mach-zynq/platsmp.c
	drivers/gpio/gpio-pl061.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:59:19 +02:00
Arnd Bergmann
c985d7e325 Merge branch 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx into next/soc2
From Michal Simek <michal.simek@xilinx.com>:

This branch is based on zynq/clksrc/cleanup parts because
there are some dependencies on moving timer to generic location.

I could based it on standard Linux tagged version but you will get
several conflicts you will have to resolve.
If you are OK to resolving these problems, please let me know
I will create another branch with core-smp changes which are not based
on zynq/clksrc/cleanup branch.

* 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx:
  arm: zynq: Add hotplug support
  arm: zynq: Add smp support
  arm: zynq: Add smp_twd timer
  arm: zynq: Get rid of xilinx function prefix
  arm: zynq: Add support for system reset
  arm: zynq: Move slcr initialization to separate file
  arm: zynq: Load scu baseaddress at run time

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 18:42:16 +02:00
Linus Torvalds
31880c37c1 Linux 3.9-rc6 2013-04-07 20:49:54 -07:00