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Commit Graph

26813 Commits

Author SHA1 Message Date
Shawn Guo
45fe681034 ARM: imx: add clock support for imx6sl
Add clock support for i.MX6 SoloLite.  It uses the dtc marco support to
define all clock IDs in imx6sl-clock.h, which will be included by both
clock driver and device tree sources, so that the data will stay sync
all the time between kernel and DT.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:11 +08:00
Shawn Guo
c1e31d126b ARM: imx: create mxc_arch_reset_init_dt() for DT boot
The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to
get clock.  It's suitable for non-DT boot but not for DT boot where
dynamic mapping and of_clk_get() should be used instead.  Create
mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(),
and change DT platforms to use it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:10 +08:00
Shawn Guo
18cb680f1a ARM: imx: move clk_prepare() out from mxc_restart()
It's inappropriate to call clk_prepare() in mxc_restart(), because the
restart routine could be called in atomic context.  Move clk_get() and
clk_prepare() into mxc_arch_reset_init() and only have the atomic part
clk_enable() be called in mxc_restart().

As a result, mxc_arch_reset_init() needs to be called after clk gets
initialized.

While there, it also changes printk(KERN_ERR ...) to pr_err() and adds
__init annotation for mxc_arch_reset_init().

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:10 +08:00
Shawn Guo
24a83fe4b0 ARM: imx: include <asm/io.h> in hardware.h
As IOMEM is referenced in hardware.h, <asm/io.h> should be included
there.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:10 +08:00
Dirk Behme
2e603ad984 ARM: i.MX6: clk: add i.MX6 DualLite differences
The CCM_CBCMR register (address 0x02C4018) has different meaning
between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite.

Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the
i.MX6 Solo/DualLite doesn't have a gpu3d_shader configuration and
moves the gpu2_core configuration at that place.

Handle these i.MX6 Quad/Dual vs. i.MX6 Solo/DualLite clock differences
by using cpu_is_mx6dl().

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:09 +08:00
Dirk Behme
b3a9c31537 ARM: i.MX6: add i.MX6 specific L2 cache configuration
To improve the performance and power consumption add an i.MX6
specific L2 cache initialization.

This configuration is taken from Freescale's kernel patch

"ENGR00153601 [MX6]Adjust L2 cache parameter" [1]

with two additional improvements:

a) The L2X0_POWER_CTRL has only the two bits we set. So no need
   to read the register before. Remove the register read done
   in Freescale's patch.

b) In the L2X0_PREFETCH_CTRL register, besides the double linefill (bit[30]),
   additionally enable the instruction and data prefetch (bit[29-28]).

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

[1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
2013-06-17 15:45:09 +08:00
Martin Fuzzey
75f83d06c3 ARM: i.MX5: Allow DT clock providers
Currently clock providers defined in the DT are not registered
on i.MX5 platforms since of_clk_init() is not called.

This is not a problem for the SOC's own clocks, which are registered
in code,  but prevents the DT being used to define clocks for external
hardware.

Fix this by calling of_clk_init() and actually using the DT to obtain
the 4 SOC fixed clocks.
These are already defined in the DT but were previously just used to
manually obtain the rate.

Fall back to the old scheme for non DT platforms.

Since the same method may be useful for other i.MX platforms
implement the imx_obtain_fixed_clock() function in common code.

Actually changing other i.MX platforms to use this should be done
later by someone with access to the appropriate hardware.

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17 15:45:09 +08:00
Linus Torvalds
e6694d984a ARM: SoC fixes for 3.10-rc
Another week, another batch of fixes for arm-soc platforms.
 
 Again, nothing controversial. A few more than would be ideal, but all
 are valid fixes. In particular the prima2 panic patch is critical since
 it fixes a problem where multiplatform kernels panic on all but prima2
 hardware.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "These are a little later than I planned on since I got caught up with
  handling merges for 3.11 most of the week.

  Another week, another batch of fixes for arm-soc platforms.

  Again, nothing controversial.  A few more than would be ideal, but all
  are valid fixes.  In particular the prima2 panic patch is critical
  since it fixes a problem where multiplatform kernels panic on all but
  prima2 hardware."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: SAMSUNG: pm: Adjust for pinctrl- and DT-enabled platforms
  ARM: prima2: fix incorrect panic usage
  arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
  ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().
  ARM: omap3: clock: fix wrong container_of in clock36xx.c
  ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
  ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
  ARM: dts: AM33xx: Fix properties on gpmc node
  arm: omap2: fix AM33xx hwmod infos for UART2
  ARM: OMAP3: Fix iva2_pwrdm settings for 3703
2013-06-15 11:49:48 -10:00
Olof Johansson
323226bbb3 mvebu fixes for v3.10 round 4
- mvebu
     - fix PCIe ranges property so NOR flash is visible
 
  - kirkwood
     - fix identification of 88f6282 so MPPs can be set correctly
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Merge tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper, mvebu fixes for v3.10 round 4:
 - mvebu
    - fix PCIe ranges property so NOR flash is visible
 - kirkwood
    - fix identification of 88f6282 so MPPs can be set correctly

* tag 'fixes-3.10-4' of git://git.infradead.org/users/jcooper/linux:
  arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
  ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-11 17:05:56 -07:00
Tomasz Figa
cd3fc1b9a3 ARM: SAMSUNG: pm: Adjust for pinctrl- and DT-enabled platforms
This patch makes legacy code on suspend/resume path being executed
conditionally, on non-DT platforms only, to fix suspend/resume of
DT-enabled systems, for which the code is inappropriate.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[olof: add #include <linux/of.h>]
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-11 01:10:12 -07:00
Haojian Zhuang
7e5955db45 ARM: prima2: fix incorrect panic usage
In prima2, some functions of checking DT is registered in initcall
level. If it doesn't match the compatible name of sirf, kernel
will panic. It blocks the usage of multiplatform on other verndor.

The error message is in below.

Knic - not syncing: unable to find compatible pwrc node in dtb
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86
[<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1)
[<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8)
[<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x)
[<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal)
[<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab)
[<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0)
[<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c)

Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-11 00:11:31 -07:00
Linus Torvalds
0b52a3c89c Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King:
 "The biggest two fixes are fixing a compilation error with the
  decompressor, and a problem with our __my_cpu_offset implementation.

  Other changes are very trivial and small, which seems to be the way
  for most -rc stuff."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()
  ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table
  ARM: 7743/1: compressed/head.S: work around new binutils warning
  ARM: 7742/1: topology: export cpu_topology
  ARM: 7737/1: fix kernel decompressor compilation error with CONFIG_DEBUG_SEMIHOSTING
2013-06-09 17:15:56 -07:00
Olof Johansson
f1d6e31de1 A set of small fixes for omaps for the -rc cycle:
- am7303 iva2 reset PM regression fix
 - am33xx uart2 dma channel fix
 - am33xx gpmc properties fix
 - omap44xx rtc wake-up mux fix for nirq pins
 - omap36xx clock divider restore fix
 
 There's also one tiny non-critical .dts fix for omap5
 timer pwm properties.
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Merge tag 'omap-for-v3.10/fixes-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren, a set of small fixes for omaps for the -rc cycle:

- am7303 iva2 reset PM regression fix
- am33xx uart2 dma channel fix
- am33xx gpmc properties fix
- omap44xx rtc wake-up mux fix for nirq pins
- omap36xx clock divider restore fix

There's also one tiny non-critical .dts fix for omap5
timer pwm properties.

* tag 'omap-for-v3.10/fixes-v3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap3: clock: fix wrong container_of in clock36xx.c
  ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
  ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
  ARM: dts: AM33xx: Fix properties on gpmc node
  arm: omap2: fix AM33xx hwmod infos for UART2
  ARM: OMAP3: Fix iva2_pwrdm settings for 3703
2013-06-09 11:44:17 -07:00
Linus Torvalds
50b4b9c3e8 ARM: SoC fixes for 3.10-rc
Another week, another batch of fixes for arm-soc platforms.
 
 Nothing controversial here, a handful of fixes for regressions and/or
 serious problems across several of the platforms. Things are slowing
 down nicely on fix rates for 3.10.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Another week, another batch of fixes for arm-soc platforms.

  Nothing controversial here, a handful of fixes for regressions and/or
  serious problems across several of the platforms.  Things are slowing
  down nicely on fix rates for 3.10"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
  ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins
  ARM: mxs: icoll: Fix interrupts gpio bank 0
  ARM: imx: clk-imx6q: AXI clock select index is incorrect
  ARM: bcm2835: override the HW UART periphid
  ARM: mvebu: Fix bug in coherency fabric low level init function
  ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
  ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
  ARM: ux500: Only configure wake-up reasons on ux500 based platforms
  ARM: dts: imx: fix clocks for cspi
  ARM i.MX6q: fix for ldb_di_sels
2013-06-08 11:56:22 -07:00
Olof Johansson
3d0d8b9155 The imx fixes for 3.10, take 2:
- One device tree fix for all spi node to have per clock added.
   The clock is needed by spi driver to calculate bit rate divisor.
   The spi node in the current device trees either does not have the
   clock or is defined as dummy clock, in which case the driver probe
   will fail or spi will run at a wrong bit rate.
 
 - Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.
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Merge tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes

From Shawn Guo, imx fixes for 3.10, take 2:

- One device tree fix for all spi node to have per clock added.
  The clock is needed by spi driver to calculate bit rate divisor.
  The spi node in the current device trees either does not have the
  clock or is defined as dummy clock, in which case the driver probe
  will fail or spi will run at a wrong bit rate.

- Two imx6q clock fixes, which correct axi_sels and ldb_di_sels.

* tag 'imx-fixes-3.10-2' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: imx: clk-imx6q: AXI clock select index is incorrect
  ARM: dts: imx: fix clocks for cspi
  ARM i.MX6q: fix for ldb_di_sels

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:18:19 -07:00
Doug Anderson
9c1fcdccc7 ARM: exynos: add debug_ll_io_init() call in exynos_init_io()
If the early MMU mapping of the UART happens to get booted out of the
TLB between the start of paging_init() and when we finally re-add the
UART at the very end of s3c_init_cpu(), we'll get a hang at bootup if
we've got early_printk enabled.  Avoid this hang by calling
debug_ll_io_init() early.

Without this patch, you can reliably reproduce a hang when early
printk is enabled by adding flush_tlb_all() at the start of
exynos_init_io().  After this patch the hang goes away.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:12:00 -07:00
Olof Johansson
fb565ff7c8 Renesas ARM based SoC fixes for v3.10
* Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
   This avoids conflicts when the USB_OVCn pins are used by another function.
   This has been observed to be a problem in v3.10-rc1.
 
 * Update CMT clock rating for sh73a0 SoC to resolve boot failure
   on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.
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Merge tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

From Simon Horman, Renesas ARM based SoC fixes for v3.10:
- Correction to USB OVC and PENC pin groupings on r8a7779 SoC.
  This avoids conflicts when the USB_OVCn pins are used by another function.
  This has been observed to be a problem in v3.10-rc1.
- Update CMT clock rating for sh73a0 SoC to resolve boot failure
  on kzm9g-reference. This resolves a regression between v3.9 and v3.10-rc1.

* tag 'renesas-fixes-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
  sh-pfc: r8a7779: Don't group USB OVC and PENC pins

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:11:02 -07:00
Tushar Behera
437d8ac510 ARM: EXYNOS: uncompress - print debug messages if DEBUG_LL is defined
Printing low-level debug messages make an assumption that the specified
UART port has been preconfigured by the bootloader. Incorrectly
specified UART port results in system getting stalled while printing the
message "Uncompressing Linux... done, booting the kernel"
This UART port number is specified through S3C_LOWLEVEL_UART_PORT. Since
the UART port might different for different board, it is not possible to
specify it correctly for every board that use a common defconfig file.

Calling this print subroutine only when DEBUG_LL fixes the problem. By
disabling DEBUG_LL in default config file, we would be able to boot
multiple boards with different default UART ports.

With this current approach, we miss the print "Uncompressing Linux...
done, booting the kernel." when DEBUG_LL is not defined.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-07 18:09:22 -07:00
Tony Lindgren
03c0d27119 More OMAP hwmod and clock fixes for v3.10-rc. Fixes the AM33xx UART2.
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
 at the very least.
 
 Basic test logs for this branch are here:
 
 http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/
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Merge tag 'omap-fixes-b-for-3.10-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/fixes

More OMAP hwmod and clock fixes for v3.10-rc.  Fixes the AM33xx UART2.
Also fixes some CCF-related breakage on OMAP36xx/37xx, affecting DSS
at the very least.

Basic test logs for this branch are here:

http://www.pwsan.com/omap/testlogs/fixes_b_v3.10-rc/20130606093449/
2013-06-07 15:06:18 -07:00
Tony Lindgren
17f545ca17 Merge branch 'dts-fixes-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.10/fixes 2013-06-07 15:05:36 -07:00
Thomas Petazzoni
5f1f3d5088 arm: mvebu: armada-xp-{gp,openblocks-ax3-4}: specify PCIe range
The ranges DT entry needed by the PCIe controller is defined at the
SoC .dtsi level. However, some boards have a NOR flash, and to support
it, they need to override the SoC-level ranges property to add an
additional range. Since PCIe and NOR support came separately, some
boards were not properly changed to include the PCIe range in their
ranges property at the .dts level.

This commit fixes those platforms.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-06-06 19:09:00 +00:00
Nicolas Schichan
4089fe95bf ARM: Kirkwood: handle mv88f6282 cpu in __kirkwood_variant().
MPP_F6281_MASK would be previously be returned when on mv88f6282,
which would disallow some valid MPP configurations.

Commit 830f8b91 (arm: plat-orion: fix printing of "MPP config
unavailable on this hardware") made this problem visible as an invalid
MPP configuration is now correctly detected and not applied.

Signed-off-by: Nicolas Schichan <nschichan@freebox.fr>
Cc: <stable@vger.kernel.org> # v3.9.x
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-06-06 18:16:04 +00:00
Jean-Philippe Francois
a93d8a1cea ARM: omap3: clock: fix wrong container_of in clock36xx.c
omap36xx_pwrdn_clk_enable_with_hsdiv_restore expects the parent hw of
the clock to be a clk_hw_omap. However, looking at cclock3xxx_data.c,
all concerned clock have parent defined as clk_divider.  Fix the
function to use clk_divider.  Tested with 3.9 on dm3730.

Signed-off-by: Jean-Philippe François <jp.francois@cynove.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-06-06 08:48:07 -06:00
Peter Zijlstra
29eb77825c arch, mm: Remove tlb_fast_mode()
Since the introduction of preemptible mmu_gather TLB fast mode has been
broken. TLB fast mode relies on there being absolutely no concurrency;
it frees pages first and invalidates TLBs later.

However now we can get concurrency and stuff goes *bang*.

This patch removes all tlb_fast_mode() code; it was found the better
option vs trying to patch the hole by entangling tlb invalidation with
the scheduler.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Reported-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-06-06 10:07:26 +09:00
Will Deacon
509eb76ebf ARM: 7747/1: pcpu: ensure __my_cpu_offset cannot be re-ordered across barrier()
__my_cpu_offset is non-volatile, since we want its value to be cached
when we access several per-cpu variables in a row with preemption
disabled. This means that we rely on preempt_{en,dis}able to hazard
with the operation via the barrier() macro, so that we can't end up
migrating CPUs without reloading the per-cpu offset.

Unfortunately, GCC doesn't treat a "memory" clobber on a non-volatile
asm block as a side-effect, and will happily re-order it before other
memory clobbers (including those in prempt_disable()) and cache the
value. This has been observed to break the cmpxchg logic in the slub
allocator, leading to livelock in kmem_cache_alloc in mainline kernels.

This patch adds a dummy memory input operand to __my_cpu_offset,
forcing it to be ordered with respect to the barrier() macro.

Cc: <stable@vger.kernel.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:35:56 +01:00
Marc C
ced2a3b849 ARM: 7750/1: update legacy CPU ID in decompressor cache support jump table
The previous mask values for the legacy ARM CPU IDs were conflicting
with the CPU ID assignments for late-generation CPUs (like the
Qualcomm MSM/QSD or Broadcom Brahma-15 processors). This change
corrects the legacy ARM CPU ID value so that the jump table can
fall-through to the appropriate cache maintenance / MMU functions.

Signed-off-by: Marc C <marc.ceeeee@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:32:40 +01:00
Arnd Bergmann
da94a82930 ARM: 7743/1: compressed/head.S: work around new binutils warning
In August 2012, Matthew Gretton-Dann checked a change into binutils
labelled "Error on obsolete & warn on deprecated registers", apparently as
part of ARMv8 support. Apparently, this was supposed to emit the message
"Warning: This coprocessor register access is deprecated in ARMv8" when
using certain mcr/mrc instructions and building for ARMv8. Unfortunately,
the message that is actually emitted appears to be '(null)', which is
less helpful in comparison.

Even more unfortunately, this is biting us on every single kernel
build with a new gas, because arch/arm/boot/compressed/head.S and some
other files in that directory are built with -march=all since kernel
commit 80cec14a8 "[ARM] Add -march=all to assembly file build in
arch/arm/boot/compressed" back in v2.6.28.

This patch reverts Russell's nice solution and instead marks the head.S
file to be built for armv7-a, which fortunately lets us build all
instructions in that file without warnings even on the broken binutils.

Without this patch, building anything results in:

arch/arm/boot/compressed/head.S: Assembler messages:
arch/arm/boot/compressed/head.S:565: Warning: (null)
arch/arm/boot/compressed/head.S:676: Warning: (null)
arch/arm/boot/compressed/head.S:698: Warning: (null)
arch/arm/boot/compressed/head.S:722: Warning: (null)
arch/arm/boot/compressed/head.S:726: Warning: (null)
arch/arm/boot/compressed/head.S:957: Warning: (null)
arch/arm/boot/compressed/head.S:996: Warning: (null)
arch/arm/boot/compressed/head.S:997: Warning: (null)
arch/arm/boot/compressed/head.S:1027: Warning: (null)
arch/arm/boot/compressed/head.S:1035: Warning: (null)
arch/arm/boot/compressed/head.S:1046: Warning: (null)
arch/arm/boot/compressed/head.S:1060: Warning: (null)
arch/arm/boot/compressed/head.S:1092: Warning: (null)
arch/arm/boot/compressed/head.S:1094: Warning: (null)
arch/arm/boot/compressed/head.S:1095: Warning: (null)
arch/arm/boot/compressed/head.S:1102: Warning: (null)
arch/arm/boot/compressed/head.S:1134: Warning: (null)

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: stable@vger.kernel.org
Cc: Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:32:27 +01:00
Arnd Bergmann
92bdd3f5eb ARM: 7742/1: topology: export cpu_topology
The cpu_topology symbol is required by any driver using the topology
interfaces, which leads to a couple of build errors:

ERROR: "cpu_topology" [drivers/net/ethernet/sfc/sfc.ko] undefined!
ERROR: "cpu_topology" [drivers/cpufreq/arm_big_little.ko] undefined!
ERROR: "cpu_topology" [drivers/block/mtip32xx/mtip32xx.ko] undefined!

The obvious solution is to export this symbol.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:32:26 +01:00
Nicolas Pitre
2752367979 ARM: 7737/1: fix kernel decompressor compilation error with CONFIG_DEBUG_SEMIHOSTING
Selecting this option produces:

  AS      arch/arm/boot/compressed/debug.o
arch/arm/boot/compressed/debug.S:4:33: fatal error: mach/debug-macro.S: No such file or directory
compilation terminated.
make[3]: *** [arch/arm/boot/compressed/debug.o] Error 1

The semihosting support cannot be modelled into a senduart macro as
it requires memory space for argument passing.  So the
CONFIG_DEBUG_LL_INCLUDE may not have any sensible value and the include
directive should be omitted.

While at it, let's add proper semihosting output support to the
decompressor.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-05 23:32:24 +01:00
Linus Torvalds
8b35c35955 Merge branch 'fixes' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm bugfixes from Gleb Natapov:
 "The bulk of the fixes is in MIPS KVM kernel<->userspace ABI.  MIPS KVM
  is new for 3.10 and some problems were found with current ABI.  It is
  better to fix them now and do not have a kernel with broken one"

* 'fixes' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  KVM: Fix race in apic->pending_events processing
  KVM: fix sil/dil/bpl/spl in the mod/rm fields
  KVM: Emulate multibyte NOP
  ARM: KVM: be more thorough when invalidating TLBs
  ARM: KVM: prevent NULL pointer dereferences with KVM VCPU ioctl
  mips/kvm: Use ENOIOCTLCMD to indicate unimplemented ioctls.
  mips/kvm: Fix ABI by moving manipulation of CP0 registers to KVM_{G,S}ET_ONE_REG
  mips/kvm: Use ARRAY_SIZE() instead of hardcoded constants in kvm_arch_vcpu_ioctl_{s,g}et_regs
  mips/kvm: Fix name of gpr field in struct kvm_regs.
  mips/kvm: Fix ABI for use of 64-bit registers.
  mips/kvm: Fix ABI for use of FPU.
2013-06-05 09:09:35 +09:00
Simon Horman
5600a84856 ARM: shmobile: sh73a0: Update CMT clockevent rating to 80
Update the CMT clockevent rating from 125 to 80.

This resolves a boot-failure regression for kzm9g-reference in v3.10-rc1
introduced by f7db706b13 ("ARM: 7674/1: smp:
Avoid dummy clockevent being preferred over real").

The patch noted above reduces the rating of dummy clockevent from 400 to 100.
This patch reduces the rating of CMT so that it is once again less than that
of the dummy clockevent.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-04 14:37:53 +09:00
Suman Anna
8341613afb ARM: dts: OMAP5: Fix missing PWM capability to timer nodes
OMAP5 has 6 timers (GPTimers 5, 6, 8 to 11) that are capable of PWM.
The PWM capability property is missing from the node definitions of
couple of timers.

Add ti,timer-pwm attribute for timer 5, 6, 8 and 11.

Signed-off-by: Suman Anna <s-anna@ti.com>
[benoit.cousson@linaro.org: Update changelog and subject to highlight
the fix]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:55:30 +02:00
Kevin Hilman
1e68f43b7d ARM: dts: omap4-panda|sdp: Fix mux for twl6030 IRQ pin and msecure line
Earlier commits ensured proper muxing of pins related to proper
TWL6030 behavior: see commit 265a2bc8 (ARM: OMAP3: TWL4030: ensure
sys_nirq1 is mux'd and wakeup enabled) and commit 1ef43369 (ARM:
OMAP4: TWL: mux sys_drm_msecure as output for PMIC).

However these only fixed legacy boot and not DT boot.  For DT boot,
the default mux values need to be set properly in DT.

Special thanks to Nishanth Menon for the review and catching some
major flaws in earlier versions.

Tested on OMAP4430/Panda and OMAP4460/Panda-ES.

Cc: Nishanth Menon <nm@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
[benoit.cousson@linaro.org: Slightly change the subject to align
board name with file name]
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:55:29 +02:00
Lars Poeschel
00dddcaa51 ARM: dts: AM33xx: Fix properties on gpmc node
The gpmc driver is actually looking for "gpmc,num-cs" and
"gpmc,num-waitpins" properties in DT. The binding doc also states
this.
Correct the properties in the dts to provide the right values for the
gpmc driver.

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
2013-06-03 14:55:28 +02:00
Thomas Petazzoni
768dc16397 arm: omap2: fix AM33xx hwmod infos for UART2
The UART2 hwmod structure is pointing to the EDMA channels of UART1,
which doesn't look right. This patch fixes this by making the UART2
hwmod structure to a new structure that lists the EDMA channels to be
used by the UART2.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-06-03 03:26:32 -06:00
Marc Zyngier
d4cb9df5d1 ARM: KVM: be more thorough when invalidating TLBs
The KVM/ARM MMU code doesn't take care of invalidating TLBs before
freeing a {pte,pmd} table. This could cause problems if the page
is reallocated and then speculated into by another CPU.

Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-06-03 10:58:56 +03:00
Andre Przywara
e8180dcaa8 ARM: KVM: prevent NULL pointer dereferences with KVM VCPU ioctl
Some ARM KVM VCPU ioctls require the vCPU to be properly initialized
with the KVM_ARM_VCPU_INIT ioctl before being used with further
requests. KVM_RUN checks whether this initialization has been
done, but other ioctls do not.
Namely KVM_GET_REG_LIST will dereference an array with index -1
without initialization and thus leads to a kernel oops.
Fix this by adding checks before executing the ioctl handlers.

 [ Removed superflous comment from static function - Christoffer ]

Changes from v1:
 * moved check into a static function with a meaningful name

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-06-03 10:58:56 +03:00
Anson Huang
a08b9bc586 ARM: imx: clk-imx6q: AXI clock select index is incorrect
The AXI clock mux should be as below:

00: periph;
01: pll2_pfd2_396m;
10: periph;
11: pll3_pfd1_540m;

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-03 13:47:12 +08:00
Olof Johansson
0b6825585b Ux500 fixes for v3.10:
- A multiplatform fix making sure ux500_idle_init() is only
   executed on ux500.
 - A regulator fix making sure the MMC/SD card regulator is
   not disabled on boot.
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Merge tag 'ux500-arm-soc-v3.10-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes

From Linus Walleij, ux500 fixes for v3.10:
- A multiplatform fix making sure ux500_idle_init() is only executed on ux500.
- A regulator fix making sure the MMC/SD card regulator is not disabled on boot.

Signed-off-by: Olof Johansson <olof@lixom.net>

* tag 'ux500-arm-soc-v3.10-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
  ARM: ux500: Only configure wake-up reasons on ux500 based platforms
2013-06-02 11:51:04 -07:00
Jongsung Kim
13731d862c ARM: bcm2835: override the HW UART periphid
Stephen Warren reported the recent commit 78506f2 (add support for
extended FIFO-size of PL011-r1p5) breaks the serial port on the
BCM2835 ARM SoC.

A UART compatible with the ARM PL011-r1p5 should have 32-deep FIFOs.
The BCM2835 UART just looks like an ARM PL011-r1p5, but has 16-deep
FIFOs just like PL011-r1p4 or earlier revisions. As a workaround for
this compatibility issue, this patch overrides the HW UART periphid
register values with the actually compatible UART periphid 0x00241011
(r1p3 or r1p4).

Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jongsung Kim <neidhard.kim@lge.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-02 11:50:41 -07:00
Olof Johansson
04b5e56fc3 Merge tag 'fixes-3.10-3' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper, mvebu fixes for v3.10 round 3:
 - mvebu
    - fix bug in coherency fabric low level init
 - kirkwood
    - fix crash from pcie double init

Signed-off-by: Olof Johansson <olof@lixom.net>

* tag 'fixes-3.10-3' of git://git.infradead.org/users/jcooper/linux:
  ARM: mvebu: Fix bug in coherency fabric low level init function
  ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
2013-06-02 11:50:40 -07:00
Tony Lindgren
2d403f7b19 ARM: OMAP3: Fix iva2_pwrdm settings for 3703
Commit a819c4f1 (ARM: OMAP3: PM: Only access IVA if one exists)
changed PM to not access IVA registers on omaps that don't have
them. Turns out we still need to idle iva2 as otherwise
iva2_pwrdm will stay on and block deeper idle states.

It seems that the only part of the reset that may not be needed
is the setting of the iva2 boot mode to idle. But as that register
seems to be there and is harmless if no iva2 is on the SoC, it's
probably safest to do the complete reset.

Acked-by: Mark A. Greer <mgreer@animalcreek.com>
Acked-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-05-30 12:44:47 -07:00
Linus Torvalds
7b55eab81e Pin control fixes for v3.10:
- Six patches fixing up the suspend/resume and wakeup
   handling of the Samsung and Exynos drivers.
 - Errorpath fixes for four different drivers. All on
   the probe() errorpath.
 - Make the debugfs code for pin config take the right
   mutex.
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Merge tag 'pinctrl-fixes-v3.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin-control fixes from Linus Walleij:
 - Six patches fixing up the suspend/resume and wakeup handling of the
   Samsung and Exynos drivers.
 - Errorpath fixes for four different drivers.  All on the probe()
   errorpath.
 - Make the debugfs code for pin config take the right mutex.

* tag 'pinctrl-fixes-v3.10-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: pinconf: take the right mutex
  pinctrl: sunxi: fix error return code in sunxi_pinctrl_probe()
  pinctrl: exynos: Handle suspend/resume of GPIO EINT registers
  pinctrl: samsung: Allow per-bank SoC-specific private data
  pinctrl: samsung: Add support for SoC-specific suspend/resume callbacks
  pinctrl: Don't override the error code in probe error handling
  ARM: EXYNOS: Fix EINT wake-up mask configuration when pinctrl is used
  pinctrl: exynos: Add support for set_irq_wake of wake-up EINTs
  pinctrl: samsung: fix suspend/resume functionality
2013-05-30 08:54:29 +09:00
Linus Torvalds
c476321533 ARM: Exynos fixes for 3.10-rc
Here's a shorter set of fixes for 3.10, all for Samsung Exynos platforms.
 
 It also includes a defconfig update so that exynos_defconfig provides
 a meaningful set of drivers to boot an unmodified kernel on the Samsung
 ARM-based Chromebooks.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM Exynos fixes from Olof Johansson:
 "Here's a shorter set of fixes for 3.10, all for Samsung Exynos
  platforms.

  It also includes a defconfig update so that exynos_defconfig provides
  a meaningful set of drivers to boot an unmodified kernel on the
  Samsung ARM-based Chromebooks."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  ARM: exynos: defconfig update
  ARM: SAMSUNG: Add names to fimd0 IRQ resources
  ARM: EXYNOS: fix software reset logic for EXYNOS5440 SOC
  ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
  ARM: dts: Enabling samsung-usb2phy driver for exynos5250
2013-05-29 19:24:55 +09:00
Olof Johansson
da9d0fbf5e ARM: exynos: defconfig update
This turns on a number of configs that are useful on the Chromebook, but also
good to have on in general:

* USB host and MMC drivers(!)
* I2C GPIO arbitration driver
* CYAPA trackpad driver
* simplefb
* CROS EC and keyboard drivers
* S5M8767 driver
* MAX77686 drivers
* MAX8997 driver
* DEVTMPFS + mount
* DM_CRYPT (as module)
* CRYPTOLOOP
* HIGHMEM
* PRINTK timestamps

This also turns off DEBUG_LL, and switches the hardcoded Samsung lowlevel
uart to uart 3 (which is only used to show the "uncompressing kernel"
message at boot, it seems).

Signed-off-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
2013-05-28 17:21:41 -07:00
Nadav Haklai
b60b61d412 ARM: mvebu: Fix bug in coherency fabric low level init function
When adding CPU to the SMP group and enabling the coherency on this
CPU we must protect the register access.
The previous implementation claims to be atomic but doesn't provide
any protection against parallel access to the coherency fabric control
and configuration registers.

This patch fixes this by using the ldrex and strex mechanism.
This method should be used in all accesses to those registers.

[gregory.clement@free-electrons.com: fixed the commit's topic]
Signed-off-by: Nadav Haklai <nadavh@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-28 14:50:08 +00:00
Andrew Lunn
e89b405809 ARM: Kirkwood: TS219: Fix crash by double PCIe instantiation
When creating the DT based boards-ts219.c the none DT ts219-setup.c
was used as a template. This includes a lateinit() call to initialize
the PCIe bus. The code makes use of machine_is_ts219() which is never
true on DT, so a FIXME was added and the code left as is. This was
unproblematic until b73690c8f8: "ARM: Kirkwood: Support basic
hotplug for PCI-E" which changes the way the PCIe bus is
initialized. The non-DT ts219-setup.c now crashes during boot.  The
lateinit() call in the DT boards-ts219.c is being called,
machine_is_ts219() is true and so the PCIe is initialized a second
time.

This patch removes the useless, and now clearly dangerous, code from
boards-ts219.c, making ts219-setup.c work again.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.9.x
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-28 14:50:06 +00:00
Olof Johansson
81c0d9047f Fixes following for v3.10
- to get usb2 working on the Chromebook with adding the
   usb phy node for usb2 on exynos5250
 - supporting exynos4210 rev0 SoC
 - exynos5440 restart applying only to powered-on domains
 - drm-exynos probe failure with adding resource names to
   fimd0 platform device
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Merge tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

From Kukjin Kim:

Fixes following for v3.10
- to get usb2 working on the Chromebook with adding the
  usb phy node for usb2 on exynos5250
- supporting exynos4210 rev0 SoC
- exynos5440 restart applying only to powered-on domains
- drm-exynos probe failure with adding resource names to
  fimd0 platform device

* tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: Add names to fimd0 IRQ resources
  ARM: EXYNOS: fix software reset logic for EXYNOS5440 SOC
  ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
  ARM: dts: Enabling samsung-usb2phy driver for exynos5250
2013-05-27 19:26:30 -07:00
Tomasz Figa
b134dc3fea ARM: EXYNOS: Fix EINT wake-up mask configuration when pinctrl is used
On DT-enabled systems pinctrl-exynos driver is responsible for handling
of wake-up EINT interrupts. This patch adjusts wake-up mask
configuration code to take wake-up mask value from pinctrl-exynos driver
on DT-enabled systems.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 15:37:08 +02:00
Lee Jones
67b7c75e1a ARM: ux500: Provide supplies for AUX1, AUX2 and AUX3
This patch fixes a bug introduced in the v3.10 merge window.

The AB8500 External Regulator driver has recently landed upstream,
which registers each of the 3 external regulators located on the
AB8500. If these regulators are marked as 'always on', there is a
potential for power-loss. If they're not and are seemingly unused
the Regulator subsystem will attempt to disable them to save power.
This causes an issue for AUX1, AUX2 and AUX3 as they obtain their
power from EXT3. So we're specifying that here to prevent EXT3 from
being powered down.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-27 14:08:20 +02:00