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Commit Graph

374 Commits

Author SHA1 Message Date
Ben Skeggs
5a5c7432bb drm/nouveau/timer: port to subdev interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:48 +10:00
Ben Skeggs
7d9115dee9 drm/nouveau/mc: port to subdev interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:47 +10:00
Ben Skeggs
cb75d97e9c drm/nouveau: implement devinit subdev, and new init table parser
v2:
- make sure not to execute display scripts unless resuming

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:47 +10:00
Ben Skeggs
70790f4f81 drm/nouveau/clock: pull in the implementation from all over the place
Still missing the main bits we use to change performance levels, I'll get
to it after all the hard yakka has been finished.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:47 +10:00
Ben Skeggs
e0996aea4c drm/nouveau/gpio: port gpio to subdev interfaces
v2: Ben Skeggs <bskeggs@redhat.com>
- rebase on top of v3.6-rc6 with gpio reset patch integrated already

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:45 +10:00
Ben Skeggs
cd42439da4 drm/nouveau/oldbios: remove shadowing support, use bios subdev's image
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:45 +10:00
Ben Skeggs
586c55f6ad drm/nouveau: have non-core mmio accesses go through device object
Adds an extra layer of indirection to each register access, but it's not
too bad, and will also go away as pieces are ported.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:44 +10:00
Ben Skeggs
9458029940 drm/nouveau: implement module init functions in nouveau_drm.c
These currently just call the existing ones in nouveau_drv.c, but will be
extended in upcoming commits.  This needed to be separated from the current
code as there will be some header clashes until things are ported.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:44 +10:00
Ben Skeggs
aa4cc5d274 drm/nouveau/agp: move all agp stuff into its own source file
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:43 +10:00
Ben Skeggs
02a841d434 drm/nouveau: restructure source tree, split core from drm implementation
Future work will be headed in the way of separating the policy supplied by
the nouveau drm module from the mechanisms provided by the driver core.

There will be a couple of major classes (subdev, engine) of driver modules
that have clearly defined tasks, and the further directory structure change
is to reflect this.

No code changes here whatsoever, aside from fixing up a couple of include
file pathnames.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-10-03 13:12:43 +10:00
Marcin Slusarz
715855457e drm/nouveau: init vblank requests list
Fixes kernel panic when vblank interrupt triggers before first sync to
vblank request.

(Besides init, remove some relevant leftovers from vblank rework)

Reported-by: Ortwin Glück <odi@odi.ch>
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Cc: stable@vger.kernel.org [3.5]
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-07-26 10:28:16 +10:00
Ben Skeggs
0ade74b6c6 drm/nv50: extend vblank semaphore to generic dmaobj + offset pair
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-07-26 10:28:16 +10:00
Ben Skeggs
2a259a3d84 drm/nouveau: mark most of our ioctls as deprecated, move to compat layer
These will be replaced in the near future, the code isn't yet stable enough
for this merge window however.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-07-26 10:28:15 +10:00
Ben Skeggs
ce22af03da drm/nouveau: move current gpuobj code out of nouveau_object.c
I want this file for the new interfaces...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-07-26 10:28:15 +10:00
Dave Airlie
35916acedd nouveau: add vmap support to nouveau prime support
Tested sharing to udl.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-31 14:14:00 +01:00
Ben Skeggs
d1b167e168 drm/nouveau/ttm: untangle code to support accelerated buffer moves
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:56:16 +10:00
Ben Skeggs
c420b2dc8d drm/nouveau/fifo: turn all fifo modules into engine modules
Been tested on each major revision that's relevant here, but I'm sure there
are still bugs waiting to be ironed out.

This is a *very* invasive change.

There's a couple of pieces left that I don't like much (eg. other engines
using fifo_priv for the channel count), but that's an artefact of there
being a master channel list still.  This is changing, slowly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:56:11 +10:00
Ben Skeggs
67b342efc7 drm/nouveau/fifo: remove all the "special" engine hooks
All the places this stuff is actually needed tends to be chipset-specific
anyway, so we're able to just inline the register bashing instead.

The parts of the common code that still directly touch PFIFO temporarily
have conditionals, these will be removed in subsequent commits that will
refactor the fifo modules into engine modules like graph/mpeg etc.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:56:00 +10:00
Ben Skeggs
5e120f6e4b drm/nouveau/fence: convert to exec engine, and improve channel sync
Now have a somewhat simpler semaphore sync implementation for nv17:nv84,
and a switched to using semaphores as fences on nv84+ and making use of
the hardware's >= acquire operation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:55:53 +10:00
Ben Skeggs
d375e7d56d drm/nouveau/fence: minor api changes for an upcoming rework
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:55:46 +10:00
Ben Skeggs
875ac34aad drm/nouveau/fence: make ttm interfaces wrap ours, not the other way around
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:55:44 +10:00
Ben Skeggs
35bcf5d555 drm/nouveau: move flip-related channel setup to software engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:55:43 +10:00
Ben Skeggs
20abd1634a drm/nouveau: create real execution engine for software object class
Just a cleanup more or less, and to remove the need for special handling of
software objects.

This removes a heap of documentation on dma/graph object formats.  The info
is very out of date with our current understanding, and is far better
documented in rnndb in envytools git.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:55:41 +10:00
Ben Skeggs
d58086deaa drm/nv40-50/gr: restructure grctx/prog generation
The conditional definition of the generation helper functions apparently
confuses some IDEs....

Reported-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:31:58 +10:00
Ben Skeggs
ab394543dd drm/nve0/gr: initial implementation
This may, perhaps, get re-merged with nvc0_graph.c at some point.  It's
still unclear as to how great an idea that'd be.  Stay tuned...

Completely dependent on firmware blobs from NVIDIA binary driver currently.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:31:41 +10:00
Ben Skeggs
5132f37700 drm/nve0/fifo: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-05-24 16:31:39 +10:00
Dave Airlie
22b33e8ed0 nouveau: add PRIME support
This adds prime->fd and fd->prime support to nouveau,
it passes the SG object to TTM, and then populates the
GART entries using it.

v2: add stubbed kmap + use new function to fill out pages array
for faulting + add reimport test.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-05-23 10:46:55 +01:00
Ben Skeggs
68455a43de drm/nve0: initial modesetting support for kepler chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-23 00:21:12 +10:00
Ben Skeggs
f887c425f9 drm/nouveau: bump version to 1.0.0
The time has come to get a proper version number that we can change to
indicate new features etc, rather than the lock-step 0.0.XX that we
previously had.

libdrm has recognised this version as compatible with 0.0.16 since 2.4.22,
so hopefully any breakage people see should be very minimal.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:18:06 +10:00
Ben Skeggs
27100ac95a drm/nouveau: oops, increase channel dispc_vma to 4
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:17:56 +10:00
Ben Skeggs
48aca13f01 drm/nouveau: remove m2mf creation on userspace channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:17:46 +10:00
Ben Skeggs
d5316e2512 drm/nvc0-/disp: reimplement flip completion method as fifo method
Removes need for M2MF subchannel usage on NVC0+.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:17:40 +10:00
Ben Skeggs
b5b2e5988b drm/nouveau: remove subchannel names from places where it doesn't matter
These are FIFO methods, it doesn't matter what subchannel is being used.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:17:30 +10:00
Ben Skeggs
accf94969f drm/nouveau/ttm: always do buffer moves on kernel channel
There was once good reasons for wanting the drm to be able to use M2MF etc
on user channels, but they're not relevant anymore.  For the general
buffer move case, we've already lost by transferring between vram/sysmem
already so the context switching overhead is minimal in comparison.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-22 17:17:26 +10:00
Ben Skeggs
2f5394c3ed drm/nouveau: map first page of mmio early and determine chipset earlier
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:07 +10:00
Ben Skeggs
8663bc7cde drm/nouveau/dp: move all nv50/sor-specific code out of nouveau_dp.c
Off-chip encoders (which we don't support yet anyway), and newer chipsets
(such as NVD9...), will need their own code for this.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:15:03 +10:00
Christoph Bumiller
df26bc9c32 drm/nv50/display: expose color vibrance control
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:14:56 +10:00
Ben Skeggs
990449c77c drm/nv50-nvc0/vm: support unsnooped system memory
v2 (Emil Velikov <emil.l.velikov@gmail.com>):
- Fixed a regression on certain nv50 IGP due to not passing the correct
  target type to nv50_vm_addr()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Johannes Obermayr <johannesobermayr@gmx.de>
2012-03-13 17:14:06 +10:00
Ben Skeggs
25c53c1068 drm/nouveau/pm: extend profile interface for destroy/init/fini
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:11 +10:00
Ben Skeggs
8d7bb40063 drm/nouveau/pm: rework to allow selecting separate profiles for ac/battery
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:09:04 +10:00
Ben Skeggs
085028ce3b drm/nouveau/pm: embed timings into perflvl structs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:06 +10:00
Ben Skeggs
fd99fd6100 drm/nouveau/pm: calculate memory timings at perflvl creation time
Statically generating the PFB register and MR values for each timing set
turns out to be insufficient.  There's at least one (so far) known piece
of information which effects MR values which is stored in the perflvl
entry on some chipsets (and in another table on later ones), which is
disconnected from the timing table entries.

After this change we will generate a timing set based on an input clock
frequency instead, and have this data stored in the performance level
data.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
2012-03-13 17:08:03 +10:00
Roy Spliet
c7c039fd31 drm/nouveau/pm: implement DDR2/DDR3/GDDR3/GDDR5 MR generation and validation
Roy Spliet:
- Implement according to specs
- Simplify
- Make array for mc latency registers

Martin Peres:
- squash and split all the commits from Roy
- rework following Ben Skeggs comments
- add a form of timings validation
- store the initial timings for later use

Ben Skeggs
- merge slightly modified tidy-up patch with this one
- remove perflvl-dropping logic for the moment

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:07:50 +10:00
Roy Spliet
bfb3146524 drm/nouveau/pm: improve memory timing generation
- Rename several VBIOS entries to closer match the real world
- Add the missing 0x100238 and 0x100240 register values
- Parse bit 14 of the VBIOS timing table
- "Magic value" -> tCWL, fixing some minor bugs in the process
- Also name a few more by their name rather than their number.
- Some values seem to be dependent on the memory type. Fix

Edits by Martin Peres <martin.peres@labri.fr>:
- this is a squash commit
- reworked for fixing some style issues

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:26 +10:00
Martin Peres
b1aa5531cc drm/nouveau: move pwm_divisor to the nouveau_pm_fan struct
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:11 +10:00
Martin Peres
bc6389e4fa drm/nouveau/pm: restore fan speed after suspend
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:07 +10:00
Martin Peres
ddb2005516 drm/nouveau/pm: style fixes
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:06:04 +10:00
Ben Skeggs
c70c41e89f drm/nv50: hopefully handle the DDR2/DDR3 memtype detection somewhat better
M version 2 appears to have a table with some form of memory type info
available.

NVIDIA appear to ignore the table information except for this DDR2/DDR3
case (which has the same value in 0x100714).  My guess is this is due to
some of the supported memory types not being represented in the table.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:05:46 +10:00
Ben Skeggs
ff92a6cda7 drm/nv20-nv40: add memory type detection
NV20/NV30 is partially educated guesswork at this point, based on any
information around about available memory types and a horribly unspeakable
amount of vbios image scouring.  I'm not entirely certain the GDDR3 define
is correct, I have not spotted a single vbios with that value yet (though
it is mentioned in some 1218-using nv4x vbios), but there are reports that
some nv3x did use it..

NV40(100914) confirmed by switching an NV49 to DDR1/DDR2 values and making
sure that the binary driver behaviour showed it had detected DDR1/DDR2
instead of GDDR3 before dying horribly.

NV40(100474) confirmed by doing much the same task as above on an NV44,
except this was *much* easier as changing the values didn't seem to have
any noticable effect on the memory controller aside from changing the
binary driver's behaviour.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:05:35 +10:00
Ben Skeggs
d81c19e312 drm/nv20: split PFB code out of nv10_fb.c
Most functions were quite different between NV10/NV20 already, and they're
about to get even more so.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:05:29 +10:00
Ben Skeggs
7ad2d31cb6 drm/nouveau: move vram detection funcs to chipset-specific fb code
Also, display detected memory type in logs - though, we don't even try to
detect this yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2012-03-13 17:05:20 +10:00
Peter Lekensteyn
d099230cc3 nouveau: Support Optimus models for vga_switcheroo
Newer nVidia cards with Optimus do not support/use the DSM switching functions.
Instead, it require a DSM function to be called prior to bringing a device into
D3 state. No other _DSM calls are necessary before/after enabling/disabling a
device. Switching between discrete and integrated GPU is not supported by
this Optimus _DSM call, therefore return on the switching method.

Signed-off-by: Peter Lekensteyn <lekensteyn@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-01-13 09:09:15 +00:00
Francisco Jerez
4e03b4af6d drm/nouveau: Fix pushbufs over the 4GB mark.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:46 +10:00
Ben Skeggs
a0b2563551 drm/nouveau/gpio: reimplement as nouveau_gpio.c, fixing a number of issues
- moves out of nouveau_bios.c and demagics the logical state definitions
- simplifies chipset-specific driver interface
- makes most of gpio irq handling common, will use for nv4x hpd later
- api extended to allow both direct gpio access, and access using the
  logical function states
- api extended to allow for future use of gpio extender chips
- pre-nv50 was handled very badly, the main issue being that all GPIOs
  were being treated as output-only.
- fixes nvd0 so gpio changes actually stick, magic reg needs bashing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:45 +10:00
Ben Skeggs
675aac033e drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct
We don't need more than the line id to determine the PWM controller, and
the GPIO interfaces are about to change somewhat.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:44 +10:00
Ben Skeggs
b4c26818ae drm/nouveau/mxm: initial implementation of dcb sanitisation
The DCB table provided by the VBIOS on most MXM chips has a number of
entries which either need to be disabled, or modified according to the
MXM-SIS Output Device Descriptors.

The x86 vbios code usually takes care of this for us, however, with the
large number of laptops now with switchable graphics or optimus, a lot
of the time nouveau is responsible for POSTing the card instead - leaving
some fun situations like, plugging in a monitor and having nouveau decide
3 connectors actually just got plugged in..

No MXM-SIS fetching methods implemented yet.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:41 +10:00
Ben Skeggs
486a45c2a6 drm/nouveau/i2c: do parsing of i2c-related vbios info in nouveau_i2c.c
Not much point parsing the vbios data into a struct which is only used once
to parse the data into another struct, go directly from vbios to
nouveau_i2c_chan.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:40 +10:00
Ben Skeggs
6b5a81a2e7 drm/nouveau/bios: start refactoring dcb routines
This primary reason for this was mostly to avoid duplication of some of
this stuff by the MXM-SIS parser.  However, some other cleanups will also
follow this as a result.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:39 +10:00
Ben Skeggs
3376ee374d drm/nvd0/disp: add support for page flipping
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:37 +10:00
Ben Skeggs
f62b27db6b drm/nouveau: shutdown display on suspend/hibernate
Known to fix some serious issues with hibernate on a couple of systems.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:35 +10:00
Ben Skeggs
2a44e4997c drm/nouveau/disp: introduce proper init/fini, separate from create/destroy
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:33 +10:00
Ben Skeggs
ff2b6c6e58 drm/nouveau/pm: remove the older interfaces completely
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:25 +10:00
Ben Skeggs
f3fbaf34e2 drm/nv50/pm: rewrite clock management, and switch to the new pm hooks
This area is horrifically complicated on these chipsets, and it's likely we
will need at least a few more tweaks yet.

Oh yes, and it's completely disabled on IGPs for the moment.  From traces,
things look potentially different there yet again.  Sigh...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:24 +10:00
Martin Peres
dd1da8de17 drm/nouveau/pm: make clocks_set return an error code clocks_set can fail.
Reporting an error is better than silently refusing to reclock.

V2: Use the same logic on nv40

Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:23 +10:00
Ben Skeggs
de69185573 drm/nouveau: improve dithering properties, and implement proper auto mode
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:21 +10:00
Ben Skeggs
b29caa5885 drm/nouveau: add overscan compensation connector properties
Exposes the same connector properties as the Radeon implementation, however
their behaviour isn't exactly the same.  The primary difference being that
unless both hborder/vborder have been defined by the user, the driver will
keep the aspect ratio of the overscanned area the same as the mode the
display is programmed for.

Enabled for digital outputs on GeForce 8 and up, excluding GF119.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:16 +10:00
Ben Skeggs
27d5030a23 drm/nouveau: move master modesetting init to nouveau_display
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:16 +10:00
Ben Skeggs
25575b414c drm/nouveau/hdmi: build ELD from EDID, notify audio driver of its presence
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:14 +10:00
Ben Skeggs
35bb5089cc drm/nv50/pm: s/unk05/vdec/
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:13 +10:00
Ben Skeggs
1e05415733 drm/nouveau/pm: remove defunct fanspeed_set/get from pm table
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:13 +10:00
Ben Skeggs
a175094cd8 drm/nouveau/pm: introduce generic handler for on-chip fan controller
The handling of the internal pwm fan controller is similar enough between
current chipsets that it makes sense to share the logic, and bugfixes :)

No hw backends converted yet, will automatically fall-through to the
"old" per-chipset fanspeed hooks for now.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:12 +10:00
Ben Skeggs
3f8e11e4b6 drm/nv50/pm: mostly nailed down fan pwm frequency selection
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:11 +10:00
Martin Peres
11b7d89521 drm/nouveau/pm: manual pwm fanspeed management for nv40+ boards
Exposes the following sysfs entries:
- fan0_input: read the rotational speed of the fan (poll a bit during 250ms)
- pwm0: set the pwm duty cycle
- pwm0_min/max: set the minimum/maximum pwm value

v2 (Ben Skeggs):
- nv50 pwm controller code removed in favour of other more complete code
- FAN_RPM -> FAN_SENSE
- merged FAN_SENSE readout into common code, not at all nv50-specific
- protected fanspeed changes with perflvl_wr
- formatting tidying
- added some comments where things are shaky

v3 (Martin Peres)
- ensure duty min/max from thermal table are sane

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
2011-12-21 19:01:11 +10:00
Ben Skeggs
8f27c54342 drm/nouveau/vdec: implement stub modules for the known engines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:10 +10:00
Ben Skeggs
0c101461e2 drm/nv40/pm: parse fan pwm divisor from vbios tables
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:09 +10:00
Dave Airlie
1fbe6f625f Merge tag 'v3.2-rc6' of /home/airlied/devel/kernel/linux-2.6 into drm-core-next
Merge in the upstream tree to bring in the mainline fixes.

Conflicts:
	drivers/gpu/drm/exynos/exynos_drm_fbdev.c
	drivers/gpu/drm/nouveau/nouveau_sgdma.c
2011-12-20 14:43:53 +00:00
Jerome Glisse
649bf3ca77 drm/ttm: merge ttm_backend and ttm_tt V5
ttm_backend will only exist with a ttm_tt, and ttm_tt
will only be of interest when bound to a backend. Merge them
to avoid code and data duplication.

V2 Rebase on top of memory accounting overhaul
V3 Rebase on top of more memory accounting changes
V4 Rebase on top of no memory account changes (where/when is my
   delorean when i need it ?)
V5 make sure ttm is unbound before destroying, change commit
   message on suggestion from Tormod Volden

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2011-12-06 10:39:17 +00:00
Ben Skeggs
33dbc27f1a drm/nouveau: add dumb ioctl support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-11-30 23:38:03 +10:00
Ben Skeggs
59ef9742f6 drm/nv40/pm: execute memory reset script from vbios
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:11:51 +10:00
Ben Skeggs
5f1800bd8a drm/nouveau/dp: return master dp table pointer too when looking up encoder
Will need to be able to distinguish 2.0/2.1 from 3.0 soon.  Also, move
the vbios parsing to nouveau_dp where it belongs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:11:18 +10:00
Ben Skeggs
721b0821ad drm/nouveau/bios: simplify U/d table hash matching func to just match
The caller is now responsible for parsing its own lists (or whatever) of
possible encoders.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:11:14 +10:00
Ben Skeggs
27a4598737 drm/nouveau/dp: restructure link training code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:10:21 +10:00
Ben Skeggs
a002feceb7 drm/nouveau/dp: pass in required datarate to link training
Not used currently, but it will be used in preference to pre-determined
lane/bandwidth numbers at a later point.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:10:19 +10:00
Ben Skeggs
10b461e40a drm/nv50/backlight: take the sor into account when bashing regs
I'm sure that out there somewhere, someone will need this.  We currently
haven't seen an example of LVDS being on a non-0 SOR so far though.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:56 +10:00
Ben Skeggs
46959b7790 drm/nouveau/dp: remove reliance on vbios for native displayport
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:42 +10:00
Ben Skeggs
4372013388 drm/nouveau/dp: rewrite auxch transaction routines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:09:03 +10:00
Ben Skeggs
f2cbe46f14 drm/nouveau: determine timing crystal freq from straps
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:08:41 +10:00
Roy Spliet
2228c6fe04 drm/nouveau/pm: Document and expose CL and WR for 0x1002Cx
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20 16:08:28 +10:00
Roy Spliet
9a78248876 drm/nouveau/pm: add initial NV3x/NVCx memtiming support, improve other cards
NV30: Create framework for memtm
NV50: Improve reg creation,
NV50: Use P.version instead of card codename/stepping,
NVC0: Initial memtiming code for Fermi,
Renamed regs for consistency,
Overall redesign to improve readability,
Avoid kfree on null-pointer

Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
2011-09-20 16:08:25 +10:00
Ben Skeggs
26f6d88b32 drm/nvd0/disp: very initial evo setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:54 +10:00
Ben Skeggs
02e4f5877d drm/nouveau/bios: allow passing in crtc to the init table parser
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:48 +10:00
Ben Skeggs
d7f8172ca9 drm/nvd0/gpio: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:36 +10:00
Ben Skeggs
03bc9675d3 drm/nouveau: allow modeset module option to select 'headless mode'
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:16 +10:00
Ben Skeggs
048a88595a drm/nouveau: make general drm modesetting init common
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:04 +10:00
Ben Skeggs
2e9733ff7d drm/nvd0: add a card_type for 0xdX chipsets
These are different enough from 0xcX to justify it, half fermi, half
kepler(??)..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:45 +10:00
Ben Skeggs
987eec10dd drm/nouveau: embed nouveau_mm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:56 +10:00
Ben Skeggs
323dcac552 drm/nouveau: rename nv40_mpeg to nv31_mpeg
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:38 +10:00
Ben Skeggs
9698b9a680 drm/nvc0/pm: more complete parsing of clock domains
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:03:34 +10:00
Ben Skeggs
78e2933d07 drm/nouveau: add function to wait until a callback returns true
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:50 +10:00
Ben Skeggs
4fd2847e9b drm/nva3/pm: parse/reclock vdec/41a0 clocks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:02:36 +10:00