Add support for CM-T3517 CoM and SBC-T3517 board.
reused common support for sbc-t3x boards
(omap3-cm-t3x.dtsi, omap3-sb-t35.dtsi):
* SB-T35 baseboard eth
* MMC1, UART3
* HS USB Port 1/2
* I2C1/3
* Heartbit led
Added basic support for:
* MMC1 wp/cd signals
* CM-T3517 Usb Hub
* WL12xx WiFi chip
* Davinci EMAC
* AM35X OTG
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for CM-T3530 CoM and SBC-T3530 board.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO167 is used as SB-T35 baseboard USB Hub reset.
Add GPIO167 pinmux.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add HS USB Host support along with USB PHYs and power supply regulators
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pullup for twl4030 GPIO_0 used as MMC1 card detect signal.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPIO186 is used for the heartbeat led.
Setup the pinmux for the GPIO186.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SB-T35 baseboard features SMSC9220 Ethernet chip which requires
its own power supply regulators.
Add baseboard specific regulators for the SB-T35 Ethernet chip.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Disable mmc3 interface, since is not used on sbc-t3x boards.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use omap specific pinctrl defines (OMAP3_CORE1_IOPAD) to configure
the padconf register offset.
This simplify further support of CompuLab's boards based on omap36xx,
omap34xx and am35x.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
update aliases for the ssi clocks ssi_ssr_fck, ssi_sst_fck and ssi_ick
to make them consistent for omap34xx and omap36xx. This makes it
possible to reference the clocks from generic omap3 dts files.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds a devicetree node for the backup battery regulator.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Device tree node name should reflect the kind of device rather than the
specific name of the device.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Equal signs should always be preceded and followed by a single space in
device tree files.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
USB1 and USB3 are routed to two external connectors, while USB2 is used
for the integrated webcam.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The USB controllers on Tegra124 are backwards-compatible with those
found on Tegra30.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the
Tegra124. The panel has an EDID to describe the video timings but needs
a few extra nodes to get the backlight to come up.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The SOR block on Tegra124 can be used standalone to drive LVDS panels or
used in conjunction with the DPAUX block to support eDP.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The version of host1x on Tegra124 is largely compatible with that on
earlier Tegra generations. Some of the registers have moved around or
expanded to allow for more capability, so a separate compatible string
is still required.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The SDMMC3 interface is supplied with 1.8V by the PMICs LDO6.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Some of the regulators and the relationships to other regulators are
wrong. This commit attempts to rectify this by making them more similar
to what the schematics contain. This starts by adding a +VDD_MUX supply
that represents the 12V input and derives the main +3.3V_SYS and +5V_SYS
supplies from that. The majority of the other regulators derive from one
of those three.
While at it, rename the regulators to match the names in the schematics
to make them easier to match up.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Added device tree nodes to enable SMP on msm8660, msm8960, and msm8974
* Added Random Number Generator DT nodes for msm8974 and msm8960 SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
Comment: GPGTools - https://gpgtools.org
iQIcBAABCgAGBQJTBjOdAAoJEF9hYXeAcXzBk08P/iOLKjmyRtNoR2A34X3TXLam
665yyGi6MEa9Kj0AugMgsZld33Nc90z0g4PjujBDEjAA8PzwuQ/9+hYngznRy3+6
by+lNUO9IUlHZm/XDjEP+iGbKjFnr3wCwHgsqi/r1IxgaZJO8uRGhsUWmkeLRMeS
PfIKeVemBLKibmfuGee+dRDWL91yfWTbV0SphIQ0gY9CTPDhvg+hZVdSqthTsYat
UdsXqII2D2HsuJS9XPe4ZHY+fvYnIY8GOfvwIN1vy0y+BUfEQDl4b9WgwE6SQlIf
E1P//udmjsk+gIXJjKTCJzHgdSj0EQZ0KKGf1oD+XZQ2pdMxfK726EJT3Ih3J+og
gbhidyTq3H7fn5LDlicHB4MpcJuph8o7W8SvAUqhlU0aRklS+ck3XOCM5wUilbGC
pFB4dbFIHulYRkdTa0SNmxOKQsz8GvikOZs3vDcpR9Z9qgB5w2LYcPxkG4EzZXD7
1I/zrb4e/hyNPoFU88RF1AistXa4g7x6gaH6oD7MJd2TLydQlAC6Yd3JHI7h4z7i
o73X32IDk8NweKVIwKQnrKXdxhCKztYLxDzuyB9+p5kyzKBl1/M4suetl8DkTo0b
Ebr6tXZBTcvcSbKxF8SZdsJwGOiimMu8AGMv3tpNNGV9Cj/QWHZX2wnHuwaJcgKV
njij2D60uOCHu0LhNOSq
=4u6J
-----END PGP SIGNATURE-----
Merge tag 'qcom-dt-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "Qualcomm ARM Based Device Tree Updates for v3.15" from Kumar Gala
* Added device tree nodes to enable SMP on msm8660, msm8960, and msm8974
* Added Random Number Generator DT nodes for msm8974 and msm8960 SoCs
* tag 'qcom-dt-for-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: dts: qcom-msm8960-cdp: Add RNG device tree node
ARM: dts: qcom: Add RNG device tree node
ARM: dts: qcom: Add nodes necessary for SMP boot
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Ux500 is initializing its IRQs from the device tree and
does not need to figure out any static base addresses anymore,
this is just dead code so delete it.
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The module 0 clock compatibles were changed between the time the patch was sent
and it was merged. Update the compatibles.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Supporting device tree on the Ux500 is not optional anymore,
so delete the config option and compile this in at all times.
Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add i2c dts node properties for eDMA support, them depend on the eDMA driver.
Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Keystone2 Edison (K2E) is a Quad Cortex A15 based SoC with
1 DSP. It has standard peripherals such as i2c, spi, uart, timer,
pcie, etc similar to k2hk, but without wireless hardwares. This
patch add support for k2 Edison SoC and EVM. This re-uses the common
keystone.dtsi to include common bindings across the various k2
devices.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Keystone2 Lamarr (K2L) is a dual Cortex A15 core based SoC with
4 DSPs. It has standard peripherals such as i2c, spi, uart, timer,
pcie etc., similar to k2hk, but different set of wireless hardware.
This patch add support for k2 Lamarr SoC and EVM. This re-uses the
common keystone.dtsi to include common bindings across the various
k2 devices.
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Current keystone.dtsi includes SoC specific definitions for K2HK
SoCs. In order to support two addition keystone devices, k2 Edison
and K2 Lamarr and corresponding EVMs, This patch restructure the
dts files for the following:-
- All clock nodes that are only available in k2hk SoC are moved
from keystone-clocks.dtsi to a new k2hk-clocks.dtsi include file
- The CPU nodes are now part of the soc specific k2hk.dtsi.
- Change the compatibility string to ti,k2hk-evm and change
the model name accordingly
- Finally include k2hk-clocks.dtsi in k2hk.dtsi and that in
k2hk-evm.dts
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
As noted in recent discussions the name of the core clock for
the PL022 derived SPI blocks is erroneously named in the
U300 device tree. The kernel doesn't currently use the name,
but may do so soon so let use rename all these clocks in
accordance with the name given in the PL022 TRM (ARM DDI 0194G).
Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As noted in recent discussions the name of the core clock for
the PL022 derived SPI blocks is erroneously named in the
Ux500 device trees. The kernel doesn't currently use the name,
but may do so soon so let use rename all these clocks in
accordance with the name given in the PL022 TRM (ARM DDI 0194G).
Reviewed-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add DT support for SDHI0, SDHI1 and SDHI2 on Koelsch.
The board specific handling of CD and WP pins are
using GPIOs. SDHI0 and SDHI1 are hooked up to regular
SD connectors while SDHI2 is using micro-SD which
is lacking WP signal.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SDHI0, SDHI1 and SDHI2 to the r8a7791 DTSI.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The patch replaces magic numbers with macros defined in DT header
in exynos5440 clock bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch replaces magic numbers with macros defined in DT header
in exynos5420 clock bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch replaces magic numbers with macros defined in DT header
in exynos5250 clock bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch replaces magic numbers with macros defined in DT header
in exynos4 clock bindings.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Convert the kirkwood t5325-setup.c to mostly device tree for
mach-mvebu. Part of the audio setup needs to remain in C for the
moment until suitable bindings are designed and implemented. So add
board code, triggered by the compatibility string.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
To prevent problems later with mvebu_v5_defconfig builds, we restrict
the scope of the changes this series makes.
Selecting ARCH_KIRKWOOD and MACH_KIRKWOOD is necessary during the
migration from mach-kirkwood to mach-mvebu. Until the last four legacy
kirkwood board files have a DT equivalent, we need to support building
DT from both mach-kirkwood and mach-mvebu.
Reported-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Both USB_VBUS_EN0 and USB_VBUS_EN1 are configured the same way, so they
can be combined into a single node. While at it, don't configure them as
pull-up since they already have external pull-ups. Also U-Boot doesn't
configure them as pull-up either.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
To disable a device tree node, the status property should be set to
"disabled", not "disable".
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
- mvebu
- add audio for Armada 370 DB
- enable Armada 370/XP watchdog
- kirkwood
- convert board rd88f6281
- add board rd88f6192
- dove
enable watchdog
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTCDw/AAoJEP45WPkGe8ZnMtwP/2LhvbKUiYqxQAVI8wPtuTt7
xSeQ/JFuctIY6BAjutfU+Vi4iQGjFNMy6SJVRNQKevbpZbgYnEmJua1/BHtieTYR
vNTkoUSQiN5DlKkI3dh2FxOT4FsHFx7OaAsxKDWIHPtvaNHHAxq20RHgkbdPjlBx
pAPpF0lvsoBEtpwPgKrLhKvO84EvD4tXaCMkx0xr1K3AAbEGJ+UxbWii21K3B7fL
RMCPhQF0xrJ8zTND6KVdZnZ1pzsDFviBHe33ts8hAIXy8oOPyMGR9dns4mzds7vq
mWdaL0mTzcKif2utwhr9UujEmtEu/m0ZgROMAn6kgTX3hTl8qPbUmDRVqME346aF
eJA517gPKSuhEzrCpfRk94V0USsy7m2d37qwdlccICx9tOTdNg1u7cYOFCh0aHSW
WRG+47x+lDDALnhnTNpRy5UtF/QQSA67QFRy2Ls44zHn7vl19ynwnP88BLWsHFJr
9gJ+b9W9ibmH1ZTJoZhfWTffPcXTu6Cv/tIB6XMGMkFaK5hY1LspyunuWZipdhBj
fZls0GRr7fMPa8KSBwEcIpM9W0QyWT0qOxlgXG2CnxrEZRsncHOKL7GAh4GCNCU8
WnXs1+HB6XQR3pd2Zdbw5GCmTTITlHqbNQUvLYBQkcAOFNui5BuJcrx4tpNQLZqi
RQ2dXD5NdMoI+NOXxX0g
=F2YM
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.15-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu dt changes for v3.15 (incremental round #2)" from Jason Cooper:
- mvebu
- add audio for Armada 370 DB
- enable Armada 370/XP watchdog
- kirkwood
- convert board rd88f6281
- add board rd88f6192
- dove
enable watchdog
* tag 'mvebu-dt-3.15-2' of git://git.infradead.org/linux-mvebu:
ARM: dove: Enable Dove watchdog in the devicetree
ARM: kirkwood: Add RSTOUT 'reg' entry to devicetree
ARM: mvebu: Enable Armada 370/XP watchdog in the devicetree
ARM: Kirkwood: convert rd88f6281-setup.c to DT.
ARM: Kirkwood: Add DT description of rd88f6192.
ARM: mvebu: enable S/PDIF audio in Armada 370 DB Device Tree
ARM: mvebu: add audio support to Armada 370 DB
ARM: mvebu: add I2C0 muxing option for Armada 370 SoC
ARM: mvebu: add audio I2S controller to Armada 370 Device Tree
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
DT nodes should be named according to the type of object that they
represent rather than the identity. DT nodes that contain a reg
property should include a unit address in their name. Fix these issues.
Add clock-output-names properties to the nodes so that the clocks get
named something meaningful. This works around the fact that the fixed
clock driver names clocks after the short node name, i.e. not including
the unit address.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Define the Koelsch board dependent part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7791 part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Lager board dependent part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the generic R8A7790 part of the Ether device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The sdio1 interface pins are routed to an unpopulated daughter card
connector on the bcm28155-ap board. Thus there is no need to mark
this interface as enabled.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Replace the "fake" clocks defined in the "bcm11351.dtsi" device tree
file with real definitions backed by the new BCM281xx clock driver.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Matt Porter <mporter@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
The PCIe driver has been fully clock aware for quite a while. Remove
the kexec code to enable the PCIe clock, since the PCIe driver will do
the right thing.
jac adds:
[arnd]: fixes a build error when KEXEC is enabled and KIRKWOOD_LEGACY is not
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
During this release cycle, we're adding the new Armada 375, 380, and 385
SoCs. We're also migrating DT kirkwood boards into mach-mvebu. The
kirkwood changes make the different SoCs in mach-mvebu/ depend on
MULTI_V7 or MULTI_V5 as appropriate.
We add this dependency to the new SoCs so that when the branches are
merged, everything is as it should be.
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This file is unused since commit
79f08d9ed2 (ARM: drop <mach/timex.h> for !ARCH_MULTIPLATFORM, too)
.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
ARCH_MULTIPLATFORM. (For multi-platform code it's already unused since
387798b (ARM: initial multiplatform support).)
To make this work some code out of arch/arm needed to be adapted. The
respective changes got acks by their maintainers to be taken via armsoc
(with Andrew Morton substituting for Alessandro Zummo as rtc maintainer).
Compared to the previous pull request there was another patch added that
fixes a (non-critical) regression on ixp4xx. Olof Johansson asked to not
squash this fix into the original commit to save him from the need to
reverify the series.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABCAAGBQJTA8PeAAoJEOLc3ZEyZpvW5GEP/iz+HIx8Rkf3exUOorZB0Kef
dPC1Bmc4SThffhgmmXTjSapTzjfnuC8xq8dni008L7QR0LFJsC/rw8bR9GqYhTDs
EP7Sk0vDJcTUw9dvlIG0jpBioxdsPY7isU8K85tr2a+dzi4JA2h8iv6gE7bsOf1c
b18hIWp2ZZdeYQX3OcuzPeVfvXuMaayBJChq0akoW7zqxG2nHG9j1vCSOhBtrgpc
xCTuEqPoaDOdXjdhyda//3SKkIYh1eMf+RWMgW38vz2uHEI3AsMn/EWe6pNRKzRt
JdVC6LWFl5tl1Dz73NoGFQO+ztTBb2pTrmqggc+Hi4iTekJSmJSFU51D/E0hdJFj
KmWDWPLiUdAItjPuRz/HyeZxoIZQjg9PJ8MkjwVNAz4f4Vmw2xNnAV1Eur3k9JyV
fo55eaBvy2KIGzBB+/ksMUvs4HzMJ7Z/dVPzZYRF8VxlYFJXExT0O42oeJ8KsfH7
dJ1bjk+3VIWPLH3DHyyiIfBL1oxe4MemqrAREFnN2QxYHyCipXLwH35uNZXAqvcU
jverroWnCdrpOn9KI+vpnp/kuE7Qc1IH/AwAZngPj2xhaFapiH6h1JK/xWcWjijR
AKv1DhFJMqSp9fvclr/ZAb7o35V/LG0rpCs+oZumCCARwpxkbo8xXgG0CfPsYFrG
KwLWPz5zwySGwvDZ2wub
=g6PN
-----END PGP SIGNATURE-----
Merge tag 'dropmachtimexh-v2' of git://git.pengutronix.de/git/ukl/linux
This cleanup series gets rid of <mach/timex.h> for platforms not using
ARCH_MULTIPLATFORM. (For multi-platform code it's already unused since
387798b (ARM: initial multiplatform support).)
To make this work some code out of arch/arm needed to be adapted. The
respective changes got acks by their maintainers to be taken via armsoc
(with Andrew Morton substituting for Alessandro Zummo as rtc maintainer).
Compared to the previous pull request there was another patch added that
fixes a (non-critical) regression on ixp4xx. Olof Johansson asked to not
squash this fix into the original commit to save him from the need to
reverify the series.
Conflicts:
arch/arm/mach-at91/at91sam9260.c
arch/arm/mach-at91/at91sam9261.c
arch/arm/mach-at91/at91sam9263.c
arch/arm/mach-at91/at91sam9rl.c
arch/arm/mach-mmp/time.c
arch/arm/mach-sa1100/time.c
CLKSRC_MMIO is needed on efm32 because the clocksource driver
(CLKSRC_EFM32) uses clocksource_mmio_init() and
clocksource_mmio_readl_up(). Since commit 09ca27579e (clocksource:
time-efm32: Select CLKSRC_MMIO) CLKSRC_EFM32 does the necessary select
itself and ARCH_EFM32 doesn't need to select it explicitly any more.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
This file is unused since commit
e6d159cdf9 (ARM: 7890/1: v7-M: drop using mach/entry-macro.S)
which went into v3.14-rc1.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
The A13 has 3 SPI controllers compatible with the one found in the A10. Add
them in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A10s has 3 SPI controllers compatible with the one found in the A10. Add
them in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 has 4 SPI controllers compatible with the one found in the A10. Add
them in the DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds USBH2 devicetree node of Phytec PCM970 RDK.
Additionally, adds fixed regulator to provide functionality
without dummy-regulator in the kernel.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds the missing (Universal serial bus) USB devicetree
nodes for i.MX27 CPUs.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
vf610 has two ADC controllers, and vf610-twr board ADC0_SE5 pin connect
to sliding rheostat for ADC test, other ADC pins connect to connectors for
future use.
Add support for ADC0_SE5.
CC: Jonathan Cameron <jic23@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Otavio Salvador <otavio@ossystems.com.br>
CC: Peter Meerwald <pmeerw@pmeerw.net>
CC: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
A collection of fixes for ARM platforms. Most are fixes for DTS files,
mostly from DT conversion on OMAP which is still finding a few issues here
and there.
There's a couple of small stale code removal patches that we usually
queue for the next release instead, but they seemed harmless enough to
bring in now.
Also, a fix for backlight on some PXA platforms, and a cache configuration
fix for Tegra, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTCgAlAAoJEIwa5zzehBx3J8MP/jFJWHtLHSeSXeKTLEeBV18J
/M7OG5hKyI38mImPbdJmCHpcTfExTqWuIkvN+6e7QN5PU1V3YSy5XELPh9UIn7zU
u+Pmt1C4cG8GFEdf03LqaDc4vdtthKUHGUBxQjrA3ZFrR8XZlzAZrnLKU/HA1VF5
ynaj1cs4Vpf2CGXjM+2ATr5gVhjTs1yldTkG+lHL99JAlSJe7TD3mrANXBRXVVNC
2yHGEDpDJf8kkBRQZ91xGcVVFw2YWF1avUi3QQ5WltufI+Rtdu8g7ibhakK/nimU
AfZ3LidjjiTFIGfEi5/2FBim6Tsxpd6wLlchzA6ksPaQ6hk0EVzRPPNzlarmeRO8
IF5zUPGPXswBeQURXe+OcZIUI4PGS02tshlIUWFPaFM3mZY2djd8Df8Rg20isjOu
vUYGSL2UY0uLb8NS97scNS9ouGYDp8lV9pHIYlmf6f3Opv6vsw56rWggSsDQDAOk
wbA2COTtDXxo1tEgbrmevDiaCc8uCDTHKD+uwbxOMCTwLvHHsafRp85BgcCz1z0L
bOvTbqVhBPW6T47D1ED+ECBo12DbZwA8pth0JSRaf/Fbp6+aMFXp0/d7Hw+ggAxN
wgEFq/A0M6v+5Y9azo+GLkgqPdH+7twH6eqD8TRgcQdnZXWIuq9UtaNw9Qx4Uusr
fX9CS2l8ISXgopnRPZCI
=i7LS
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A collection of fixes for ARM platforms. Most are fixes for DTS
files, mostly from DT conversion on OMAP which is still finding a few
issues here and there.
There's a couple of small stale code removal patches that we usually
queue for the next release instead, but they seemed harmless enough to
bring in now.
Also, a fix for backlight on some PXA platforms, and a cache
configuration fix for Tegra, etc"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (25 commits)
MAINTAINERS: add additional ARM BCM281xx/BCM11xxx maintainer
ARM: tegra: only run PL310 init on systems with one
ARM: tegra: Add head numbers to display controllers
ARM: imx6: build pm-imx6q.c independently of CONFIG_PM
ARM: tegra: fix RTC0 alias for Cardhu
ARM: dove: dt: revert PMU interrupt controller node
Documentation: dt: OMAP: Update Overo/Tobi
ARM: dts: Add support for both OMAP35xx and OMAP36xx Overo/Tobi
ARM: dts: omap3-tobi: Use the correct vendor prefix
ARM: dts: omap3-tobi: Fix boot with OMAP36xx-based Overo
ARM: OMAP2+: Remove legacy macros for zoom platforms
ARM: OMAP2+: Remove MACH_NOKIA_N800
ARM: dts: N900: add missing compatible property
ARM: dts: N9/N950: fix boot hang with 3.14-rc1
ARM: OMAP1: nokia770: enable tahvo-usb
ARM: OMAP2+: gpmc: fix: DT ONENAND child nodes not probed when MTD_ONENAND is built as module
ARM: OMAP2+: gpmc: fix: DT NAND child nodes not probed when MTD_NAND is built as module
ARM: dts: omap3-gta04: Fix mmc1 properties.
ARM: dts: omap3-gta04: Fix 'aux' gpio key flags.
ARM: OMAP2+: add missing ARCH_HAS_OPP
...
LDO10 is directly connected to MMC controller. Register this
through vmmc-supply property.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Added GPIO based wake up key to Arndale octa board.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files. For
now enable it for all board files to maintain the enabled status
exisitng prior to this patch.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add Maxim 77686 PMIC node for EXYNOS5250 based SMDK5250 board.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
To allow EXYNOS4412 based Odroidx and Origen-quad boards to operate between
200MHz to 1.4Ghz, update the vdd_arm voltage range to operate between these
cpu clock speeds.
Cc: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
In EXYNOS5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.
Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
According to Documentation/devicetree/bindings/regulator/regulator.txt
regulator nodes should not be placed under 'simple-bus'.
Mark Rutland also explains about it at:
http://www.spinics.net/lists/linux-usb/msg101497.html
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
kirkwood is very nearly fully DT. Remove most of the address
definitions from the header files and make it a local header file.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add the Kirkwood PCIe compatibility string to mvebu-soc-id, so that it
can get the SoC ID and revision from the PCIe endpoints.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mvebu system controller already supports restarting orion
systems. Remove all the C code which will be replaced by the system
controller.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Move the kirkwood DT support into mach-mvebu, and make them part of
ARCH_MULTI_V5. Minimal changes have been made in order to make it
boot. Cleanup of the header files and integration with mvebu will
take place in following patches.
In order to help Debian transition between mach-kirkwood and
mach-mvebu, the DTS files are compiled for both, allowing Debian to
continue using mach-kirkwood until all remaining boards are supported
by mach-mvebu. Debian is then expected to simply swap from
mach-kirkwood to mach-mvebu and mach-kirkwood will be removed.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Kirkwood, which uses the Feroceon L2 cache controller will soon be
moving into mach-mvebu. Allow the cache controller to be built in this
situation.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
CPU_ARM926T should be selected if no other CPU is. Put the ! in the
right place so this works.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Fixes: 24e860fbfd ("ARM: multiplatform: always pick one CPU type")
Cc: stable@vger.kernel.org # v3.11+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is so that it is possible to enable/disable write
through on the CPU.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With the gradual move to DT, kirkwood has become a lot less dependent
on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out
so we can drop plat-orion when building DT only kirkwood boards.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Prepare mach-mvebu to house both ARCH_MULTI_V7 and ARCH_MULTI_V5
systems by adding ARCH_MULTI_V7 to the existing SOCs.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
To allow removal of the global map of registers, make the pm code
ioremap the registers it needs.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With the move to mach-mvebu and MULTI_V5, the global iomap for all
registers will be going away. So explicitly map the CPU configuration
register before using it.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to be able to move DT support into mach-mvebu, the DT code
needs to be cleanly separated from common and pcie code. Import the
needed bits of these files into board-dt.c. The "common" code then
becomes purely legacy, supporting non-DT boards, so reflect this in
the Makefile targets.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This will be added back using the mach-mvebu equivalent once the move
has been made.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The mv88f6281gtw_ge has a ethernet switch connected to the ethernet
port of the SoC. Convert the platform device instantiation to a DT
instantiation.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: florian@openwrt.org
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The pm code needs to be separated from common.h in order to split DT
and non-DT systems apart. Move the declarations into a header file of
its own and include it where needed.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> (on kirkwood)
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The previous name "Marvell SOCs with Device Tree support" is a bit
ambiguous and not too informative for users. Instead, use a more
appropriate name.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Instead of hardcoding the values of the interrupt flags, use the
macros provided by <include/dt-bindings/interrupt-controller/irq.h>
and <include/dt-bindings/interrupt-controller/arm-gic.h> for the
Armada 375 and Armada 38x Device Tree files.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Instead of hardcoding 0 and 1 to indicate SPI and PPI GIC interrupts,
use the definitions of <dt-bindings/interrupt-controller/arm-gic.h> to
clarify the Device Tree code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Some of the Armada 375/38x DTs that were recently submitted were still
using the old-style /include/ instead of the new-style, C-preprocessor
based #include. Since we are going to start including more headers,
switching to the C-preprocessor based includes is important.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add device tree fragments and files to support many of the kirkwood
based Synology NAS devices. This is a modification of
Andrew Lunn's <andrew@lunn.ch> translation of the board setup file
maintained by Ben Peddell <klightspeed@killerwolves.net>
The Ricoh RS5C372 RTC was used in all 2009 units and some 2010 units.
All other Synology Kirkwood-based DiskStations and RackStations use
the Seiko S35390A RTC.
Most of the 1-bay and 2-bay units use the GPIOs that are multiplexed
with the built-in SATA interface activity/presence pins on mpp 20-23,
while the 4-bay units use ge01 and a PCIe SATA controller, and put the
software controlled HDD leds on mpp 36-43.
Most of the 6281 units with HDD power controls use mpp 29 and 31, while
most of the 6282 units with HDD power controls use mpp 30, 34, 44 and 45
and provide a model ID on mpp 28, 29, 46 and 47. Pre-2012 units and
most 4-bay units didn't have a separate power control for HDD1. These
power controls are presumably to limit startup current from the 12V
brick power supply.
Instead of using separate dtsi files in a synology directory, this
patch uses a single dtsi file containing all of the modules for
these boards, with all of the modules not common to all boards
disabled. The board dts files then enable the appropriate modules for
their boards.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Ben Peddell <klightspeed@killerwolves.net>
Tested-by: Ben Peddell <klightspeed@killerwolves.net> (ds211j)
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the basic support for the Armada 380 and Armada 385
SOCs. These SoCs share most of their IP with the Armada 370/XP
SoCs. The main difference is the use of a Cortex A9 CPU instead of the
PJ4B CPU. The Armada 380 is a single core Cortex-A9, while the Armada
385 is a dual-core Cortex-A9.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 38x will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Early versions of Armada 375 SoC have a bug where the BootROM leaves
an external data abort pending. The kernel is hit by this data abort
as soon as it enters userspace, because it unmasks the data aborts at
this moment. We register a custom abort handler below to ignore the
first data abort to work around this problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the basic support for the Armada 375 SOCs. These SoCs
share most of their IP with the Armada 370/XP SoCs. The main
difference is the use of a Cortex A9 CPU instead of the PJ4B CPU. The
interrupt controller and the L2 cache controller are also different
they are respectively the GIC and the PL310.
The support is introduced in board-v7.c, together with Armada 370/XP,
but a separate DT structure is added, because Armada 375 will need a
different set of SMP operations when the SMP support is introduced.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The system controller block in the Armada 375 has different register
offsets for the system reset and other related functions. Therefore,
this commit introduces the new "armada-375-system-controller"
compatible string to identify the Armada 375 variant of the system
controller.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Until now, the CPU_PJ4B Kconfig option was selected by
MACH_ARMADA_MVEBU, i.e for all Armada MVEBU SOCs. In preparation to
the introduction of Cortex-A9 based Armada MVEBU SOCs, this selection
is moved down to the Armada 370 and Armada XP specific options.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Due to a mistake made when merging Armada 370 and Armada XP DT machine
structures, the name of the structure was incorrectly chosen as being
ARMADA_XP_DT, while the structure also covers Armada 370. Therefore,
we rename the structure to ARMADA_370_XP_DT.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In preparation to the introduction of the support of Armada 375 and
Armada 38x, this commit renames arch/arm/mach-mvebu/armada-370-xp.c to
arch/arm/mach-mvebu/board-v7.c. The board-v7.c name as we expect this
file to ultimately contain the DT_MACHINE_START definitions for all
ARMv7 Marvell EBU platforms (370, 375, 38x, XP and Dove as of today).
In relation to this file rename, this commit also:
* Renames the hidden Kconfig symbol MACH_ARMADA_370_XP to
MACH_MVEBU_V7. This hidden symbol is selected by the various
per-SoC visible Kconfig options to trigger the build of board-v7.c.
* Renames a certain number of functions in board-v7.c so that their
armada_370_xp prefix is replaced by a mvebu prefix. The .dt_compat
array keeps its armada_370_xp prefix because the new SOCs will be
introduced with separate .dt_compat arrays, due to the need for
different SMP operations.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- kirkwood
- new board QNAP 419
- new board Excito Bubba B3
- mvebu
- use gpio and input defines for Armada 370/XP boards
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJTA4nEAAoJEP45WPkGe8ZnJvsQAJ9RQ6xuoP3ucqEZd8+OPG7X
PAX4DfLMHh7YaSj1kyEfUb8HF63BbuAjIU99xNWQdenJqVF+xg8uOal3raagySXh
R+qRL0jfeFnneJFlc6/EXE+806DkYrqdSdxKm2SVjcS7ZfkiOwEIXgJwYrQQ5EiN
BGZ82dkQoq3BHGaMt6UeFRz6PECoRHEMkagwCjaZ6gt1piZ+yLa/j24rCRXUmLci
JXDZVfsd+8B4TLBSGbMSwyDRbnJopsr+VUM7oT6E/iQ3Qcq8sCzeJuTkSapVzRN1
s1YFhtulMWD7OlLajd9+F/EzKurdjtZL1G8BIKEtFbzcus37sm0Yg3Pb89FxnJ6t
lTSYZO/MxQIcbM/poZPINksBAKdHb6aqj2/vjL9D3QYLRNsEwt3YVLGs5yC41O8b
yythodZj65sMSHXY4yYVKQzBSZlttzoxH+3baOV6nHuQpGRG32geVRsj3KXAnI88
TvP3OFC3tjj823M+sZfDfmDkTISGRGy5RQTsr/QOwNbNDUCig9bHduD5aJA6J8tH
zxBevF5asCU78n4xd+miBSpdCq8XPAg+tQAdwIga03jnq6cUfJHC6VamV3cVSMP9
o0GeqTdCsJwiuDGNEy4iCSBOkmfzhoUVaPEkjrQEwqICKVABnpjAH5HQbss+Rq+C
AGuJIfWXtIBuEqRW50qc
=e8X7
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.15' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.15" from Jason Cooper:
- kirkwood
- new board QNAP 419
- new board Excito Bubba B3
- mvebu
- use gpio and input defines for Armada 370/XP boards
* tag 'mvebu-dt-3.15' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: use input DT defines in Armada 370/XP boards
ARM: mvebu: use GPIO DT defines in Armada 370/XP boards
ARM: Kirkwood: Add DT description of QNAP 419
ARM: Kirkwood: Add support for Excito Bubba B3
Signed-off-by: Olof Johansson <olof@lixom.net>
This branch contains a bug fix for the way devicetree code identifies
the type of device. Device drivers can contain a list of of_device_ids,
but it more than one entry will match, then the device driver may choose
the wrong one. Commit 105353145e, "match each node compatible against
all given matches first", was queued for v3.14 but ended up causing
other bugs. Commit 06b29e76a7 attempted to fix it but it had other bugs.
Merely reverting the fix and waiting until v3.15 isn't a good option
because there is code in v3.14 that depends on the revised behaviour to
boot.
This branch should finally fixes the problem correctly. This time
instead of just hoping that the patch is correct, this branch also adds
new testcases that validate the behaviour.
The changes in this branch are larger than I would like for a -rc pull,
but moving the test case data out of out of arch/arm so that it could be
validated on other architectures was important.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJTB2qsAAoJEMWQL496c2LNmvYQAJPwmc3f76L/HxxuJZ3TVpFF
2JhtCUyzTrsuebDSanAZLhzwCrIL4N8I/1rZObvkQuxUEUPNg4Khx9chMYwsG7L7
vbdr+3bkYnwaaGHzoH0NnNM5x1NLm29WOeHaWvT9Nm8iA1399AaOeAXniLQrTgBv
LxipQc3SZpRSKdCDCi2y32TESMJcN7FT1aD4EKHAZocmXMpMaxEYQ2eFO70Txf5O
1SbNkZ7LsAnm1TmoH7nf0um9IFX7bvt2KkonpKBL2mOoDfq40pBosV3Zt2JwaeDy
3nkBeAFs3YvIDjZy3h+WdWLXlF9E29P7CXreE/uSJTnoYft6aCDfgz15USc2j2OA
BTnK0kqJ3NWu6YAKrQHHoQmisnuDwg84oEK0JLJCfMcA3IOCBXV+iYHbo41j/dO5
yprnS1zms6UZuOXV2RjseQ34THkR3oDPbSxKmFTK/KGaa568ES0l1ZPAsvuVZqNr
5elDskt+lfF96WLGbyC0DP5Zib/0eFTbf18p///4lefkr6ysT+CdIJTsRj0/Uz0V
40nwCJH2t+wVCtcI/+mo3yvc4C77OoRhAOAxz8D9YkOlt8ilfgIDeAc1krAAa09T
0KfpfkLDvXEccZF+Jo2Z9TU7QFdeLVK/QAsvCZN4EcMU31ePEldMiniZ69/aySPl
D/ahG24w1pakKXujtJK2
=wJz0
-----END PGP SIGNATURE-----
Merge tag 'dt-for-linus' of git://git.secretlab.ca/git/linux
Pull devicetree fixes from Grant Likely:
"Device tree compatible match order bug fix
This branch contains a bug fix for the way devicetree code identifies
the type of device. Device drivers can contain a list of
of_device_ids, but it more than one entry will match, then the device
driver may choose the wrong one. Commit 105353145e, "match each node
compatible against all given matches first", was queued for v3.14 but
ended up causing other bugs. Commit 06b29e76a7 attempted to fix it
but it had other bugs. Merely reverting the fix and waiting until
v3.15 isn't a good option because there is code in v3.14 that depends
on the revised behaviour to boot.
This branch should finally fixes the problem correctly. This time
instead of just hoping that the patch is correct, this branch also
adds new testcases that validate the behaviour.
The changes in this branch are larger than I would like for a -rc
pull, but moving the test case data out of out of arch/arm so that it
could be validated on other architectures was important"
* tag 'dt-for-linus' of git://git.secretlab.ca/git/linux:
of: Add self test for of_match_node()
of: Move testcase FDT data into drivers/of
of: reimplement the matching method for __of_match_node()
Revert "of: search the best compatible match first in __of_match_node()"
DT nodes that contain a reg property should include a unit address in
their name. Add the missing unit addresses.
The unit address in a node name must match the value in the reg property.
Fix the cases where they don't match.
Don't fix the /clocks/* node names yet; that causes problems the clock
driver to attempt to register multiple clocks with the same name, which
fails.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This patch adds support for SATA on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for GPMI-NAND on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for USB_HOST on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds support for USB_OTG on Phytec phyFLEX-i.MX6 Quad module.
Signed-off-by: Ashutosh singh <ashutosh.s@phytec.in>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The compatible property should be m41t62, not mt41t62, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Pull cgroup fixes from Tejun Heo:
"Quite a few fixes this time.
Three locking fixes, all marked for -stable. A couple error path
fixes and some misc fixes. Hugh found a bug in memcg offlining
sequence and we thought we could fix that from cgroup core side but
that turned out to be insufficient and got reverted. A different fix
has been applied to -mm"
* 'for-3.14-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup:
cgroup: update cgroup_enable_task_cg_lists() to grab siglock
Revert "cgroup: use an ordered workqueue for cgroup destruction"
cgroup: protect modifications to cgroup_idr with cgroup_mutex
cgroup: fix locking in cgroup_cfts_commit()
cgroup: fix error return from cgroup_create()
cgroup: fix error return value in cgroup_mount()
cgroup: use an ordered workqueue for cgroup destruction
nfs: include xattr.h from fs/nfs/nfs3proc.c
cpuset: update MAINTAINERS entry
arm, pm, vmpressure: add missing slab.h includes
Pull DMA-mapping fixes from Marek Szyprowski:
"This contains fixes for incorrect atomic test in dma-mapping subsystem
for ARM and x86 architecture"
* 'fixes-for-v3.14' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
x86: dma-mapping: fix GFP_ATOMIC macro usage
ARM: dma-mapping: fix GFP_ATOMIC macro usage
Add the necessary DT node to probe the rng driver on
msm8960-cdp platform.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Tested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add the necessary DT node to probe the rng driver on
msm8974 platforms.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add the necessary nodes to support SMP on MSM8660, MSM8960, and
MSM8974/APQ8074. While we're here also add in the error
interrupts for the Krait cache error detection.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
[sboyd: Split into separate patch, add error interrupts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The testcase data is usable by any platform. This patch moves it into
the drivers/of directory so it can be included by any architecture.
Using the test cases requires manually adding #include <testcases.dtsi>
to the end of the boards .dtsi file and enabling CONFIG_OF_SELFTEST. Not
pretty though. A useful project would be to make the testcase code
easier to execute.
Signed-off-by: Grant Likely <grant.likely@linaro.org>
pin-related configuration from the Ux500 board files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJS+etTAAoJEEEQszewGV1zDgUP/3ERZLEipA94foNp+kD+iD2p
Jj1uJCmTuEaPZ7J8PbbXredDlPZ5+PRcmPhHRhHzpf261LvKmoRxSrGgBX1V7ktc
9NhzjgxiVlk4nS2UEwsebgwIs3r0VpCqukBvKlODAEZvDBhA+QjkBbVcAGgvx5kx
MCdI/MxWzxEDB/NdgLYMNMabWtLTGrfvqp07kkGV3NITU6Xp4PeEMKBAgycoiD7q
ZoI7AnS3sOcNYL9dIHAlvu0CtJSzvpBkO2jqFjbAmTKFWF13qOHADsax1mGult4g
0BCjQiVCuuUfFENMiRps+HA9HQa2creBvd6p5DpwHWDXxDoWbeRCDGesKbECgw5p
r7iRldcs/6ZJ/EWXAwKp/SVMQHtmmsInP5EHdfj75HdWGUDP64rzDBvJnB5Ar28l
ZltSxDaFCor1GSTl/8EUDH9wrQkx4v0jG4vm1ZlzJizStTqNMeLNQkokvfj3qp3g
UalNIGGS8fcQRtWt11xwFPSwZDd/qXdLKkLII3YUfUvomuAtSWzx/TqeJx9nki+b
qAqOomlfF+zEhcYPhsNKkBmD3lRnQoOjsQbSj1ZvSAsfd8OLKKQ2T7197UezugKz
7WbR98gFUkuLwl2JG1TgEhskYFVWL587mnRKADMTqhyDKmuxRk5twPlsLGTFKYzY
Vd1a/Bte3udj0+l2TCK2
=GPK5
-----END PGP SIGNATURE-----
Merge tag 'ab8500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
Merge "Ux500 DT conversion" from Linus Walleij:
AB8500 device tree conversion and the deletion of all pin-related
configuration from the Ux500 board files.
* tag 'ab8500-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: move last AB8505 set-up to DT
ARM: ux500: move AB8500 clock out pins to DT
ARM: ux500: move AB8500 modem I2C settings to DT
ARM: ux500: move AB8500 EXTCPENA from board file to DT
ARM: ux500: move AB8500 DMIC settings to DT
ARM: ux500: move AB8500 USB UICC settings to DT
ARM: ux500: move AB8500 audio interface 1 settings to DT
ARM: ux500: move AB8500 PWM out settings to device tree
ARM: ux500: move AB8500 YCBCR settings to device tree
ARM: ux500: move AB8500 GPIOs to device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
- New SoC device tree support for imx35 and imx50
- A good number of new board support: imx25-eukrea, imx28-duckbill,
imx28-eukrea, Eukrea cpuimx35, imx50-evk, imx51-eukrea, imx53-voipac,
MCIMX53-START-R and Ka-Ro TX53.
- Quite some updates and tweaking on imx27 phycore and apf27dev boards
- Add pinfunc headers for imx25, imx27 and imx50
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Use clock defines in imx5 DTS files
- Use macros for interrupt and gpio flags
- A plenty of random updates on various SoC and board device tree
sources, adding pinctrl settings, device nodes, properties, aliases.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJS94QdAAoJEFBXWFqHsHzO9KkH/i23jhVVQcb2XXh81moW1LAM
QsPn3MpdPqTi3XDZ7mbsFlMJrucs1tHhMbnx9vI3Sc3IUtc/GPMqrF3CUwgd+hpZ
TfA79oJPeDYAj/7JqqsEnhQyBvlsUf4xdqFs8N0A0YxN9xfVtumpWHHFlOU2s3IW
tLczVI2dtXEzvvrFXlQtGv/fKKGZKzohwtbn4lE0CopeqGihvBBNr/v1SpoTm91S
Qxs+5hZR8GOmtatUPnirE9Di4U4T0cYcpBqk9iCWUQ2fvPNrk9/AE7zaohcX6z68
tUI2l8iU/fMx5t84m1brK/aVD+tRI9qRaUJficCshMzZz/kqSIR/hRkY6uecB0A=
=CCqs
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
Merge "i.MX device tree changes for 3.15" from Shawn Guo:
- New SoC device tree support for imx35 and imx50
- A good number of new board support: imx25-eukrea, imx28-duckbill,
imx28-eukrea, Eukrea cpuimx35, imx50-evk, imx51-eukrea, imx53-voipac,
MCIMX53-START-R and Ka-Ro TX53.
- Quite some updates and tweaking on imx27 phycore and apf27dev boards
- Add pinfunc headers for imx25, imx27 and imx50
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Use clock defines in imx5 DTS files
- Use macros for interrupt and gpio flags
- A plenty of random updates on various SoC and board device tree
sources, adding pinctrl settings, device nodes, properties, aliases.
* tag 'imx-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (89 commits)
ARM: dts: imx28-m28cu3: Remove 'reset-active-high'
ARM: dts: imx5: use imx51-ssi
ARM: dts: imx51: Add mmc aliases
ARM: dts: imx53: Add mmc aliases
ARM: dts: imx53: add support for Ka-Ro TX53 modules
ARM: dts: Add support for the cpuimx35 board from Eukrea and its baseboard.
ARM: dts: imx28-apf28dev: add user button
ARM: dts: i.MX51: Switch to use standard definitions for input subsystem
ARM: dts: i.MX53: add support for MCIMX53-START-R
ARM: dts: i.MX53: move common QSB nodes to new file
ARM: dts: imx53-evk: Remove board support
ARM: dts: vf610: use the interrupt macros
ARM: dts: imx53: Add gpio and input dt includes.
ARM: dts: i.MX27: Add SSI nodes
ARM: dts: mxs: add mxs phy controller id
ARM: dts: imx27-phytec-phycore-rdk: Add pinctrl definitions for WEIM
ARM: dts: imx27-phytec-phycore-rdk: Add pingrp for SDHC
ARM: dts: imx27-phytec-phycore-som: Add spi-cs-high property to PMIC
ARM: dts: imx27-phytec-phycore-rdk: Enable 1-Wire module
ARM: dts: imx27-phytec-phycore-som: Add NFC pin group
...
- A good number of new i.MX6 boards support: cm-fx6, dmo-edmqmx6,
nitrogen6x, Gateworks Ventana gw5xxx family, DFI FS700-M60 and
Zealz GK802
- Update imx6q-sabrelite device tree and add Dual Lite/Solo support
- Move pins that are used by particular client device out of hog group
- Use GPIO_6 for FEC interrupt to workaround a hardware bug (ERR006687
ENET: Only the ENET wake-up interrupt request can wake the system
from Wait mode.)
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Update OPP table for cpufreq support
- Random updates on various board device tree sources, adding pinctrl
settings, device nodes, properties, etc.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJS+I4nAAoJEFBXWFqHsHzO39AIALs0nns7ew/KyO4brtDP/gpA
dgTtpD5+eiddSng41aTun0WzUp/4r9iNL79lBfSUYJpo7+ZaQwpSlPbTz1wUMGtr
mINmTXNXHHLCufm8ywQMYrajF+wQKXEMAJ7/OLyxFzQTwsKW9OWr4DLiTgvVLuKs
IOD9scHe2KNRFJjfPmaS5w5W4h+Xs2VJO4mmCmy7zFgQ8MvIGpKGBZ3k3Y/c0Vqq
w8VjL2RPnK9Q8C4sjweP7QRvdnFyn4ClVTPGFQ8c/xs7QqC7cVIc6FSqlXAvWVmx
lnKv4y9+J4RyVGvQi9KwyscpEx1aD5xJv5hwl0MeoN8Kas9qhSfP9KfqWc9fL9I=
=tiCP
-----END PGP SIGNATURE-----
Merge tag 'imx6-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
Merge "i.MX6 device tree changes for 3.15" from Shawn Guo:
- A good number of new i.MX6 boards support: cm-fx6, dmo-edmqmx6,
nitrogen6x, Gateworks Ventana gw5xxx family, DFI FS700-M60 and
Zealz GK802
- Update imx6q-sabrelite device tree and add Dual Lite/Solo support
- Move pins that are used by particular client device out of hog group
- Use GPIO_6 for FEC interrupt to workaround a hardware bug (ERR006687
ENET: Only the ENET wake-up interrupt request can wake the system
from Wait mode.)
- Make pinctrl nodes board specific to avoid floating board specific
device tree blob with so many unused pinctrl data
- Use generic node name for fixed regulator
- Update OPP table for cpufreq support
- Random updates on various board device tree sources, adding pinctrl
settings, device nodes, properties, etc.
* tag 'imx6-dt-3.15' of git://git.linaro.org/people/shawnguo/linux-2.6: (62 commits)
ARM: dts: imx6q: Add support for Zealz GK802
ARM: dts: imx6: Add DFI FS700-M60 board support
ARM: dts: imx6: use imx51-ssi
ARM: dts: imx6qdl: Add mmc aliases
ARM: dts: imx6q: Add spi4 alias
ARM: dts: imx6qdl-sabreauto: Add LVDS support
ARM: dts: imx6sl: add keypad support for i.mx6sl-evk board.
ARM: dts: imx6sl: add ocram device support
ARM: dts: imx6qdl: enable dma for spi
ARM: dts: imx6qdl-sabresd: Add PFUZE100 support
ARM: dts: imx6: add mxs phy controller id
ARM: dts: imx6: add anatop phandle for usbphy
ARM: dts: imx6q-arm2: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl-sabreauto: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.
ARM: dts: imx6qdl: use interrupts-extended for fec
ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ
ARM: dts: imx6q-sabrelite: PHY reset is active-low
ARM: dts: imx6: Use 'vddarm' as the regulator name
ARM: dts: imx6qdl-sabresd: Add power key support
...
* r8a7791 (R-Car M2) based Koelsch board
- Enable GPIO Keys, (1+1)GiB memory, SATA0 and serial ports
- Add VIN and thermal clocks
- Remove r8a7791-koelsch-reference.dts
* r8a7790 (R-Car H2) based Lager board
- Replace IRQ type numerical values with macros
- Enable SATA0 and serial ports
- Add VIN and thermal clocks
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJS8yJIAAoJENfPZGlqN0++L5oP/is2wD+iOWk/x0vXU0Mfzx/q
WMOhn3h/cHagojfRJp9T+mkLkXEXmUVxHgo7vI44/1V1Ytxp7GFSTvDmHdPrsR5d
Dss/3zjxrpjRPSgEIq1dk/W1UoTTwKRlaJ425Nl0odi+C2qA60iwNKQrQp2Zu0kK
DnpHmbVm8qaG3I0HhdK851RLml4etakjQ+5zgyyrDH+++93LtZ1tLNaw4ZnFYPP4
J+OZczBeXfBjotK0r1nUVoF7qrtBDoK47QbBmT1Hto/0xdlnal0O7wskuiD9ZlM3
u7ZF6xvfP3fu1/urdRPV24QykaF//go6yv7pX99/PXmksnl+mK9h/gUDGZysygW4
UZQQukuApGrmEq1DItm+Zny2KbatOOYr5Xzss20W/sqlO9KGF248UyseVEs3kMZa
on6te/S78rZARPYDabusGJaPMRbKwx3LzXz81wJamv6u0MKre75maBwxIEqMTX9b
V52Z158+xsxibOggkLC4hDjOLrlG+ts8cbsO8CLuLZ7EuA9ICncSZXC5CFp2KDH+
MMUzQUj7/63irITIqvOolS0B3HrB08tINBe7N0Tjb99Am5CQ4Pe2ZJfBOZxzN01w
tsAtp7qMh9VcTY0dzRdZxqCpkBOtIhBRTWlGahVZdE0uR1o3M1s78AhPffwTdym/
E0YPt+A2T/edD0lXH9+7
=GRoY
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v3.15" from Simon Horman:
* r8a7791 (R-Car M2) based Koelsch board
- Enable GPIO Keys, (1+1)GiB memory, SATA0 and serial ports
- Add VIN and thermal clocks
- Remove r8a7791-koelsch-reference.dts
* r8a7790 (R-Car H2) based Lager board
- Replace IRQ type numerical values with macros
- Enable SATA0 and serial ports
- Add VIN and thermal clocks
* tag 'renesas-dt-for-v3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: Replace IRQ type numerical values with macros
ARM: shmobile: r8a7790: Fix serial ports DT compatible strings
ARM: shmobile: lager: Enable SATA1 in r8a7790-lager.dts
ARM: shmobile: r8a7790: Add SATA nodes to r8a7790.dtsi
ARM: shmobile: koelsch: Enable SATA0 in r8a7791-koelsch.dts
ARM: shmobile: r8a7791: Add SATA nodes to r8a7791.dtsi
ARM: shmobile: r8a7791: Add SATA clocks to device tree
ARM: shmobile: r8a7790: Add SATA clocks to device tree
ARM: shmobile: r8a7791: Add VIN clocks to device tree
ARM: shmobile: r8a7790: Add VIN clocks to device tree
ARM: shmobile: r8a7790: Add serial ports to the device tree
ARM: shmobile: r8a7791: Add serial ports to the device tree
ARM: shmobile: r8a7790: Add thermal clock in device tree
ARM: shmobile: r8a7791: Add thermal clock in device tree
ARM: shmobile: koelsch: (1+1)GiB memory in DT
ARM: shmobile: Add GPIO keys to Koelsch DTS
ARM: shmobile: dts: Remove r8a7791-koelsch-reference.dts
Signed-off-by: Olof Johansson <olof@lixom.net>
On imx6sl-evk board the VGEN1 regulator powers up the NVCC_1P2V domain of the
imx6sl SoC, so we need to keep it always powered.
According to imx6sl datasheet the GPIO block has three supplies:
NVCC33_IO, NVCC18_IO and NVCC_1P2V and it states that:
"All digital I/O supplies (NVCC_xxxx) must be powered under normal conditions
whether the associated I/O pins are in use or not"
This problem has been observed by the fact that a GPIO connected to an LED could
not work when the PMIC driver was enabled.
Keeping VGEN1 regulator always enabled fixes the problem.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The D9 LED controlled by gpio on the imx6qdl-sabreauto
CPU board is a debug LED according to the board design.
This patch adds the relevant device tree nodes to the
imx6qdl-sabreauto device tree file to support this LED.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch adds and enables simple-card support in DT node.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Venice2 contains an SPI Flash chip, which contains the bootloader.
Add this to the DT, so the kernel can access it.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cardhu has a PCA9546 for I2C bus extension, which connects to 3
cameras. It's required for Tegra V4L2 soc camera driver and camera
sensor drivers.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fix tegra_init_cache() to check whether the system has a PL310 cache
before touching the PL310 registers. This prevents access to non-existent
registers on Tegra114 and later.
Note for stable kernels:
In <= v3.12, the file to patch is arch/arm/mach-tegra/common.c.
Cc: <stable@vger.kernel.org> # v3.9+
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The number of the head specifies the index of the display controller
unit and is required to properly configure outputs so that they receive
video data from the correct source.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
When building a kernel image with only CONFIG_CPU_IDLE but no CONFIG_PM,
we will get the following link error.
LD init/built-in.o
arch/arm/mach-imx/built-in.o: In function `imx6q_enter_wait':
platform-spi_imx.c:(.text+0x25c0): undefined reference to `imx6q_set_lpm'
platform-spi_imx.c:(.text+0x25d4): undefined reference to `imx6q_set_lpm'
arch/arm/mach-imx/built-in.o: In function `imx6q_cpuidle_init':
platform-spi_imx.c:(.init.text+0x75d4): undefined reference to `imx6q_set_chicken_bit'
make[1]: *** [vmlinux] Error 1
Since pm-imx6q.c has been a collection of library functions that access
CCM low-power registers used by not only suspend but also cpuidle and
other drivers, let's build pm-imx6q.c independently of CONFIG_PM to fix
above error.
Reported-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: stable@vger.kernel.org
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This alias entry was evidently cut/paste from a different board, and
not correctly updated to match Cardhu. Fix this.
Fixes: 553c0a200e ("ARM: tegra: set up /aliases entries for RTCs")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"A range of ARM fixes. Biggest change is the stage-2 attributes used
for for hyp mode which were wrong. I've killed some bits in a couple
of DT files which turned out not to be required, and a few other
fixes.
One fix touches code outside of arch/arm, which is related to sorting
out the DMA masks correctly. There is a long standing issue with the
conversion from PFNs to addresses where people assume that shifting an
unsigned long left by PAGE_SHIFT results in a correct address. This
is not the case with C: the integer promotion happens at assignment
after evaluation. This fixes the recently introduced dma_max_pfn()
function, but there's a number of other places where we try this
directly on an unsigned long in the mm code"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 7957/1: add DSB after icache flush in __flush_icache_all()
Fix uses of dma_max_pfn() when converting to a limiting address
ARM: 7955/1: spinlock: ensure we have a compiler barrier before sev
ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMU
ARM: 7952/1: mm: Fix the memblock allocation for LPAE machines
ARM: 7950/1: mm: Fix stage-2 device memory attributes
ARM: dts: fix spdif pinmux configuration
In commit f0402f9b47 ("ARM: ixp4xx: stop using <mach/timex.h>")
I didn't intend to implement a functional change, but as Olof noticed I
failed---at least a bit. Before this commit the following was used to
determine the latch value used:
#define IXP4XX_TIMER_FREQ 66666000
#define CLOCK_TICK_RATE \
(((IXP4XX_TIMER_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
#define LATCH ((CLOCK_TICK_RATE + HZ/2) / HZ)
The complicated calculation was done "b/c the timer register ignores the
bottom 2 bits of the LATCH value." With HZ=100 CLOCK_TICK_RATE used to
calculate to 66666100 and so LATCH to 666661. In ixp4xx_set_mode the
term
LATCH & ~IXP4XX_OST_RELOAD_MASK
was used to write to the relevant register (with IXP4XX_OST_RELOAD_MASK
being 3) and so effectively 666660 was used.
In commit f0402f9b47 I translated that to:
#define IXP4XX_TIMER_FREQ 66666000
#define IXP4XX_LATCH DIV_ROUND_CLOSEST(IXP4XX_TIMER_FREQ, HZ)
which results in the same register writes, but still doesn't bear in
mind that the two least significant bits cannot be specified (which is
relevant only when HZ or IXP4XX_TIMER_FREQ are changed).
Instead of reverting back to the old approach use a more obvious and
also more correct way to calculate LATCH. (Regarding the more
correct claim: With IXP4XX_TIMER_FREQ == 66665999, the old code resulted
in LATCH = 666657 corresponding to a cycle time of 0.009999940149400597
seconds (error: -6.0e-8 s) while the new approach results in LATCH =
666660 and so a cycle time of 0.010000000150001503 seconds
(error: 1.5e-10 s).)
Fixes: f0402f9b47 ("ARM: ixp4xx: stop using <mach/timex.h>")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
At late init all unused clocks are disabled. So clocks that were not
get before will be gated. In Keysone 2 SoC we have at least one
necessary clock that is not used by any driver - "msmcsram". This
clock is necessary, because it supplies the Multicore Shared Memory
Controller (MSMC). MSMC is the coherency interconnect and all the
coherent masters are connected to it including devices which are not
under Linux OS control. MSMC clock should not be touched even in low
power states.
So drop the clock node, otherwise 'clk_ignore_unused' parameter will
disable the clock leading to system stall.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The corresponding driver didn't make it into v3.14, so we need to remove
the node. Dove systems fail to boot with the node present and no
driver.
This node will be re-added when the driver makes it to mainline.
Reported-by: Jean-Francois Moine <moinejf@free.fr>
Tested-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Switch the device tree to the new compatibles introduced in the clock drivers
to have a common pattern accross all Allwinner SoCs.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner A20 SoC is built around a pair of Cortex-A7 cores,
which have the usual generic timers. Report this in the DT.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Activate the shiny new riic driver for i2c2. Tested by accessing the
eeprom on the genmai board.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: resolved conflict]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DSB after icache flush to complete the cache maintenance operation.
Signed-off-by: Vinayak Kale <vkale@apm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Armada 385 DB board is the development board from Marvell for the
Armada 385 SoC. This commit adds a Device Tree description for this
board, which enables the following features:
* Network interfaces
* I2C buses
* SDIO
* Serial port
* SPI bus, with a SPI flash
* PCIe interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 380 and 385 SoCs are new SoCs from Marvell, based on a
Cortex-A9 cores (single core for 380, dual core for 385) and a number
of hardware blocks that are common with earlier SoCs from the mvebu
family.
The provided Device Tree describes the following parts of the SoC:
* CPU
* Device Bus
* Clocks
* Interrupt controllers: GIC and MPIC
* GPIO controllers
* I2C buses
* L2 cache
* MBus controller
* Pinctrl
* Serial
* SPI buses
* System controller (for reboot)
* Timer
* XOR engines
* PCIe controllers
* Network interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 375 DB board is the development board from Marvell for the
Armada 375 SoC. This commit adds a Device Tree description for this
board, which enables the following features:
* I2C buses
* SDIO
* Serial port
* SPI bus, with a SPI flash. Note that the SPI bus is disabled by
default, because it conflicts with the NAND, and can only work if
the board boots out of SPI. Since most boards are shipped to boot
out of NAND, we're default to having the SPI bus disabled.
* PCIe interfaces
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 375 SoC is a new SoC from Marvell, based on a dual core
Cortex-A9 and a number of hardware blocks that are common with earlier
SoCs from the mvebu family.
The provided Device Tree describes the following parts of the SoC:
* CPUs
* Device Bus
* Clocks
* Interrupt controllers: GIC and MPIC
* GPIO controllers
* I2C buses
* L2 cache
* MBus controller
* SDIO
* Pinctrl
* SATA
* Serial
* SPI buses
* System controller (for reboot)
* Timer
* XOR engines
* PCIe controllers
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add the devicetree node to enable watchdog support available in Dove SoCs.
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to support multiplatform builds the watchdog devicetree binding
was modified and now the 'reg' property is specified to need two
entries. This commit adds the second entry as-per the new specification.
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add the DT nodes to enable watchdog support available in Armada 370
and Armada XP SoCs.
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Keystone EVMK2HX supports 4 debug LEDs controlled by GPIO lines as
following (active level is high);
DBG_D1 green gpio12
DBG_D1 red gpio13
DBG_D1 blue gpio14
DBG_D1 blue gpio15
For more information see schematics:
http://wfcache.advantech.com/www/support/TI-EVM/download/Schematics/PDF/K2H_K2EVM-HK_SCH_A102_Rev1_0.pdf
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This patch adds Keystone GPIO IP device definitions in DT which supports
up to 32 GPIO lines and each GPIO line can be configured as separate
interrupt source (so called "unbanked" IRQ).
For more information see:
http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Add keystone timer entry to keystone device tree.
This 64-bit timer is used as backup clock event device.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
PCM-038 module have three triple LEDs connected to PMIC which
can be used for diagnostic purposes. This patch adds support
for these LEDs for PCM-038 SOM and adds basic LED-triggers for
these LEDs for PCM-970 RDK, the remaining LEDs are available
for use from userspace.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
These values are inherited, so don't need to be specified again.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
These values are inherited, so don't need to be specified again.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The DU device has no DT bindings yet, instantiate it as a platform
device for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: broken out of larger patch that
included board changes]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The DU device has no DT bindings yet, instantiate it as a platform
device for now.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: broken out of larger patch that
included board changes]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Perform a mechanical translation of rd88f6281-setup.c into DT. Since
the hardware differs between the A0 and A1 stepping, two dts files are
used, and a .dtsi file for the common parts. The A0 part does not have
a "wan" port on the switch and uses PHY address 10 to address the
switch. The A1 part does have the "wan" port and uses address 0.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Mechanically translate rd88f6192-nas-setup.c into DT equivelent.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In addition to the analog audio input and output, the Armada 370 DB
also has S/PDIF input and output optical connectors. This commit
improves the Device Tree description of the Armada 370 DB platform to
enable the S/PDIF support.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds the necessary Device Tree informations to enable
audio support on the Armada 370 DB platform. In details it:
* Instantiates the CS42L51 audio codec on the I2C0 bus, and
configures this bus with the appropriate pin-muxing configuration.
* Enables the I2S audio controller, and configures it with the
appropriate pin-muxing configuration.
* Through hog pins, ensures that the other pins possibly used for I2S
are muxed with another function than I2S.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit adds a pin-muxing configuration for the I2C0 bus of the
Armada 370, which is used on the Armada 370 DB platform to interface
with the CS42L51 audio codec.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370 SoC has an I2S audio controller. This commit adds the
description of this controller to the Device Tree describing this SoC,
as well as two possible muxing configurations for the I2S bus pins.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Mostly a collection of Kconfig, device tree data and compilation fixes
along with fix to drivers/phy that fixes a boot regression on some
Marvell mvebu platforms.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJS/o3LAAoJEFk3GJrT+8ZlNUEP/1k2zAaEJSB4Lf47jWszKnQ/
8tyY+2B5mcaziCIA+zVVGsjOpOEt7lBAVmDx2l1TDHe3tmnOAImqzOVseZZ4fEGo
Yr3md2T4/9KNtBeQLbO2nylc//UCSJoqANikhO8maIn4YIIZJM8IdlTl/GPWyQ3z
v1M+siIiPcr5jffdKhf201abl0nT7ZAhV0Jd0N3iZ8cvITupfen4VsB8gXGYnHP4
dR7186+sxCPj3nhhPcVgdYR55MM6I7pASG5/Z0FsrEnH/xcvdcyzK5KoVD/A2eG6
l6oltrP+WZ3/QGd/wW0nDbHfP5e4edCtzpxIoXq8r8kf8hdnUE9E40JM36NI5xz/
QNvt/fRXB5eOXTuX3xm8eJ44oyDo6U361oMe0jARwg7ULHeDfbQQ7gfLFsE5ad4p
Zeebhm5k//CeoeuPKFrrskAODQS4bjMuCvJX0QoHne1zaQ9K4TfGaivZJTUBSrGX
WqDzpACNcuFDOQJcEZ9r9NvD1z0PY9wwTEYyH1vn5B+N7E0hZypz9gpBZgn4yNNF
FWYRb467wkuWSWCfIHFjfSp9+SSw9NFx1DVR+SwOk4foMXcZNlQhfXghSZYJhV9t
lDOva0gmrhYO8RKru81AweMN6ZfaiWdw6xt5UUw/WUjZn6sDnNJwdX7hPCg+4d0e
NI2H44r2vOcS0gAL4IjV
=DDj5
-----END PGP SIGNATURE-----
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Kevin Hilman:
"A collection of ARM SoC fixes for v3.14-rc1.
Mostly a collection of Kconfig, device tree data and compilation fixes
along with fix to drivers/phy that fixes a boot regression on some
Marvell mvebu platforms"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
dma: mv_xor: Silence a bunch of LPAE-related warnings
ARM: ux500: disable msp2 device tree node
ARM: zynq: Reserve not DMAable space in front of the kernel
ARM: multi_v7_defconfig: Select CONFIG_SOC_DRA7XX
ARM: imx6: Initialize low-power mode early again
ARM: pxa: fix various compilation problems
ARM: pxa: fix compilation problem on AM300EPD board
ARM: at91: add Atmel's SAMA5D3 Xplained board
spi/atmel: document clock properties
mmc: atmel-mci: document clock properties
ARM: at91: enable USB host on at91sam9n12ek board
ARM: at91/dt: fix sama5d3 ohci hclk clock reference
ARM: at91/dt: sam9263: fix compatibility string for the I2C
ata: sata_mv: Fix probe failures with optional phys
drivers: phy: Add support for optional phys
drivers: phy: Make NULL a valid phy reference
ARM: fix HAVE_ARM_TWD selection for OMAP and shmobile
ARM: moxart: move DMA_OF selection to driver
ARM: hisi: fix kconfig warning on HAVE_ARM_TWD
This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Unfortunatly the device tree for older OMAP35xx Overo cannot be used
with newer OMAP36xx and vice-versa. To address this issue, move most of
the Tobi DTS to a common include file, and create model-specific Tobi
DTS.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Gumstix is the correct vendor for all Overo related products.
Reported-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tobi expansion board can be used with both OMAP35xx-based Overo,
and OMAP36xx-based Overo. Currently the boot is broken with newer
OMAP36xx-based Overo (Storm and alike). Fix include file and
compatible string to be able to boot newer models.
This will break older models. This will be addressed later.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Tested-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 97411608fd ("ARM: OMAP2+: Remove legacy support for zoom
platforms") removed the Kconfig symbols MACH_OMAP_ZOOM2 and
MACH_OMAP_ZOOM3. Remove the last usage of the related macros too.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The last caller of machine_is_nokia_n800() was removed in commit
5a87cde490 ("ARM: OMAP2+: Remove legacy booting support for n8x0").
That means that the Kconfig symbol MACH_NOKIA_N800 is now unused. It can
safely be removed.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add missing compatible property to avoid problems in the future.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
N9/N950 does not boot anymore with 3.14-rc1, because SoC compatible
property is missing. Fix that.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add platform data for tahvo-usb. This is the last missing piece to get
Tahvo USB working with 3.14.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fixes: commit 75d3625e0e
ARM: OMAP2+: gpmc: add DT bindings for OneNAND
OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for ONENAND driver to probe later. However this does
not happen if generic MTD_ONENAND framework is built as module (CONFIG_MTD_ONENAND=m).
Therefore, when MTD/ONENAND and MTD/ONENAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
ONENAND flash to remain un-detected.
This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_ONENAND=y || CONFIG_MTD_ONENAND=m
CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fixes: commit bc6b1e7b86
ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND
OMAP SoC(s) depend on GPMC controller driver to parse GPMC DT child nodes and
register them platform_device for NAND driver to probe later. However this does
not happen if generic MTD_NAND framework is built as module (CONFIG_MTD_NAND=m).
Therefore, when MTD/NAND and MTD/NAND/OMAP2 modules are loaded, they are unable
to find any matching platform_device and remain un-binded. This causes on board
NAND flash to remain un-detected.
This patch causes GPMC controller to parse DT nodes when
CONFIG_MTD_NAND=y || CONFIG_MTD_NAND=m
CC: <stable@vger.kernel.org> # 3.9.x+
Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Does not have an aux supply, and must be non-removable.
Otherwise it is removed during suspend and filesystem gets confused.
Signed-off-by: NeilBrown <neilb@suse.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP5, DRA7, AM43xx all have OPPs. So select the same to allow SoC
only configuration boot to work with OPP.
Reported-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pinctrl section and cd-gpio to mmc1. Without these the SD card is not
working on EVM-SK board.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clock for audio is sourced from virt_24000000_ck, so the correct
frequency is 24000000.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BMP085 EOC (End Of Conversion) irq line is connected to
gpio113 on gta04. Set irq properties to have driver using irq
instead polling for EOC.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pinctrl and SPI devices for QSPI on Lager.
Add Spansion s25fl512s SPI FLASH and MTD partitions.
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
According to datasheet, i.MX6Q has setpoint of 852MHz
which is exclusive with 996MHz, the fuse map of speed_grading
defines the max speed of ARM, here we add this 852MHz
setpoint opp info, kernel will check the speed_grading
fuse and remove all illegal setpoints.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
PCA-100 module cannot be used standalone. This patch renames
module file to .dtsi and excludes it from compilation.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the definitions for the BCM2835 I2S driver
to the device tree. Some GPIO settings are needed for
the correct pin functions.
Signed-off-by: Florian Meier <florian.meier@koalo.de>
[swarren: fixed DT node sort order, simplified DT label name, removed
RPI .dts file changs, since use of I2S is a user-added option.]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This adds the definitions for the BCM2835 dmaengine driver
to the device tree. The dma-channel-mask is currently
fixed. Later it should be set via the firmware.
Signed-off-by: Florian Meier <florian.meier@koalo.de>
[swarren, fixed DT node sort order]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
The following patch enables performance counter support on Raspberry-Pi.
We have this working on the 2708 based rasp-pi kernels by manually putting
the device registration in the platform files.
This change does things properly in a device tree. The boot messages look
proper, but my rasp-pi hangs somewhere in USB enabling when running a
stock 3.13-rc6 kernel so I have been unable to fully test this change.
I also understand that the rasp-pi 1176 pmu support is missing the
overflow interrupt. I'm not sure if that's true of all 2835
implementations. If not, then this patch will need to be changed a bit.
Signed-off-by: Vince Weaver <vincent.weaver@maine.edu>
[swarren, fixed DT node sort order]
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Pull networking updates from David Miller:
1) Fix flexcan build on big endian, from Arnd Bergmann
2) Correctly attach cpsw to GPIO bitbang MDIO drive, from Stefan Roese
3) udp_add_offload has to use GFP_ATOMIC since it can be invoked from
non-sleepable contexts. From Or Gerlitz
4) vxlan_gro_receive() does not iterate over all possible flows
properly, fix also from Or Gerlitz
5) CAN core doesn't use a proper SKB destructor when it hooks up
sockets to SKBs. Fix from Oliver Hartkopp
6) ip_tunnel_xmit() can use an uninitialized route pointer, fix from
Eric Dumazet
7) Fix address family assignment in IPVS, from Michal Kubecek
8) Fix ath9k build on ARM, from Sujith Manoharan
9) Make sure fail_over_mac only applies for the correct bonding modes,
from Ding Tianhong
10) The udp offload code doesn't use RCU correctly, from Shlomo Pongratz
11) Handle gigabit features properly in generic PHY code, from Florian
Fainelli
12) Don't blindly invoke link operations in
rtnl_link_get_slave_info_data_size, they are optional. Fix from
Fernando Luis Vazquez Cao
13) Add USB IDs for Netgear Aircard 340U, from Bjørn Mork
14) Handle netlink packet padding properly in openvswitch, from Thomas
Graf
15) Fix oops when deleting chains in nf_tables, from Patrick McHardy
16) Fix RX stalls in xen-netback driver, from Zoltan Kiss
17) Fix deadlock in mac80211 stack, from Emmanuel Grumbach
18) inet_nlmsg_size() forgets to consider ifa_cacheinfo, fix from Geert
Uytterhoeven
19) tg3_change_mtu() can deadlock, fix from Nithin Sujir
20) Fix regression in setting SCTP local source addresses on accepted
sockets, caused by some generic ipv6 socket changes. Fix from
Matija Glavinic Pecotic
21) IPPROTO_* must be pure defines, otherwise module aliases don't get
constructed properly. Fix from Jan Moskyto
22) IPV6 netconsole setup doesn't work properly unless an explicit
source address is specified, fix from Sabrina Dubroca
23) Use __GFP_NORETRY for high order skb page allocations in
sock_alloc_send_pskb and skb_page_frag_refill. From Eric Dumazet
24) Fix a regression added in netconsole over bridging, from Cong Wang
25) TCP uses an artificial offset of 1ms for SRTT, but this doesn't jive
well with TCP pacing which needs the SRTT to be accurate. Fix from
Eric Dumazet
26) Several cases of missing header file includes from Rashika Kheria
27) Add ZTE MF667 device ID to qmi_wwan driver, from Raymond Wanyoike
28) TCP Small Queues doesn't handle nonagle properly in some corner
cases, fix from Eric Dumazet
29) Remove extraneous read_unlock in bond_enslave, whoops. From Ding
Tianhong
30) Fix 9p trans_virtio handling of vmalloc buffers, from Richard Yao
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (136 commits)
6lowpan: fix lockdep splats
alx: add missing stats_lock spinlock init
9p/trans_virtio.c: Fix broken zero-copy on vmalloc() buffers
bonding: remove unwanted bond lock for enslave processing
USB2NET : SR9800 : One chip USB2.0 USB2NET SR9800 Device Driver Support
tcp: tsq: fix nonagle handling
bridge: Prevent possible race condition in br_fdb_change_mac_address
bridge: Properly check if local fdb entry can be deleted when deleting vlan
bridge: Properly check if local fdb entry can be deleted in br_fdb_delete_by_port
bridge: Properly check if local fdb entry can be deleted in br_fdb_change_mac_address
bridge: Fix the way to check if a local fdb entry can be deleted
bridge: Change local fdb entries whenever mac address of bridge device changes
bridge: Fix the way to find old local fdb entries in br_fdb_change_mac_address
bridge: Fix the way to insert new local fdb entries in br_fdb_changeaddr
bridge: Fix the way to find old local fdb entries in br_fdb_changeaddr
tcp: correct code comment stating 3 min timeout for FIN_WAIT2, we only do 1 min
net: vxge: Remove unused device pointer
net: qmi_wwan: add ZTE MF667
3c59x: Remove unused pointer in vortex_eisa_cleanup()
net: fix 'ip rule' iif/oif device rename
...
Instead of harcoding keycodes specifications in the Armada 370/XP
boards, use the <dt-bindings/input/input.h> header file and its
keycode definitions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Instead of harcoding 0 and 1 for the gpio specifications in the Armada
370/XP boards, use the <dt-bindings/gpio/gpio.h> header file and its
GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW definitions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The ->map_io() implementation of Armada 370/XP simply calls
debug_ll_io_init(), which is exactly what the kernel does when
->map_io is NULL. Therefore, there is no need to have a specific
->map_io() implementation in Armada 370/XP.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Instead of the of_find_matching_node()/of_match_node() pair, which requires two
iterations through the match table, make use of of_find_matching_node_and_match(),
which only iterates through the table once.
While we're here, mark the of_system_controller table const.
Signed-off-by: Josh Cartwright <joshc@codeaurora.org>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Commit 70b41abc15
"ARM: ux500: move MSP pin control to the device tree"
accidentally activated MSP2, giving rise to a boot scroll
scream as the kernel attempts to probe a driver for it and
fails to obtain DMA channel 14.
Fix this up by marking the node disabled again.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
GFP_ATOMIC is not a single gfp flag, but a macro which expands to the other
flags and LACK of __GFP_WAIT flag. To check if caller wanted to perform an
atomic allocation, the code must test __GFP_WAIT flag presence. This patch
fixes the issue introduced in v3.6-rc5
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: stable@vger.kernel.org
Recent changes to the pwm-backlight driver have made the power supply
mandatory. There is code in the regulator core to deal with situations
where no regulator is specified and provide a dummy, but that works on
DT-based boards only.
The situation can be remedied by adding a dummy regulator during board
initialization.
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
All Allwinner A20 boards we support can only use either EMAC or GMAC,
as they share the same pins. As we have switched all supported to
GMAC, we should alias GMAC (the active controller) as ethernet0,
so u-boot will insert the MAC address for the correct controller.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
GMAC has better performance and fewer hardware issues.
Use the GMAC in MII mode for ethernet instead of the EMAC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
GMAC has better performance and fewer hardware issues.
Use the GMAC in MII mode for ethernet instead of the EMAC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CubieTruck uses the GMAC with an RGMII phy.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A20 has EMAC and GMAC muxed on the same pins.
Add pin sets with gmac function for MII and RGMII mode to the DTSI.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The GMAC uses 1 of 2 sources for its transmit clock, depending on the
PHY interface mode. Add both sources as dummy clocks, and as parents
to the GMAC clock node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reserve space from 0x0 - __pa(swapper_pg_dir),
if kernel is loaded from 0, which is not DMAable.
It is causing problem with MMC driver and others
which want to add dma buffers to this space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
All of them are DT-related.
- fixes for typos in i2c and ohci clocks
- addition of a USB host node for at91sam9n12ek
- 2 DT documentation updates that have been sent a long time ago
- a new board based on the sama5d36 SoC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJS9QjhAAoJEAf03oE53VmQwwMIAMj6mM4Fv042REUssGIeVGlk
kmt3NzFeQI2ipTsgdwloAd53Hvty9RiX0ww4ZIGnxy8eZdEaRy6aDCohQsCvfYtx
LDcGdmIZ9056+62h/dqEbKYzs23j+diSJPe5sJF3/EHRRrRtBLSccEjnAMYI+Vqx
Gpj4XplbG89yXQZb1sKCCo9OsScu1ncdXs6G1ghZt1WhcvDwRuf/C0Af5KYCOibs
iXyMYxw7dd2VS8DxABxfi4xhW/ZZFR5ml66XdEW6MQLRG5Z33v7v7S9Wt0DV8uqd
C+naFnbm09/miHFX8bGZeI1Yaavs+UhKdD86fCn0Mn4uHNr4IdqqLGPEkZpjyJA=
=m41s
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
First series of AT91 fixes for 3.14.
All of them are DT-related.
- fixes for typos in i2c and ohci clocks
- addition of a USB host node for at91sam9n12ek
- 2 DT documentation updates that have been sent a long time ago
- a new board based on the sama5d36 SoC
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91: add Atmel's SAMA5D3 Xplained board
spi/atmel: document clock properties
mmc: atmel-mci: document clock properties
ARM: at91: enable USB host on at91sam9n12ek board
ARM: at91/dt: fix sama5d3 ohci hclk clock reference
ARM: at91/dt: sam9263: fix compatibility string for the I2C
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Select CONFIG_SOC_DRA7XX so that we can boot dra7-evm.
DRA7 family are A15 based processors that supports LPAE and an
evolutionary update to the OMAP5 generation of processors.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Since commit 9e8147bb5e
"ARM: imx6q: move low-power code out of clock driver"
the kernel fails to boot on i.MX6Q/D if preemption is
enabled (CONFIG_PREEMPT=y). The kernel just hangs
before the console comes up.
The above commit moved the initalization of the low-power
mode setting (enabling clocked WAIT states), which was
introduced in commit 83ae20981a
"ARM: imx: correct low-power mode setting", from
imx6q_clks_init to imx6q_pm_init. Now it is called
much later, after all cores are enabled.
This patch moves the low-power mode initialization back
to imx6q_clks_init again (and to imx6sl_clks_init).
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Due to commit 88f718e3fa
"ARM: pxa: delete the custom GPIO header" some drivers fail
compilation, for example like this:
In file included from sound/soc/pxa/spitz.c:28:0:
sound/soc/pxa/spitz.c: In function ‘spitz_ext_control’:
arch/arm/mach-pxa/include/mach/spitz.h:111:30: error:
‘PXA_NR_BUILTIN_GPIO’ undeclared (first use in this function)
#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
(etc.)
This is caused by implicit inclusion of <mach/irqs.h> from
various board-specific headers under <mach/*> in the PXA
platform. So we take a sweep over these, and for every such
header that uses PXA_NR_BUILTIN_GPIO or PXA_GPIO_TO_IRQ()
we explicitly #include "irqs.h" so that we satisfy the
dependency in the board include file alone.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org # v3.13+
Signed-off-by: Kevin Hilman <khilman@linaro.org>
This board fails compilation like this:
arch/arm/mach-pxa/am300epd.c: In function ‘am300_cleanup’:
arch/arm/mach-pxa/am300epd.c:179:2: error: implicit declaration
of function ‘PXA_GPIO_TO_IRQ’ [-Werror=implicit-function-declaration]
free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
This was caused by commit 88f718e3fa
"ARM: pxa: delete the custom GPIO header"
This is because it was previously getting the macro PXA_GPIO_TO_IRQ
implicitly from <linux/gpio.h> which in turn implicitly included
<mach/gpio.h> which in turn included <mach/irqs.h>.
Add the missing include so that the board compiles again.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
When unlocking a spinlock, we require the following, strictly ordered
sequence of events:
<barrier> /* dmb */
<unlock>
<barrier> /* dsb */
<sev>
Whilst the code does indeed reflect this in terms of the architecture,
the final <barrier> + <sev> have been contracted into a single inline
asm without a "memory" clobber, therefore the compiler is at liberty to
reorder the unlock to the end of the above sequence. In such a case,
a waiting CPU may be woken up before the lock has been unlocked, leading
to extremely poor performance.
This patch reworks the dsb_sev() function to make use of the dsb()
macro and ensure ordering against the unlock.
Cc: <stable@vger.kernel.org>
Reported-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
During __v{6,7}_setup, we invalidate the TLBs since we are about to
enable the MMU on return to head.S. Unfortunately, without a subsequent
dsb instruction, the invalidation is not guaranteed to have completed by
the time we write to the sctlr, potentially exposing us to junk/stale
translations cached in the TLB.
This patch reworks the init functions so that the dsb used to ensure
completion of cache/predictor maintenance is also used to ensure
completion of the TLB invalidation.
Cc: <stable@vger.kernel.org>
Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit ad6492b8 added much needed memblock_virt_alloc_low() and further
commit 07bacb3 {memblock, bootmem: restore goal for alloc_low} fixed
the issue with low memory limit thanks to Yinghai. But even after all
these fixes, there is still one case where the limit check done with
ARCH_LOW_ADDRESS_LIMIT for low memory fails. Russell pointed out the
issue with 32 bit LPAE machines in below thread.
https://lkml.org/lkml/2014/1/28/364
Since on some LPAE machines where memory start address is beyond 4GB,
the low memory marker in memblock will be set to default
ARCH_LOW_ADDRESS_LIMIT which is wrong. We can fix this by letting
architectures set the ARCH_LOW_ADDRESS_LIMIT using another export
similar to memblock_set_current_limit() but am not sure whether
its worth the trouble. Tell me if you think otherwise.
Rather am just trying to fix that one broken case using
memblock_virt_alloc() in setup code since the memblock.current_limit
is updated appropriately makes it work on all ARM 32 bit machines.
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Strashko, Grygorii <grygorii.strashko@ti.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The stage-2 memory attributes are distinct from the Hyp memory
attributes and the Stage-1 memory attributes. We were using the stage-1
memory attributes for stage-2 mappings causing device mappings to be
mapped as normal memory. Add the S2 equivalent defines for memory
attributes and fix the comments explaining the defines while at it.
Add a prot_pte_s2 field to the mem_type struct and fill out the field
for device mappings accordingly.
Cc: <stable@vger.kernel.org> [3.9+]
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Apply the same work-around for i.MX 6D/Q erratum 006687 as used for
Sabre Lite for the Wandboard Dual / Quad.
Like on the Sabre Lite, GPIO6 is used as a power down output for
camera expansion boards. However, these expansion boards do not work
with mainline yet anyway.
Tested on a Wandboard Quad. Before the patch:
root@arm:~# ping -q -f -c 10000 192.168.2.1
PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data.
=== 192.168.2.1 ping statistics ===
10000 packets transmitted, 10000 received, 0% packet loss, time 97363ms
rtt min/avg/max/mdev = 0.290/9.586/10.198/1.432 ms, pipe 2, ipg/ewma 9.737/9.672 ms
After the patch:
root@arm:~# ping -q -f -c 10000 192.168.2.1
PING 192.168.2.1 (192.168.2.1) 56(84) bytes of data.
=== 192.168.2.1 ping statistics ===
10000 packets transmitted, 10000 received, 0% packet loss, time 4810ms
rtt min/avg/max/mdev = 0.246/0.355/0.863/0.044 ms, ipg/ewma 0.481/0.319 ms
Signed-off-by: Sascha Silbe <x-linux@infra-silbe.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
GPIO3_20 is connected to a debug LED.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6sl-evk has a wm8962 codec. Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6sl-evk board has Freescale PFUZE100 regulator, so add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
From schematic, the power, vol+/- key's active state is low,
so we need to set the gpio flag to active low.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add support for the GK802 'QUAD CORE Mini PC', which seems to be loosely
based on the Freescale i.MX6Q HDMI dongle reference design.
It is supposedly identical to the Hiapad Hi802.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The DFI FS700-M60 is a q7 board with i.MX6 quad, dual, duallite or solo
SoC. This adds support for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
