val_bytes is of 'size_t', so it should be printed as '%zu'.
Fixes the following build warning on x86:
drivers/base/regmap/regmap.c:872:4: warning: format '%d' expects argument of type 'int', but argument 5 has type 'size_t' [-Wformat]
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If a block write covers a paged memory region and crosses a window
boundary then rather than failing the write split the transfer up
into multiple writes, making the whole process more transparent for
drivers.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The range code was written to check for return codes less than zero as
errors but throughout the rest of the API return codes not equal to zero
are errors. Change all these checks to match the house style.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If a register range is named then provide a debugfs file showing the
contents of the range separately.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Rather than just returning a single error code for every possible thing we
can notice print an error message saying what the problem was. This makes
it very much easier to figure out what's wrong and fix it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This makes things consistent with the rest of the API and is actually what
the documentation says. We don't currently have any in tree users so low
cost.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The primary handler will NOT be called if the interrupt nests into
another interrupt thread. Remove it to avoid confusing.
Signed-off-by: Yunfan Zhang <yfzhang@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Currently, regmap will write 1 to mask_base to mask
an interrupt and write 0 to unmask it.
But some chips do not have an interrupt mask register,
and only have interrupt enable register.
Then we should write 0 to disable interrupt and 1 to enable.
So add an mask_invert flag to handle this.
If it is not set, behavior is same as previous.
If set it to 1, the mask value will be inverted
before written to mask_base
Signed-off-by: Xiaofan Tian <tianxf@marvell.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Some devices need to have a runtime PM reference while handling interrupts
to ensure that the register I/O is available. Support this with a flag in
the chip.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The kerneldoc for irq_set_irq_wake() says:
Enable/disable power management wakeup mode, which is
disabled by default.
regmap_irq_set_wake() clears bits to enable wake for an interrupt,
and sets bits to disable wake. Hence, we should set all bits in
wake_buf initially, to mirror the expected disabled state.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If a regmap-irq chip has no wake base:
* There's no point calling .irq_set_wake, hence IRQCHIP_SKIP_SET_WAKE.
* If some IRQs in the chip are enabled for wake and some aren't, we
should mask those interrupts that are not wake enabled, so that if
they occur during suspend, the system is not awoken. Hence,
IRQCHIP_MASK_ON_SUSPEND.
Note that IRQCHIP_MASK_ON_SUSPEND is handled by check_wakeup_irqs(),
which always iterates over every single interrupt in the system,
irrespective of whether an interrupt is a child of a controller whose
output interrupt has no wake-enabled inputs and hence is presumably
masked itself. Hence this change might cause interrupt unnecessary
masking operations and associated register I/O.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This is intended to give each irq_chip a useful name, rather than hard-
coding them all as "regmap".
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This will allow later patches to adjust portions of the irq_chip
individually for each regmap_irq_chip that is created.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Don't write the full register, it's possible there's bits other than the
masks in the same register which we shouldn't be changing.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
A number of places in the code were printing error messages that included
the address of a register, but were not calculating the register address
in the same way as the access to the register. Use a temporary to solve
this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
When bus->fast_io is set, the locking here is done with spinlocks.
This is currently true for the regmap-mmio bus implementation.
While holding a spinlock we can't go to sleep, various operations
like removing the debugfs entries or re-initializing the cache will
sleep, therefore, shift the locking up to the user.
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Sometimes for failures during very early init the trace infrastructure
isn't available early enough to be used. For this sort of problem
defining LOG_DEVICE will add printks for basic register I/O on a specific
device, allowing trace to be extracted when the trace system doesn't come
up early enough to work with.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
After page update, orginal work_buf has to be restored regardless of
the result.
Signed-off-by: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Devices with register paging or indirectly accessed registers can configure
register mapping to map those on virtual address range. During access to
virtually mapped register range, indirect addressing is processed
automatically, in following steps:
1. selector for page or indirect register is updated (when needed);
2. register in data window is accessed.
Configuration should provide minimum and maximum register for virtual range,
details of selector field for page selection, minimum and maximum register of
data window for indirect access.
Virtual range registers are managed by cache as well as direct access
registers. In order to make indirect access more efficient, selector register
should be declared as non-volatile, if possible.
struct regmap_config is extended with the following:
struct regmap_range_cfg *ranges;
unsigned int n_ranges;
[Also reordered debugfs init to later on since the cleanup code was
conflicting with the new cleanup code for ranges anyway -- broonie]
Signed-off-by: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Locks are moved to regmap_update_bits(), which allows to reenter internal
function _regmap_update_bits() from inside of regmap read/write routines.
Signed-off-by: Krystian Garbaciak <krystian.garbaciak@diasemi.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
regmap_mmio_gen_context() is only used in regmap-mmio.c. Thus make it static.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Allow chips to provide a bank of registers for controlling the wake state
in a similar fashion to the masks and propagate the wake count to the
parent interrupt controller.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If the driver supplied an empty entry in the array of IRQs then return
an error rather than trying to do the mapping. This is intended for use
with handling chip variants and similar situations.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The word to be transmitted/received via regmap is composed by the following
parts:
config->reg_bits
config->val_bits
config->pad_bits
,so the total size should be calculated by summing up the number of bits of
each element and using a DIV_ROUND_UP to return the number of bytes.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If debugfs isn't cleaned up, stale files will be left in the filesystem
which will cause an OOPS when accessed the first time, and hang the
accessing application when accessed again, presumably due to some lock
being left held.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This will avoid the regmap core converting all addresses and values into
big endian, only for the mmio bus driver to have to convert them back to
native endian.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Add a field to struct regmap_bus that allows bus drivers to request that
register addresses and values be formatted with a specific endianness.
The default endianness is unchanged from current operation: Big.
Implement native endian formatting/parsing for 16- and 32-bit values.
This will be enough to support regmap-mmio.c.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Since there are uses for I2C_M_NOSTART which are much more sensible and
standard than most of the protocol mangling functionality (the main one
being gather writes to devices where something like a register address
needs to be inserted before a block of data) create a new I2C_FUNC_NOSTART
for this feature and update all the users to use it.
Also strengthen the disrecommendation of the protocol mangling while we're
at it.
In the case of regmap-i2c we remove the requirement for mangling as
I2C_M_NOSTART is the only mangling feature which is being used.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Ensure that we can't get randconfig breakage by doing the IRQ_DOMAIN
select automatically. Don't just do the select from REGMAP_IRQ to ensure
that the select actually gets noticed.
Reported-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
In some chips the IRQ status registers are not contiguous in the register
map but spaced at even spaces. This is an easy case to handle with minor
changes. It is assume for this purpose that the stride for status is
equal to the stride for mask/ack registers as well.
Signed-off-by: Graeme Gregory <gg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This gets us up to date with the recommended current kernel infrastructure
and should transparently give us device tree interrupt bindings for any
devices using the framework. If an explicit IRQ mapping is passed in then
a legacy interrupt range is created, otherwise a simple linear mapping is
used. Previously a mapping was mandatory so existing drivers should not
be affected.
A function regmap_irq_get_virq() is provided to allow drivers to map
individual IRQs which should be used in preference to the existing
regmap_irq_chip_get_base() which is only valid if a legacy IRQ range is
provided.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This is a last minute bug fix that was only just noticed since the code
path that's being exercised here is one that is fairly rarely used. The
changelog for the change itself is extremely clear and the code itself
is obvious to inspection so should be pretty safe.
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Merge tag 'regmap-3.4' into regmap-stride
regmap: Last minute bug fix for 3.4
This is a last minute bug fix that was only just noticed since the code
path that's being exercised here is one that is fairly rarely used. The
changelog for the change itself is extremely clear and the code itself
is obvious to inspection so should be pretty safe.
Conflicts:
drivers/base/regmap/regmap.c (overlap between the fix and stride code)
The function regmap_bulk_read() calls the regmap_read() for
each register if set of register has volatile and cache is
enabled. In this case, last few register read makes the memory
corruption if the register size is not the size of unsigned int.
The regam_read() takes argument as unsigned int for returning
value and it update the value as
*val = map->format.parse_val(map->work_buf);
This causes complete 4 bytes (size of unsigned int) to get written.
Now if client pass the memory pointer for value which is equal to the
required size of register count in regmap_bulk_read() then last few
register read actually update the memory beyond passed pointer size.
Avoid this by using local variable for read and then do memcpy()
for actual byte copy to passed pointer based on register size.
I allocated one pointer ptr and take first 16 bytes dump of that
pointer then call regmap_bulk_read() with pointer which is just
on top of this allocated pointer and register count of 128. Here
register size is 1 byte.
The memory trace of last 5 register read are as follows:
[ 5.438589] regmap_bulk_read after regamp_read() for register 122
[ 5.447421] 0xef993c20 0xef993c00 0x00000000 0x00000001
[ 5.467535] regmap_bulk_read after regamp_read() for register 123
[ 5.476374] 0xef993c20 0xef993c00 0x00000000 0x00000001
[ 5.496425] regmap_bulk_read after regamp_read() for register 124
[ 5.505260] 0xef993c20 0xef993c00 0x00000000 0x00000001
[ 5.525372] regmap_bulk_read after regamp_read() for register 125
[ 5.534205] 0xef993c00 0xef993c00 0x00000000 0x00000001
[ 5.554258] regmap_bulk_read after regamp_read() for register 126
[ 5.563100] 0xef990000 0xef993c00 0x00000000 0x00000001
[ 5.554258] regmap_bulk_read after regamp_read() for register 127
[ 5.587108] 0xef000000 0xef993c00 0x00000000 0x00000001
Here it is observed that the memory content at first word started changing
on last 3 regmap_read() and so corruption happened.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use devres to implement dev_get_regmap(). This should mean that in almost
all cases devices wishing to take advantage of framework features based on
regmap shouldn't need to explicitly pass the regmap into the framework.
This simplifies device setup a bit.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Set the use_single_rw flag for devices that use format_write() since
format_write() doesn't support any form of block operation.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Some devices does not support bulk read and write operations, for them
we have series of single write and read operations.
Signed-off-by: Anthony Olech <Anthony.Olech@diasemi.com>
Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
[Fixed coding style, don't check use_single_rw before assign --broonie ]
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
If we don't have a cached value for a register and we can cache it then
when we do a read a value we should add it to the cache to save rereading
it later on. Do this for single register reads, for block reads the code
would be a little more complex and this covers most practical usage.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Commit f01ee60fff ("regmap: implement register striding") caused the
compile errors below. Fix them.
drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_sync_unlock':
drivers/base/regmap/regmap-irq.c:62:12: error: 'map' undeclared (first use in this function)
drivers/base/regmap/regmap-irq.c:62:12: note: each undeclared identifier is reported only once for each function it appears in
drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_enable':
drivers/base/regmap/regmap-irq.c:77:37: error: 'map' undeclared (first use in this function)
drivers/base/regmap/regmap-irq.c: In function 'regmap_irq_disable':
drivers/base/regmap/regmap-irq.c:85:37: error: 'map' undeclared (first use in this function)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
regmap_config.reg_stride is introduced. All extant register addresses
are a multiple of this value. Users of serial-oriented regmap busses will
typically set this to 1. Users of the MMIO regmap bus will typically set
this based on the value size of their registers, in bytes, so 4 for a
32-bit register.
Throughout the regmap code, actual register addresses are used. Wherever
the register address is used to index some array of values, the address
is divided by the stride to determine the index, or vice-versa. Error-
checking is added to all entry-points for register address data to ensure
that register addresses actually satisfy the specified stride. The MMIO
bus ensures that the specified stride is large enough for the register
size.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
