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4 Commits

Author SHA1 Message Date
Chen-Yu Tsai
dc8797e39f clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching
All of our MMC clocks are of the MP clock type. A few MMC clocks on some
SoCs, such as MMC2 on the A83T, support new/old timing mode switching.

>From a clock rate point of view, when the new timing mode is active. the
output clock rate is halved.

This patch adds a special wrapper class of clocks, MP_MMC, around the
generic MP type clocks. The rate related callbacks in ccu_mp_mmc_ops
for this class look at the timing mode bit and apply the /2 post-divider
when needed, before passing it through to the generic class ops,
ccu_mp_ops.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2017-08-30 14:01:47 +02:00
Maxime Ripard
a501a14e38 clk: sunxi-ng: Rename the internal structures
Rename the structures meant to be embedded in other structures to make it
consistent with the mux structure name

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
2016-10-20 19:24:20 +02:00
Maxime Ripard
89af85253c clk: sunxi-ng: mux: Rename mux macro to be consistent
Rename the internal mux macro to be consistent with the other internal
structure macros.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2016-08-25 22:25:53 +02:00
Maxime Ripard
2ab836db50 clk: sunxi-ng: Add M-P factor clock support
Introduce support for the clocks that combine a linear divider and a
power-of-two based one.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20160629190535.11855-9-maxime.ripard@free-electrons.com
2016-07-08 18:04:52 -07:00