2
0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-24 05:04:00 +08:00
Commit Graph

10 Commits

Author SHA1 Message Date
Nishad Kamdar
7a12f838e4 clk: sprd: Use the correct style for SPDX License Identifier
This patch corrects the SPDX License Identifier style
in header files related to Clock Drivers for Spreadtrum SoCs.
For C header files Documentation/process/license-rules.rst
mandates C-like comments (opposed to C source files where
C++ style should be used)

Changes made by using a script provided by Joe Perches here:
https://lkml.org/lkml/2019/2/7/46

Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-05-01 13:01:23 -07:00
Chunyan Zhang
b3316a672b clk: sprd: add RTC gate for SC9860
Add a few gate clocks which are used for gating RTC for some
devices on AON area of SC9860.

This patch has been tested on SC9860, with this patch and proper DT
configurations, the watchdog can be initialized and work well.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-16 15:53:30 -07:00
Stephen Boyd
716d9b1d4a Merge branch 'clk-divider-container' into clk-next
* clk-divider-container:
  clk: divider: fix incorrect usage of container_of

Plus fixup sprd/div.c to pass the width too.
2018-01-26 16:43:14 -08:00
Chunyan Zhang
a6ae1a2948 clk: sprd: add clocks support for SC9860
This patch added the list of clocks for Spreadtrum's SC9860 SoC,
together with clock initialization code.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:54 -08:00
Chunyan Zhang
3e37b00558 clk: sprd: add adjustable pll support
Introduced a common adjustable pll clock driver for Spreadtrum SoCs.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:53 -08:00
Chunyan Zhang
4fcba55cc6 clk: sprd: add composite clock support
This patch introduced composite driver for Spreadtrum's SoCs. The
functions of this composite clock simply consist of divider and
mux clocks.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:52 -08:00
Chunyan Zhang
e3f05d3b18 clk: sprd: add divider clock support
This is a feature that can also be found in sprd composite clocks,
provide a bunch of helpers that can be reused later on.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:52 -08:00
Chunyan Zhang
ab73cf2a54 clk: sprd: add mux clock support
This patch adds clock multiplexor support for Spreadtrum platforms,
the mux clocks also can be found in sprd composite clocks, so
provides two helpers that can be reused later on.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:52 -08:00
Chunyan Zhang
cdb09f67a2 clk: sprd: add gate clock support
Some clocks on the Spreadtrum's SoCs are just simple gates. Add
support for those clocks.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:51 -08:00
Chunyan Zhang
d41f59fd92 clk: sprd: Add common infrastructure
Added Spreadtrum's clock driver framework together with common
structures and interface functions.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 15:00:51 -08:00