Change return type of functions sysc_check_one_child() and
sysc_check_children() from int to void as neither ever returns an error.
Modify call sites of both functions accordingly.
Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch from module_platform_driver_probe() to module_platform_driver().
The former is not suitable for booting with device tree as the driver
will be registered before the device and thus won't be probed again
when the device is present.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Starting with commit 72175d4ea4 ("driver core: Make driver core own
stateful device links") stateful device links are owned by the driver
core and should not be explicitly removed on device unbind. Delete all
device_link_del appearances from the fsl-mc bus.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-By: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
On the Turris Mox router different modules can be connected to the main
CPU board: currently a module with a SFP cage, a module with MiniPCIe
connector, a PCIe pass-through MiniPCIe connector module, a 4-port
switch module, an 8-port switch module, and a 4-port USB3 module.
For example:
[CPU]-[PCIe-pass-through]-[PCIe]-[8-port switch]-[8-port switch]-[SFP]
Each of this modules has an input and output shift register, and these
are connected via SPI to the CPU board.
Via SPI we are able to discover which modules are connected, in which
order, and we can also read some information about the modules (eg.
their interrupt status), and configure them.
From each module 8 bits can be read (of which low 4 bits identify the
module) and 8 bits can be written.
For example from the module with a SFP cage we can read the LOS,
TX-FAULT and MOD-DEF0 signals, while we can write TX-DISABLE and
RATE-SELECT signals.
This driver creates a new bus type, called "moxtet". For each Mox module
it finds via SPI, it creates a new device on the moxtet bus so that
drivers can be written for them.
It also implements a virtual interrupt controller for the modules which
send their interrupt status over the SPI shift register. These modules
do this in addition to sending their interrupt status via the shared
interrupt line. When the shared interrupt is triggered, we read from the
shift register and handle IRQs for all devices which are in interrupt.
The topology of how Mox modules are connected can then be read by
listing /sys/bus/moxtet/devices.
Link: https://lore.kernel.org/r/20190812161118.21476-2-marek.behun@nic.cz
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/bus/ti-sysc.c: In function sysc_reset:
drivers/bus/ti-sysc.c:1452:50: warning: variable quirks set but not used [-Wunused-but-set-variable]
It is never used since commit e0db94fe87 ("bus: ti-sysc: Make
OCP reset work for sysstatus and sysconfig reset bits")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some devices need to share their reset signals, like DSP MMUs, thus drop
the exclusive notation from reset request. Also, balance the init time
reset count, otherwise the resets will never be applied post boot.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If reset controllers are assigned to the ti-sysc target-module, only
ti-sysc is going to be able to control these. Thus, remove all the
disable_on_idle flag usage, and assert/de-assert the reset always
in the idle path. Otherwise the reset signal will always just be
de-asserted.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Parenting clockdomain for the IP should be enabled during the reset
handling logic, otherwise the reset may not finish properly. Re-order
the clockdomain control logic to avoid this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
A few fields in various structures is missing the corresponding
kerneldoc comments. Add them. Also, fixed the comment for sidlemodes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the appropriate SPDX license identifier in the TI sysc
interconnect target driver source files and drop the previous
boilerplate license text. Also, add the the SPDX license
identifier in the associated ti-sysc header files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clocks are not yet parsed and prepared until after a successful
sysc_get_clocks(), so there is no need to unprepare the clocks upon
any failure of any of the prior functions in sysc_probe(). The current
code path would have been a no-op because of the clock validity checks
within sysc_unprepare(), but let's just simplify the cleanup path by
returning the error directly.
While at this, also fix the cleanup path for a sysc_init_resets()
failure which is executed after the clocks are prepared.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The original driver author seemed to be under the impression that a driver
cannot be removed if it does not have a .remove method. Or maybe if it is
a built-in platform driver.
This is not true. This crash can be created:
root@ubuntu:/sys/bus/platform/drivers/hisi-lpc# echo HISI0191\:00 > unbind
root@ubuntu:/sys/bus/platform/drivers/hisi-lpc# ipmitool raw 6 1
Unable to handle kernel paging request at virtual address ffff000010035010
Mem abort info:
ESR = 0x96000047
Exception class = DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
Data abort info:
ISV = 0, ISS = 0x00000047
CM = 0, WnR = 1
swapper pgtable: 4k pages, 48-bit VAs, pgdp=000000000118b000
[ffff000010035010] pgd=0000041ffbfff003, pud=0000041ffbffe003, pmd=0000041ffbffd003, pte=0000000000000000
Internal error: Oops: 96000047 [#1] PREEMPT SMP
Modules linked in:
CPU: 17 PID: 1473 Comm: ipmitool Not tainted 5.2.0-rc5-00003-gf68c53b414a3-dirty #198
Hardware name: Huawei Taishan 2280 /D05, BIOS Hisilicon D05 IT21 Nemo 2.0 RC0 04/18/2018
pstate: 20000085 (nzCv daIf -PAN -UAO)
pc : hisi_lpc_target_in+0x7c/0x120
lr : hisi_lpc_target_in+0x70/0x120
sp : ffff00001efe3930
x29: ffff00001efe3930 x28: ffff841f9f599200
x27: 0000000000000002 x26: 0000000000000000
x25: 0000000000000080 x24: 00000000000000e4
x23: 0000000000000000 x22: 0000000000000064
x21: ffff801fb667d280 x20: 0000000000000001
x19: ffff00001efe39ac x18: 0000000000000000
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: 0000000000000000 x12: 0000000000000000
x11: 0000000000000000 x10: 0000000000000000
x9 : 0000000000000000 x8 : ffff841febe60340
x7 : ffff801fb55c52e8 x6 : 0000000000000000
x5 : 0000000000ffc0e3 x4 : 0000000000000001
x3 : ffff801fb667d280 x2 : 0000000000000001
x1 : ffff000010035010 x0 : ffff000010035000
Call trace:
hisi_lpc_target_in+0x7c/0x120
hisi_lpc_comm_in+0x88/0x98
logic_inb+0x5c/0xb8
port_inb+0x18/0x20
bt_event+0x38/0x808
smi_event_handler+0x4c/0x5a0
check_start_timer_thread.part.4+0x40/0x58
sender+0x78/0x88
smi_send.isra.6+0x94/0x108
i_ipmi_request+0x2c4/0x8f8
ipmi_request_settime+0x124/0x160
handle_send_req+0x19c/0x208
ipmi_ioctl+0x2c0/0x990
do_vfs_ioctl+0xb8/0x8f8
ksys_ioctl+0x80/0xb8
__arm64_sys_ioctl+0x1c/0x28
el0_svc_common.constprop.0+0x64/0x160
el0_svc_handler+0x28/0x78
el0_svc+0x8/0xc
Code: 941d1511 aa0003f9 f94006a0 91004001 (b9000034)
---[ end trace aa842b86af7069e4 ]---
The problem here is that the host goes away but the associated logical PIO
region remains registered, as do the children devices.
Fix by adding a .remove method to tidy-up by removing the child devices
and unregistering the logical PIO region.
Cc: stable@vger.kernel.org
Fixes: adf38bb0b5 ("HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings")
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
If, after registering a logical PIO range, the driver probe later fails,
the logical PIO range memory will be released automatically.
This causes an issue, in that the logical PIO range is not unregistered
and the released range memory may be later referenced.
Fix by unregistering the logical PIO range.
And since we now unregister the logical PIO range for probe failure, avoid
the special ordering of setting logical PIO range ops, which was the
previous (poor) attempt at a safeguard against this.
Cc: stable@vger.kernel.org
Fixes: adf38bb0b5 ("HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings")
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.
// <smpl>
@@
expression ret;
struct platform_device *E;
@@
ret =
(
platform_get_irq(E, ...)
|
platform_get_irq_byname(E, ...)
);
if ( \( ret < 0 \| ret <= 0 \) )
{
(
-if (ret != -EPROBE_DEFER)
-{ ...
-dev_err(...);
-... }
|
...
-dev_err(...);
)
...
}
// </smpl>
While we're here, remove braces on if statements that only have one
statement (manually).
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
We are currently using a wrong register for dcan revision. Although
this is currently only used for detecting the dcan module, let's
fix it to avoid confusion.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have cases where there are no softreset bits like with am335x lcdc.
In that case ti,sysc-mask = <0> needs to be handled properly.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For some devices we can get the following warning on boot:
ti-sysc 48485200.target-module: sysc_disable_module: invalid midlemode
Fix this by treating SYSC_IDLE_FORCE like we do for the other bits
for idlemodes mask.
Fixes: d59b60564c ("bus: ti-sysc: Add generic enable/disable functions")
Cc: Roger Quadros <rogerq@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
- A driver for SCU (system control) on NXP i.MX8QXP
- Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
- Qualcomm PM support for MSM8998
- Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
- Reset controller support for Bitmain BM1880
- TI SCI (System Control Interface) support for CPU control on AM654
processors
- More TI sysc refactoring and rework
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yK3YPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3WdUQAJEFRzY4+8VfsUspKmGwzHsrk7t1038JUEDE
VL3yYlvSGeHg5a58AI5PCR5ZCsyPK7Yw9cAcYexd0frFR7BCwKWrjqem0Lb5ovdK
CYM517DRtYPSBMF08Xw4pbZlT0yg65F1e9cf6BlUpkUZ6lJn4gUy8Y4BE6Aw/zuF
QKtQNs6Q8BUZqS3uoOpJ/PY4JiUmLPQPO4Lry7Lud8Z7qgArCC326paC3wwqjLoC
TpoMqb6izt7Vzo4BtTo5TUCyiEFZDlb/thhDySVlYRE7DQJusHBvRO9qgjI2ahOo
1/935q1fJO7S6+Yvc8DIzrD/DrIUOvOshi31F/J6iWKkQkTUxtQwsVReZKaiOfSD
fYxNVCgTcMS6ailKQSMQ0SYgXDa2gWdV3tS9XU8qML3tnDthi1nDmZks0QAAnFPS
bXRcWGtgqeQJ+QJ7yyKrsD9POeaq3Hc5/f1DN34H//Cyn0ip/fD6fkLCMIfUDwmu
TmO2Mnj6/fG/iBK+ToF+DaJ0/u3RiV2MC2vCE+0m3cVI9jtq9iA1y3UlmoaKUhhC
t9znA+u8/Jc5S2zNQriI2Ja5q8nKfihL7Jf68ENvGzLc7YuAqP6yx1LMg1g6Wshc
nLT+kHOF6DCUC3W7a8VuNyaxCwVtTbNTti+nvQVOmV6eaGiD5vzpXkHBWMbOJ7Lh
YOBwGyb4
=ek+j
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
- A driver for SCU (system control) on NXP i.MX8QXP
- Qualcomm Always-on Subsystem messaging driver (AOSS QMP)
- Qualcomm PM support for MSM8998
- Support for a newer version of DRAM PHY driver for Broadcom (DPFE)
- Reset controller support for Bitmain BM1880
- TI SCI (System Control Interface) support for CPU control on AM654
processors
- More TI sysc refactoring and rework"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (84 commits)
reset: remove redundant null check on pointer dev
soc: rockchip: work around clang warning
dt-bindings: reset: imx7: Fix the spelling of 'indices'
soc: imx: Add i.MX8MN SoC driver support
soc: aspeed: lpc-ctrl: Fix probe error handling
soc: qcom: geni: Add support for ACPI
firmware: ti_sci: Fix gcc unused-but-set-variable warning
firmware: ti_sci: Use the correct style for SPDX License Identifier
soc: imx8: Use existing of_root directly
soc: imx8: Fix potential kernel dump in error path
firmware/psci: psci_checker: Park kthreads before stopping them
memory: move jedec_ddr.h from include/memory to drivers/memory/
memory: move jedec_ddr_data.c from lib/ to drivers/memory/
MAINTAINERS: Remove myself as qcom maintainer
soc: aspeed: lpc-ctrl: make parameter optional
soc: qcom: apr: Don't use reg for domain id
soc: qcom: fix QCOM_AOSS_QMP dependency and build errors
memory: tegra: Fix -Wunused-const-variable
firmware: tegra: Early resume BPMP
soc/tegra: Select pinctrl for Tegra194
...
Another round of SPDX updates for 5.2-rc6
Here is what I am guessing is going to be the last "big" SPDX update for
5.2. It contains all of the remaining GPLv2 and GPLv2+ updates that
were "easy" to determine by pattern matching. The ones after this are
going to be a bit more difficult and the people on the spdx list will be
discussing them on a case-by-case basis now.
Another 5000+ files are fixed up, so our overall totals are:
Files checked: 64545
Files with SPDX: 45529
Compared to the 5.1 kernel which was:
Files checked: 63848
Files with SPDX: 22576
This is a huge improvement.
Also, we deleted another 20000 lines of boilerplate license crud, always
nice to see in a diffstat.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXQyQYA8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ymnGQCghETUBotn1p3hTjY56VEs6dGzpHMAnRT0m+lv
kbsjBGEJpLbMRB2krnaU
=RMcT
-----END PGP SIGNATURE-----
Merge tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx
Pull still more SPDX updates from Greg KH:
"Another round of SPDX updates for 5.2-rc6
Here is what I am guessing is going to be the last "big" SPDX update
for 5.2. It contains all of the remaining GPLv2 and GPLv2+ updates
that were "easy" to determine by pattern matching. The ones after this
are going to be a bit more difficult and the people on the spdx list
will be discussing them on a case-by-case basis now.
Another 5000+ files are fixed up, so our overall totals are:
Files checked: 64545
Files with SPDX: 45529
Compared to the 5.1 kernel which was:
Files checked: 63848
Files with SPDX: 22576
This is a huge improvement.
Also, we deleted another 20000 lines of boilerplate license crud,
always nice to see in a diffstat"
* tag 'spdx-5.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx: (65 commits)
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 507
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 506
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 505
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 504
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 503
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 502
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 501
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 498
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 497
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 496
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 495
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 491
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 490
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 489
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 488
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 487
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 486
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 485
...
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This series of changes improves probing devices with ti-sysc to the
point where we can now probe most devices without the custom dts
property "ti,hwmods" and no legacy platform data :)
We add support for platform data callbacks for idling and unidling the
clockdomain the module belongs to. The rest of the series mostly adds
handling for the various quirks needed by old legacy modules such as
i2c and watchdog. Some quirk handling is still missing for few modules,
but those will be added as they get tested.
The related platform data and dts changes will be sent separately.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl0AuTURHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPn4A//Z7uWk98dwcIs8/28CaFTPsRGhx3p+hj0
Mafl3eT5Q/y0TFGkMw3g5LSX5EZlz+5t6eFsolU+O8p6jsPoo5mcsGQfgkraydE3
x0wfSkFiqJcTP4FFvrwcekSQZGjpeZoUdQZ/e2epSDWvPx9gRzLFR3wCLPJ1MOgg
dveEJTnPfpFLliTZeVpcn4v2P4+KfBn4iu2ojr9qcLZL9QNFZr3NQLRdx6kUw7qf
b3eRugzx3sBA4pKLEfqrOzqjP77W9sy1zDN5rA3GNgo+b+OyBhdu/pxxkREP4t4+
8/1E/JndDVkO98ooFJ+MWdnh8HQmefEjyaoaYa7LN6438mivkOFPFAUMtuOdKzv/
FTa9r7xpo1Iq5b3HyE7NA+xZfoHKBEHzY0zbNyJLz75Ctnh3zOuHAA3xwxOlbgn+
UX/1DAS/7ALUXrXkk331VVzYX5UfOxrH2+CF2GF9vpCNZZ17Qp3ZKy4XW1Qv9nfy
nozOkqSvbGG0tzhq+wLd6Soo2Vns7CfHRqDB8txLeBGtrk/kahHsxe7dLo4+fHk6
DH0R7mZ6QnvaMWpJwkqoBUp7lD9ej9/pw2newbb5RyUDQqMjNvdY3zcBOeXeWulh
m2hWFKt1JTGTvXtbTjOOnfQIyICUClMzo4VowLBplfZELJvK781/5P3Jb4ZOFF0N
I1DN4vDxqMg=
=Fxul
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.3/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/drivers
ti-sysc interconnect target module driver changes for v5.3
This series of changes improves probing devices with ti-sysc to the
point where we can now probe most devices without the custom dts
property "ti,hwmods" and no legacy platform data :)
We add support for platform data callbacks for idling and unidling the
clockdomain the module belongs to. The rest of the series mostly adds
handling for the various quirks needed by old legacy modules such as
i2c and watchdog. Some quirk handling is still missing for few modules,
but those will be added as they get tested.
The related platform data and dts changes will be sent separately.
* tag 'omap-for-v5.3/ti-sysc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Add support for module specific reset quirks
bus: ti-sysc: Detect uarts also on omap34xx
bus: ti-sysc: Do rstctrl reset handling in two phases
bus: ti-sysc: Add support for disabling module without legacy mode
bus: ti-sysc: Set ENAWAKEUP if available
bus: ti-sysc: Handle swsup idle mode quirks
bus: ti-sysc: Handle clockactivity for enable and disable
bus: ti-sysc: Enable interconnect target module autoidle bit on enable
bus: ti-sysc: Allow QUIRK_LEGACY_IDLE even if legacy_mode is not set
bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits
bus: ti-sysc: Support 16-bit writes too
bus: ti-sysc: Add support for missing clockdomain handling
ARM: dts: dra71x: Disable usb4_tm target module
ARM: dts: dra71x: Disable rtc target module
ARM: dts: dra76x: Disable usb4_tm target module
ARM: dts: dra76x: Disable rtc target module
ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
bus: ti-sysc: Handle devices with no control registers
ARM: dts: Configure osc clock for d_can on am335x
Signed-off-by: Olof Johansson <olof@lixom.net>
for 5.3, please pull the following:
- Markus provides a set of updates to the DPFE driver to support a new
revision of the API to the firmware (version 3) and provides minor fixes
about how the MR4-8 words are read for LPDDR4 devices
- Florian removes a print of a virtual address in brcmstb_gisb.c
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl0AZj0ACgkQh9CWnEQH
BwQHpQ//ZeW9+W6GHfY1bBhBQSuCH8V0oPv3Js73yESOBSwTvn59Io6A3XS9XCuU
I/j/rYI6hMiWpIpudPf92fOxI1+IgqIF6JE93MHQRgAdGHuHBxOfDA4cdGXcnUfw
Qk+j33mwf9toX+rK3dlfTuNny6ic0cpAV4OPMhB37jgf+LtiY++JhFEkrYJzpdpk
aTvar62yZr8hzTLIp69aKkf9pGy7h9DXBdHaU6iGNB7/HXeadN/qW4/cDXSQXcKi
pNIwByABXh8ZOJVfRCK4nq+dYZSdEkiLRXRz/SH/czwQFAsqkH3FYmWiLRQxfFny
XehOSjn5YJWX6mE6VzgqwtmDIdkqlmZS0Nu+E6zeWwDb28s8aHxESktps4aJcd18
jz3nl66n07SrkhRJGHd3TRvOiYJUr7TfcdqSxdm69e2uoy1zESpdoyA/5U691js0
gSRpsJb9nfGK3OlGjLcKyHkIhq6oiTbGZOp9hWNz8P/76wqak50DiS8CQx+HEqLb
kanZvv+vf+bvDEHLkUXVRGhH4vuK7cXkkm0MjovdYqXDiM7hK1otv3UbD8rN6Gzv
qF0AH2vH7fbi0w7Q+Bb0nGnct1qMhcUWUavNdjbWNgQe4fOXvm1uH/VujLSjaJ8Q
1HxB86RMnc1RnvpnFPk9gxIJj5cTrSx9n83SIGvz2F4EFYeK1zM=
=Gw/Z
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 5.3, please pull the following:
- Markus provides a set of updates to the DPFE driver to support a new
revision of the API to the firmware (version 3) and provides minor fixes
about how the MR4-8 words are read for LPDDR4 devices
- Florian removes a print of a virtual address in brcmstb_gisb.c
* tag 'arm-soc/for-5.3/drivers' of https://github.com/Broadcom/stblinux:
memory: brcmstb: dpfe: introduce DPFE API v3
memory: brcmstb: dpfe: prepare for API-dependent sysfs attributes
memory: brcmstb: dpfe: prepare support for multiple API versions
memory: brcmstb: dpfe: wait for DCPU to be ready
memory: brcmstb: dpfe: report firmware loading error
memory: brcmstb: dpfe: remove unused code and fix formatting
bus: brcmstb_gisb: Remove print of base address
memory: brcmstb: dpfe: use byte 3 of registers MR4-MR8
memory: brcmstb: dpfe: optimize generic_show()
memory: brcmstb: dpfe: use msleep() over udelay()
Signed-off-by: Olof Johansson <olof@lixom.net>
DPAA2 Console driver
- Add driver to export two char devices to dump logs for MC and
AIOP
DPAA2 DPIO driver
- Add support for memory backed QBMan portals
- Increase the timeout period to prevent false error
- Add APIs to retrieve QBMan portal probing status
DPAA Qman driver
- Only make liodn fixup on powerpc SoCs with PAMU iommu
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEhb3UXAyxp6UQ0v6khtxQDvusFVQFAlzjAJMACgkQhtxQDvus
FVQzBg/+Jmi8XNWxxIT+2MOKnEKZMiWwo9X+g4e3ZpwtoLujb9PaIAu3bY9Svhpj
w2v6xUE8fNH1rlRcRQLLxW+v7ziruCx4iM2D6BKw1xgf8eu0ob4R1b+0bTgfSa9S
xmHrNwgaTers7dB57ehYOq6PlExz0/wjU5hkPjhWMUkvA6RNAxDiZbexF0q21CYE
T3dNA2v6sBuWqbtl6dzx+N884P7gLTuHMDJfcdFPTu+4I5YGJBnG6ZoM6YSLP5Pf
i/sh57E7T3Zo4T0ysDDIndf1IssTOmmSxy+eTV1oCWBBSdD3m/zzb8Qw5ohMyGOI
AMhrkMYOGKpwShCbtzKvfz4DYQhTj9YjTqO+G+EMuVEiPIvN+jkevsdub4+0q7BL
q3Lo1T36JQ4RriI6m/csZIWju1LRNW0TQw8vLOAoOaLCOWEpNgGPxYFmqFiDqoNN
8PKC3BkH9BRJo8s9phMqWiqFb7RYegiGUsCrfIDU4x2uyyWAW2uAYQxFOfW+Mc+h
7/IonbApaS7uspn+CZFGp4TtXcbakbNoWgETf+b7zKJGrDqgWi2ErLHWxt1J3n54
waJnGlMlrafGdXqBVZNvuAvqmHD0BNzkck4c3ht+z4M96fw0K38EgWVgKfayElaK
EiX/55HmejQ6aoqNvrv7NZrg/2o5Vcly7C9RtPj3aHMbIdyiQ7k=
=C+f6
-----END PGP SIGNATURE-----
Merge tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers
NXP/FSL SoC driver updates for v5.3
DPAA2 Console driver
- Add driver to export two char devices to dump logs for MC and
AIOP
DPAA2 DPIO driver
- Add support for memory backed QBMan portals
- Increase the timeout period to prevent false error
- Add APIs to retrieve QBMan portal probing status
DPAA Qman driver
- Only make liodn fixup on powerpc SoCs with PAMU iommu
* tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
soc: fsl: qbman_portals: add APIs to retrieve the probing status
soc: fsl: qman: fixup liodns only on ppc targets
soc: fsl: dpio: Add support for memory backed QBMan portals
bus: mc-bus: Add support for mapping shareable portals
soc: fsl: dpio: Increase timeout for QBMan Management Commands
soc: fsl: add DPAA2 console support
Documentation: DT: Add entry for DPAA2 console
soc: fsl: guts: Add definition for LX2160A
Signed-off-by: Olof Johansson <olof@lixom.net>
This series contains dra7 mmc voltage fixes, and fixes to the recent
changes to probe devices with device tree data insteas of legacy
platform data:
- Two fixes for dra7 mmc that needs 1.8V mode disabled as in case of a
reset, the bootrom will try to access the mmc card at 3.3V potentially
damaging the card
- Two regression fixes for am335x d_can. We must allow devices with no
control registers for ti-sysc interconnect target module driver for
at least d_can, and we remove the incorrect control registers for
d_can. And we must configure the osc clock for d_can as otherwise
register access may fail depending on the bootloader version
- Four regression fixes for dra7 variant dts files to tag rtc and usb4
as disabled for dra71x and dra76x. These SoC variants do not have
these devices, and got accidentally enabled when the L4 interconnect
got defined in the dra7-l4.dtsi for the dra7 SoC family
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlzuLFwRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXM39Q/8CNz88ctxQupl8zqzAEq3Tr78Z9XdIlmR
BEk3buRQmUZKd+v1M7k1aP97MFDaBjLM4qIEZRoT7WYuWSD04J6EzjCKOQrAMDMh
cauv7X5ysNvyQNGUlEXxNIdFy5fB+jqfAqZ/R6dpiRAMXd7OtFMnBkyQR27WXyYM
2hIVpGwGZJDatTyqdZo2/QW4vEktD/4kzs+iaojMDmePjsIw+engwa+/D0TrnXfk
dhW5Ay+irME2+gepBeFOXVBRZNiXgl7Y7fgynMpgbYMxwfsbJiYUh2UF/myP7mMt
bnyIwhRUr2jg4W5+PpCzt1KXh4jirdcREBW5SLWQNcmZ2WA1KklgKSUXcwgUPbAP
hdgxyMRKFJFGrpCH3U6U9UBXOprO9Niumw8zEna/fQoY5XfN4GrnbZomqdyTon+6
GzMivM1NnmMIUHd0EWrzxe2pbVLk2vNRH1x/dCvQ38HcnXaTH4gGWqbHZRxkUH7S
ZkswHZQS32lOI7zK9EMlwfM5fa2QragnkH3e99CNH4ztr9cBs/p5ge2/ZRz0DOru
vTEd1j69EMlvHyDjPtD3h+P4534hlEcclvHDrqINKQgWwn59zFy8LGgLL6YAT+n/
cT1VJkWKCN2IPM0VXrFSmWIyQmplgevA1tF1/XdaYSs5NdNJOYXxTQsmludgq1il
pQ1EK2psBPU=
=Ajjk
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omap variants for dra7 mmc voltage and boot issues
This series contains dra7 mmc voltage fixes, and fixes to the recent
changes to probe devices with device tree data insteas of legacy
platform data:
- Two fixes for dra7 mmc that needs 1.8V mode disabled as in case of a
reset, the bootrom will try to access the mmc card at 3.3V potentially
damaging the card
- Two regression fixes for am335x d_can. We must allow devices with no
control registers for ti-sysc interconnect target module driver for
at least d_can, and we remove the incorrect control registers for
d_can. And we must configure the osc clock for d_can as otherwise
register access may fail depending on the bootloader version
- Four regression fixes for dra7 variant dts files to tag rtc and usb4
as disabled for dra71x and dra76x. These SoC variants do not have
these devices, and got accidentally enabled when the L4 interconnect
got defined in the dra7-l4.dtsi for the dra7 SoC family
* tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra71x: Disable usb4_tm target module
ARM: dts: dra71x: Disable rtc target module
ARM: dts: dra76x: Disable usb4_tm target module
ARM: dts: dra76x: Disable rtc target module
ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
bus: ti-sysc: Handle devices with no control registers
ARM: dts: Configure osc clock for d_can on am335x
Signed-off-by: Olof Johansson <olof@lixom.net>
Some older interconnect target modules need module internal clock
toggling quirks to reset properly. We've been doing this in the
platform code earlier, but need to be able to it directly in the
ti-sysc driver when we no longer rely on on the platform code.
Let's add reset handling for 1-wire, i2c and watchdog. Later on
we can add more modules like msdi and dss as they get tested.
For dra7 pcie, we should be able to just use the rstctrl reset
driver when available.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation this program is
distributed in the hope that it will be useful but without any
warranty without even the implied warranty of merchantability or
fitness for a particular purpose see the gnu general public license
for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 655 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070034.575739538@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 3 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [kishon] [vijay] [abraham]
[i] [kishon]@[ti] [com] this program is distributed in the hope that
it will be useful but without any warranty without even the implied
warranty of merchantability or fitness for a particular purpose see
the gnu general public license for more details
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [graeme] [gregory]
[gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
[kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
[hk] [hemahk]@[ti] [com] this program is distributed in the hope
that it will be useful but without any warranty without even the
implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 1105 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Based on 1 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details you
should have received a copy of the gnu general public license along
with this program if not write to the free software foundation inc
59 temple place suite 330 boston ma 02111 1307 usa
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-or-later
has been chosen to replace the boilerplate/reference in 1334 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Looks like we currently only detect UART on omap36xx, let's also
add support for omap34xx. And let's also fix the SWSUP mode, it should
be SWSUP_SIDLE for omap3, not SWSUP_SIDLE_ACT like for omap4 and later.
Note that we are still booting omap3 for most part without ti-sysc,
so no need to treat this change as a fix.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to deassert rstctrl resets before enabling clocks to avoid clock
"failed to enable" errors. For asserting rstctrl reset, the clocks need
to be enabled.
As the reset controller status is not available for arrays, let's use
devm_reset_control_get_optional() so we can get the status after reset.
Note that depends on a proper PRM rstctrl driver, so far I've only
tested this with earlier reset-simple patches.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We must not assert reset for modules with no child device drivers
until in runtime_suspend. Otherwise register access will fail without
legacy mode helping us.
Let's add a flag for disable_on_idle and move the reset driver
handling to runtime suspend and resume. We can then also use the
disable_on_idle flag to reconfigure sysconfig register for PM
modes requesting it.
Let's also make the other flags use bitfield while at it instead of
bool.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some modules have ENAWAKEUP bit that we need to configure when not
relying on platform data callbacks.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some modules have idlemodes wired, but not completely functional. We have
quirks for SWSUP_SIDLE and SWSUP_SIDLE_ACT to manage interconnect target
modules without hardware support, but we've been only using them so far
in legacy mode. Let's add support for SWSUP quirks in non-legacy mode too.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For interconnect target modules with autoidle bit wired, we need to manage
it for enable and disable.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to specify QUIRK_LEGACY_IDLE for device drivers that still have
pm_runtime_irq_safe() set like 8250.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We've had minimal OCP softreset support in ti-sysc interconnect target
module driver only used for MCAN driver so far. But it turns out that
MCAN has the sysstatus register resetdone bit inverted compared to most
other modules.
Let's make OCP softreset work for other typical cases with reset status
in sysstatus or sysconfig register so we can use the new functions for
sysc_enable_module() and sysc_disable_module() without "ti,hwmods"
property in the following patches.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to also support 16-bit writes for i2c in addition to the reads
when we start configuring the sysconfig register for reset and idle modes.
Note that only i2c revision register has LO and HI registers, so let's
add a check also for 16-bit register read. This change is currently cosmetic
and does not affect anything until we enable the module specific quirk
handling for i2c reset and enable later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to let ti-sysc driver manage clockdomain autoidle for the
duration of of reset, enable and idle. And we need to do it before we
enable the clock and after we disable it. Currently we are still
relying on platform callbacks indirectly managing clockdomain autoidle.
But I noticed that for device tree only probed drivers it now happens
only after we enabling the clocks and before we disable the clocks,
while it should be the other way around. So far I have not noticed
any issues with this though.
Let's add new ti_sysc_clkdm_deny_idle() and ti_sysc_clkdm_allow_idle()
functions for ti-sysc driver to use to manage clockdomains directly via
platform data callbacks. Note that we can implement the clockdomain
functions in pdata-quirks.c as for probing devices without "ti,hwmods"
custom property we don't need to use the other platform data callbacks.
Let's do this in one patch as there's is still an unlikely chance we
may need to apply this as a fix for v5.2 for dropping legacy platform
data for some devices. We also do have the option of adding back the
platform data if needed in case of trouble.
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Starting with v5 of NXP QBMan devices the hardware supports using
regular cacheable/shareable memory as the backing store for the
portals.
This patch adds support for the new portal mode by switching to
use the DPRC get object region v2 command which returns both
a base address and offset for the portal memory. The new portal
region is identified as shareable through the addition of a new
flag.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Since commit ad67b74d24 ("printk: hash addresses printed with %p")
pointers are being hashed when printed. Displaying the virtual memory at
bootup time is not helpful, especially given we use a dev_info() which
already displays the platform device's address.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
Among the larger pieces:
- Power management improvements for TI am335x and am437x (RTC suspend/wake)
- Misc new additions for Amlogic (socinfo updates)
- ZynqMP FPGA manager
- Nvidia improvements for reset/powergate handling
- PMIC wrapper for Mediatek MT8516
- Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlzc+9QPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3o3sQAIJ2SZnITy/ycvkbhKe+V/806P+aoqMpbZDw
7ldBQFoIMQqVIoeSSeml+9B86ZGyK4CGTgnvsfAI/Zt2fZSHczjqLP5InbEnvB5M
4naf0nSjSlkb5F4p24wXQ7WTI8IO45SwqG4hCi/WW6MakxN21cwdMWHBn+TRZWQu
+AlJdwyDFJoMRXcq8xvLHOBNVAqD3LyvlECbLKqn3+UPwwYw0Ti1dsLwaMLOYDbc
o/1dC2O8111kg2DgO0OM4Tl7jdbpmGA5MeixbVnmu3t4b2s26trG33eXqK2yWqaV
XigD85R74GAq/wmgnzjdiNaIgZjlPPitVYaTE4L6Od39zMgXemnsqMlh/byPeO2y
JvRRLEIciNay9q9uq+8H2zRWwa2wLqAewjssTTMM0RJNQWUtonVCkD8DAx4GLDof
6Ej42XGbtxnqpf0g854mBJ4zaPfZLN4xK//1Llx9HkM8mhLZLJ7BQvgvW1JzniSa
XKnmjqK7SySiJ4bbjn+aFk5EkX7Oh5aXno18tVNKXdxc8nWoEw4PHMUmCCHOFPye
/1oxc95Ux8P/lV+B0ZjiI0yTAX/IpDkEszAYmgdy6pWh1hXnYUr/Rpm7cGUG8kzk
SbtyB8JOI/DFQ7QMDfPp6e6bcB8zTbUuF9H2MXwPN5TqGzP/mya88DC5Iv1jY4jc
0oWv/uhj
=YSfu
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:
Among the larger pieces:
- Power management improvements for TI am335x and am437x (RTC
suspend/wake)
- Misc new additions for Amlogic (socinfo updates)
- ZynqMP FPGA manager
- Nvidia improvements for reset/powergate handling
- PMIC wrapper for Mediatek MT8516
- Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
soc: aspeed: fix Kconfig
soc: add aspeed folder and misc drivers
spi: zynqmp: Fix build break
soc: imx: Add generic i.MX8 SoC driver
MAINTAINERS: Update email for Qualcomm SoC maintainer
memory: tegra: Fix a typos for "fdcdwr2" mc client
Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
memory: tegra: Replace readl-writel with mc_readl-mc_writel
memory: tegra: Fix integer overflow on tick value calculation
memory: tegra: Fix missed registers values latching
ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30
optee: allow to work without static shared memory
soc/tegra: pmc: Move powergate initialisation to probe
soc/tegra: pmc: Remove reset sysfs entries on error
soc/tegra: pmc: Fix reset sources and levels
soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
fpga manager: Adding FPGA Manager support for Xilinx zynqmp
dt-bindings: fpga: Add bindings for ZynqMP fpga driver
firmware: xilinx: Add fpga API's
...
Some interconnect target modules have no module control registers at
all, such as d_can on am335x and am437x.
The d_can register offset at 0 is CTL register with 0x401 as the default
value. I guess I mistook the 0x401 value for a revision register as the
value happens to look similar to what the revision registers typically
have for other modules.
To handle modules with no control registers, we need to improve the
ti-sysc driver a bit to bail out with errors on no control registers,
and then we can remove the bogus revision registers for d_can.
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For non legacy cases, add generic sysc_enable_module()
and sysc_disable_module() functions.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In preparation of dropping interconnect target module platform data in
favor of devicetree based data, we must pass swsup idle quirks to the
platform data functions.
For now, let's only tag the UART modules with the SWSUP_SIDLE_ACT quirk.
The other modules will get tagged with swsup quirks as we drop the
platform data and test the changes.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We cannot access mcpdm registers at all unless there is an optional pdmclk
configured. As this is currently only needed for mcpdm, let's check for
mcpdm in sysc_get_clocks(). If it turns out to be needed for other modules
too, we can add more flags to the quirks table for this.
Signed-off-by: Tony Lindgren <tony@atomide.com>
At least mcpdm needs an optional external clock enabled to function and
this clock typically comes from the PMIC. We can detect mcpdm based on
the interconnect target module address and set a quirk flag early.
To do this, let's initialize the clocks a bit later and add a new
function for sysc_init_early_quirks(). Note that we cannot yet enable
the early quirks for mcpdm until the optional external clocks are
handled in the in the following patch.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can do the rsstctrl a bit later, but need to deassert rstctrl reset
before the clocks are enabled if asserted. Let's only init restctrl
in sysc_init_resets() and do the reset later on just before we enable
the device clocks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We are currently not managing interconnect target module clocks in the
for legacy platform data based case. This causes a problem for using the
platform data based functions when dropping the platform data for the
interconnect target module configuration.
To avoid a situation where we need to populate the main and optional
clocks also for the platform data based functions, let's just manage the
clocks directly in ti-sysc driver. This means that until the interconnect
target module confugration platform data is dropped our use count for
clk_enable() will be 2 instead of 1.
Signed-off-by: Tony Lindgren <tony@atomide.com>
The platform data based init functions typically reset the interconnect
target module configure the registers. As we may need the interconnect
target module specific quirks configured based on the revision register,
we want to move the platform data based init to happen later.
Let's allocate mdata as needed so it's available for sysc_legacy_init()
that we call with module clocks enabled from sysc_init_module().
Signed-off-by: Tony Lindgren <tony@atomide.com>
The first thing we want to do is just read the module revision register to
be able to configure the module specific quirks and configure the module
registers.
As the interconnect target module may not yet be properly configured and
may need a reset first, we don't want to use pm_runtime_get() at this
point.
To read the revision register, let's just enable the all the clocks for
the interconnect target module during init even if the optional clocks
are not needed. That way we can read the revision register to configure
the quirks needed for PM runtime.
Signed-off-by: Tony Lindgren <tony@atomide.com>
At least McPDM module depends on an external optional clock to be
usable. To make handling of the McPDM clock easier in the following
patches, let's add separate functions for handling the main clocks
and the optional clocks.
Let's also add error handling to shut down already enabled clocks
while at it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We have ti,no-idle in use in addition to ti,no-idle-on-init but we're
missing handling for it in the ti-sysc interconnect target module driver.
Let's also group the idle defines together and update the binding
documentation for it.
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If we return early before ddata->clocks have been allocated we will get a
NULL pointer dereference in sysc_unprepare(). Let's fix this by returning
early when no clocks are allocated.
Fixes: 0eecc636e5 ("bus: ti-sysc: Add minimal TI sysc interconnect target driver")
Signed-off-by: Tony Lindgren <tony@atomide.com>
pm_runtime_force_suspend() and pm_runtime_force_resume() are used as system
sleep noirq suspend and resume callbacks. If the driver is active till late
suspend, where runtime PM cannot run, force suspend is essential for the
device. This makes sure that the device is put into low power state during
system wide PM transitions to sleep states.
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
aconnect bus driver is using pm_clk_*() interface for managing clocks.
With this, clocks seem to be always ON. This happens on Tegra devices
which use BPMP co-processor to manage clock resources, where clocks
are enabled during prepare phase. This is necessary because calls to
BPMP are always blocking. When pm_clk_*() interface is used on such
Tegra devices, clock prepare count is not balanced till driver remove()
gets executed and hence clocks are seen ON always. Thus this patch
replaces pm_clk_*() with devm_clk_*() framework.
Suggested-by: Mohan Kumar D <mkumard@nvidia.com>
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP,
NVIDIA, Amlogic and Qualcomm.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJcfpKpAAoJEGCrR//JCVInMpYQANwKKWOTm5NHqtf7/ZKBzx6/
Yk7Jj8QLGKrHScnuBZSBvTwv5Cc5O5Ye+tAuGVArOoD2ktXlLZmHZ/ZPFAudT3di
aFYbA44RNhv+O/xOmToDCCjSHm176hwUY0Cs5bFnfx6TcMsdOYIQIG+XQKx/a9zg
3ZBEv7wZqcBArLc0X2Z2/uiVrEIh3wWwXytvw+8TG8ifUfpbDxRUxDlj1JRDpjMu
yX4q8JDhdQvi2FTXbXcEHTdQ6RT11svPM/YxQDxfULRK9aNKf4GZJ4QlwZy+SO7N
cEFxDd4ML/iJ1LjalvtXGkR0xrw9/gOlO3vbB9Uw3EngBDUSQfHmqJet10a14l8q
KcToe3teIB+Z1R+plrt+h5UDJTbVibgZXhU6wIdkDgtF6oTyg1moIbTqNKHgcA3b
HLJv4gFejeluQzJ/3dZHBnkvJo1XFAvGFmFXle0bmJRFtDx73CKnf6MA9N82l2/x
nTn4LTxXIJVKWTWAs1qkrFyIx1gOrpGhiHPQ2JiOPMZLstz3Sr6tiJuWOr+1Ex4/
UlZsD/CrRb+SbPBonpkD+bvzSR+j0M72A7hGmfZcDzainciWgunyXglUlzO/MT24
C6p4R9MZ2Fffoe8pESppabRNUItp8gNsNGI7CY1IK8pgpxLrujw8OnqykpV0VETo
As+6dZrHfPNSuI7udJi5
=+DOl
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"As usual, the drivers/tee and drivers/reset subsystems get merged
here, with the expected set of smaller updates and some new hardware
support. The tee subsystem now supports device drivers to be attached
to a tee, the first example here is a random number driver with its
implementation in the secure world.
Three new power domain drivers get added for specific chip families:
- Broadcom BCM283x chips (used in Raspberry Pi)
- Qualcomm Snapdragon phone chips
- Xilinx ZynqMP FPGA SoCs
One new driver is added to talk to the BPMP firmware on NVIDIA
Tegra210
Existing drivers are extended for new SoC variants from NXP, NVIDIA,
Amlogic and Qualcomm"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (113 commits)
tee: optee: update optee_msg.h and optee_smc.h to dual license
tee: add cancellation support to client interface
dpaa2-eth: configure the cache stashing amount on a queue
soc: fsl: dpio: configure cache stashing destination
soc: fsl: dpio: enable frame data cache stashing per software portal
soc: fsl: guts: make fsl_guts_get_svr() static
hwrng: make symbol 'optee_rng_id_table' static
tee: optee: Fix unsigned comparison with less than zero
hwrng: Fix unsigned comparison with less than zero
tee: fix possible error pointer ctx dereferencing
hwrng: optee: Initialize some structs using memset instead of braces
tee: optee: Initialize some structs using memset instead of braces
soc: fsl: dpio: fix memory leak of a struct qbman on error exit path
clk: tegra: dfll: Make symbol 'tegra210_cpu_cvb_tables' static
soc: qcom: llcc-slice: Fix typos
qcom: soc: llcc-slice: Consolidate some code
qcom: soc: llcc-slice: Clear the global drv_data pointer on error
drivers: soc: xilinx: Add ZynqMP power domain driver
firmware: xilinx: Add APIs to control node status/power
dt-bindings: power: Add ZynqMP power domain bindings
...
Pull crypto update from Herbert Xu:
"API:
- Add helper for simple skcipher modes.
- Add helper to register multiple templates.
- Set CRYPTO_TFM_NEED_KEY when setkey fails.
- Require neither or both of export/import in shash.
- AEAD decryption test vectors are now generated from encryption
ones.
- New option CONFIG_CRYPTO_MANAGER_EXTRA_TESTS that includes random
fuzzing.
Algorithms:
- Conversions to skcipher and helper for many templates.
- Add more test vectors for nhpoly1305 and adiantum.
Drivers:
- Add crypto4xx prng support.
- Add xcbc/cmac/ecb support in caam.
- Add AES support for Exynos5433 in s5p.
- Remove sha384/sha512 from artpec7 as hardware cannot do partial
hash"
[ There is a merge of the Freescale SoC tree in order to pull in changes
required by patches to the caam/qi2 driver. ]
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (174 commits)
crypto: s5p - add AES support for Exynos5433
dt-bindings: crypto: document Exynos5433 SlimSSS
crypto: crypto4xx - add missing of_node_put after of_device_is_available
crypto: cavium/zip - fix collision with generic cra_driver_name
crypto: af_alg - use struct_size() in sock_kfree_s()
crypto: caam - remove redundant likely/unlikely annotation
crypto: s5p - update iv after AES-CBC op end
crypto: x86/poly1305 - Clear key material from stack in SSE2 variant
crypto: caam - generate hash keys in-place
crypto: caam - fix DMA mapping xcbc key twice
crypto: caam - fix hash context DMA unmap size
hwrng: bcm2835 - fix probe as platform device
crypto: s5p-sss - Use AES_BLOCK_SIZE define instead of number
crypto: stm32 - drop pointless static qualifier in stm32_hash_remove()
crypto: chelsio - Fixed Traffic Stall
crypto: marvell - Remove set but not used variable 'ivsize'
crypto: ccp - Update driver messages to remove some confusion
crypto: adiantum - add 1536 and 4096-byte test vectors
crypto: nhpoly1305 - add a test vector with len % 16 != 0
crypto: arm/aes-ce - update IV after partial final CTR block
...
- Add compatibility support for different FWs in the hisi LPC bus driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJcXUynAAoJEAvIV27ZiWZcZr0P/37ARz4T4f1SlmWEwegGW6zq
aGCyjzbM7q/zh5HZ/KeQaVvaRVoy21MVcMHD9L4Y2Log0Sd6lgIoHrtfH8VIoDfg
6Lxaua8F4NJd6SkQCN07bLn9NUghVB16UuROM3ks7rEx+8rQ6oy4+JWccyPK/oMT
3Lxj9SGJzfuaqO6NzhobFTE+MZ/J25D8tIjav+S12jUgQV2611L8g6x3JrM8WQPu
Zs6ynch9c8nekR1ntNsTmEGa/ey2QWo32PqU65UVB7Pj2vRBFkTcmSNmDP2VMM5t
A/I+P76P0ifl5VdCWk/o7k30fvp7HYbOLyVwuM/4GF4/h6H10C+cZdTPf3lGNjYS
48hBVWTvuSurPKY0hidvQJkaCfDuHyKhOEBg76bF40GZ+ZfPl5saXVTBfXuF3923
j7rZAPpBrbqL0+tOAbnvYePk603m0AT/lZYRzEQFPH3DOoLHZxjmBZO0KDByRF90
kX5Atr195uQrZn1vVn2UciDjQgAAI02p1tsvXVr322nUbTAGZfzTngqFcV2MuDkD
rI+C/HebLZNinC85qibxzPUqEbEePfkWaWuBl2fz8HsYJ9JOGQeMxP5O0Mrf8Zmv
LBn7MikUh/lSVFpTJyJJU9uj45vfcGExgFbg5kgQY/kICclMY97/4MSb7hp2tKF0
jt6C3n7dXANOvGrKIHQN
=f0/p
-----END PGP SIGNATURE-----
Merge tag 'hisi-drivers-for-5.1' of git://github.com/hisilicon/linux-hisi into arm/drivers
ARM64: hisi: SoC driver updates for 5.1
- Add compatibility support for different FWs in the hisi LPC bus driver
* tag 'hisi-drivers-for-5.1' of git://github.com/hisilicon/linux-hisi:
bus: hisi_lpc: Don't fail probe for unrecognised child devices
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJcYi+0AAoJEFBXWFqHsHzOtdYH/jX/y0r7OvX5GVSrrnW8PlkC
3i2EQ0sGOxWOMqBegZIpFe9W7IddAetMf6praPGz/efHPnoVC4jO8Yqe4TZwQXLB
vOxoN4G7NH9Al9RX11ce96kd/tUgVK/JHuQJ9fu+ogrprLpAS3w1sbIkidOMSF3M
/5VrmFCxUNOPwTHRnyjw8QsyypKnKEBu0jA8sgyUmg99ii6rqQ5OKh1vgKf62J0f
1BbJLalI0CxGcYVQxYBy2ML37+XxCcN9Vl8FxiI4tVRtZox8/YkU9V5vEgVWN2fS
ZWfgT9w7cJxI5x8Em8Cxe4zcyVdbn5w26lXc6WbXazIncm206Ps+DIeHkQI9jPA=
=8C2m
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.1:
- Do not get GPCv2 driver depend on SOC_IMX8MQ since the driver is
going to be used on more SoCs than just i.MX8MQ.
- Add power domain information into SCU bindings document.
- Add support of start/stop a CPU into imx firmware driver.
- Support multiple address ranges per child node for imx-weim bus
driver.
* tag 'imx-drivers-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: Add support to start/stop a CPU
soc: imx: Break dependency on SOC_IMX8MQ for GPCv2
firmware: imx: scu-pd: add fallback compatible string support
dt-bindings: fsl: scu: add imx8qm scu power domain support
dt-bindings: fsl: scu: add fallback compatible string for power domain
bus: imx-weim: guard against timing configuration conflicts
bus: imx-weim: support multiple address ranges per child node
dt-bindings: bus: imx-weim: document multiple address ranges per child node
soc: imx: gpcv2: handle reset clocks
soc: imx: gpcv2: handle additional power-down bits in handshake register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently for ACPI-based FW we fail the probe for an unrecognised child
HID.
However, there is FW in the field with LPC child devices having fake HIDs,
namely "IPI0002", which was an IPMI device invented to support the
initial out-of-tree LPC host driver, different from the final mainline
version.
To provide compatibility support for these dodgy FWs, just discard the
unrecognised HIDs instead of failing the probe altogether.
Tested-by: Zengruan Ye <yezengruan@huawei.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Commit 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc") started producing a warning for pwm-omap-dmtimer:
WARNING: CPU: 0 PID: 77 at drivers/bus/omap_l3_noc.c:147
l3_interrupt_handler+0x2f8/0x388
44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4PER2 (Idle):
Data Access in Supervisor mode during Functional access
...
__pm_runtime_idle
omap_dm_timer_disable
pwm_omap_dmtimer_start
pwm_omap_dmtimer_enable
pwm_apply_state
pwm_vibrator_start
pwm_vibrator_play_work
This is because the timer that pwm-omap-dmtimer is using is now being
probed with ti-sysc interconnect target module instead of omap_device
and the ti-sysc quirk for SYSC_QUIRK_LEGACY_IDLE is not fully
compatible with what omap_device has been doing.
We could fix this by reverting the timer changes and have the timer
probe again with omap_device. Or we could add more quirk handling to
ti-sysc driver. But as these options don't work nicely as longer term
solutions, let's just make timers probe with ti-sysc without any
quirks.
To do this, all we need to do is remove quirks for timers for ti-sysc,
and drop the bogus pm_runtime_irq_safe() flag for timer-ti-dm.
We should not use pm_runtime_irq_safe() anyways for drivers as it will
take a permanent use count on the parent device blocking the parent
devices from idling and has been forcing ti-sysc driver to use a
quirk flag.
Note that we will move the timer data to DEBUG section later on in
clean-up patches.
Fixes: 84badc5ec5 ("ARM: dts: omap4: Move l4 child devices to probe them with ti-sysc")
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Reported-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-By: Andreas Kemnade <andreas@kemnade.info>
Tested-By: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Allocatable devices can be acquired by drivers on the fsl-mc bus using
the fsl_mc_portal_allocate or fsl_mc_object_allocate functions. Add a
device link between the consumer device and the supplier device so that
proper resource management is achieved.
Also, adding a link between these devices ensures that a proper unbind
order is respected (ie before the supplier device is unbound from its
respective driver all consumer devices will be notified and unbound
first).
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
When specifying weim child devices, there is a risk that more than
one timing setting is specified for the same chip select.
The driver cannot support such a configuration.
In case of conflict, this patch will print a warning to the log,
and will ignore the child node in question.
In this example, node acme@1 will be ignored, as it tries to modify
timing settings for CS0:
&weim {
acme@0 {
compatible = "acme,whatever";
reg = <0 0 0x100>;
fsl,weim-cs-timing = <something>;
};
acme@1 {
compatible = "acme,whatnot";
reg = <0 0x500 0x100>;
fsl,weim-cs-timing = <something else>;
};
};
However in this example, the driver will be happy:
&weim {
acme@0 {
compatible = "acme,whatever";
reg = <0 0 0x100>;
fsl,weim-cs-timing = <something>;
};
acme@1 {
compatible = "acme,whatnot";
reg = <0 0x500 0x100>;
fsl,weim-cs-timing = <something>;
};
};
Signed-off-by: Sven Van Asbroeck <TheSven73@googlemail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Ensure that timing values for the child node are applied to
all chip selects in the child's address ranges.
Note that this does not support multiple timing settings per
child; this can be added in the future if required.
Example:
&weim {
acme@0 {
compatible = "acme,whatever";
reg = <0 0 0x100>, <0 0x400000 0x800>,
<1 0x400000 0x800>;
fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
0x00000000 0xa0000240 0x00000000>;
};
};
Signed-off-by: Sven Van Asbroeck <TheSven73@googlemail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64 C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
+ misc cleanups across several platforms
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlwqd4APHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3HXoP/icWJTGrbf9R6T7r0RWB3xeV8ouTPMM8YM5C
6wD4LkkjgZ16Hz/ellJ0Oug77LdnJ/ZI7jH2u0IcKRXr4sL94hEo11jAJLLtCHpt
rGiItMuEDMhNFcAK/yREI6FtRqjNZhsTuR+gkcjzMnGLCaTA1+RwQNdugH0hh0fF
z8C6tjN+fRIeS0wInBzR/402GcgRU0DIJrr0kmklS0u6tc2QW24ffv8ymvMiVO46
l8VemmdxVZsBU2iehraPy6mSXsyTm04dNTuHnrIw3nE3kTJF7jMvpqI/euU1eZl6
6EzrrCym8nC66IlqhHMBB427PK8sRqJTqwqSXO6e90AqiK4H2bMovXKiob/Psq+e
yWqPOrAr8YBLqTgauvCzVm/xneT5rZM4N0BYhOk172Uk52qenNWDnqHj41A4CMSM
/id3L1cHs5nf2qwuMncXvLX+Y2vO2n6cMmF8cDRLu592OBZRcVepUM0xoaSdZScv
LJsP3jH3RRcY3L2rf7bY2Mitp48bDgZMZdw/viSHsFS+SVr225uNFALFDQ9kNEoZ
2d9i9IvC7xOMhdVAX03U7DuRcpKXBPcv+arA57PiVvR4M1HeU7VvD4ayP5loVX2J
GoDIKiPQitAsOKzyPyZ5Jw04lxio3xZbrbmmVzEH8uKWIV5omdiMnSrFsEfduRCT
rU+Mqe2j
=yEX2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Misc driver updates for platforms, many of them power related.
- Rockchip adds power domain support for rk3066 and rk3188
- Amlogic adds a power measurement driver
- Allwinner adds SRAM support for three platforms (F1C100, H5, A64
C1)
- Wakeup and ti-sysc (platform bus) fixes for OMAP/DRA7
- Broadcom fixes suspend/resume with Thumb2 kernels, and improves
stability of a handful of firmware/platform interfaces
- PXA completes their conversion to dmaengine framework
- Renesas does a bunch of PM cleanups across many platforms
- Tegra adds support for suspend/resume on T186/T194, which includes
some driver cleanups and addition of wake events
- Tegra also adds a driver for memory controller (EMC) on Tegra2
- i.MX tweaks power domain bindings, and adds support for i.MX8MQ in
GPC
- Atmel adds identifiers and LPDDR2 support for a new SoC, SAM9X60
and misc cleanups across several platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
ARM: at91: add support in soc driver for new SAM9X60
ARM: at91: add support in soc driver for LPDDR2 SiP
memory: omap-gpmc: Use of_node_name_eq for node name comparisons
bus: ti-sysc: Check for no-reset and no-idle flags at the child level
ARM: OMAP2+: Check also the first dts child for hwmod flags
soc: amlogic: meson-clk-measure: Add missing REGMAP_MMIO dependency
soc: imx: gpc: Increase GPC_CLK_MAX to 7
soc: renesas: rcar-sysc: Fix power domain control after system resume
soc: renesas: rcar-sysc: Merge PM Domain registration and linking
soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers
soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B}
dt-bindings: sram: sunxi: Add compatible for the A64 SRAM C1
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
dt-bindings: sram: Add Allwinner suniv F1C100s
soc: sunxi: sram: Add support for the H5 SoC system control
soc: sunxi: sram: Enable EMAC clock access for H3 variant
soc: imx: gpcv2: add support for i.MX8MQ SoC
soc: imx: gpcv2: move register access table to domain data
soc: imx: gpcv2: prefix i.MX7 specific defines
dmaengine: pxa: make the filter function internal
...
This series of changes improves the TI module flag handling to allow
booting with older dts files until the module flags have been moved
to the interconnect target module level. And there's a of_node_name_eq()
clean-up patch from Rob Herring for the GPMC driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlwRTwcRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPnBBAAqJ4gEf94aqX1xHEK25nP1A26Hu/0lsox
vhF/K4fgyyFjQ3UiXPD5GCMsly/1B4ZHNE2q/wPj2OLf29qYf61yN4rmE5uXLZIq
/nNeqNkl6/bfDwUGk1CEhPpMD107LUWl/smI2R8IgE1c+BFn5jGeHIlhueca6kBo
QeQ+4opEJC/snYaz0eKa4GxLkTiABeV2xifQTKZbwHgBWUTxJHUx/DPZOZa8ClMl
0nZmtKahAn4qpeshnlg6XrTWHIROvk4nGii6vYyRIGsSHopcTTULGNd4uz7fWd2A
zGcNNXC5Bd5CjA3yvTn1HAq9WfUuWka2PORaWJRRGvnDS1nHXgMafAHBqdFN5Rv6
aoHoxldNIO5ROmDxuogdrr7KCu3GCUq2CU+GxgPldnEdrU0vnU4DDfXKzgbFmc+X
zY0u4kRn5bqzXVQU0LcYJFZ0jl/1qHCczuomeMj4+r3MxV0JmL3UuvHUXAiIk/w8
TIusND01up06iNrDvLwMAQd2iECIBTFQoLhPSbVgY87rTRGgDUthJcPacyYOYXi9
z0T4gW2n+L+Tz/RHKNab2VAU12hHRcA37VXHJiYiJjjvdC6GWGYTk2sD8s6q9Ntm
MnN8ioB7OcphOX0TsKi4qnWVXBZ7xSKYKCl9r5RnGQWQcf1BCSBYfw5b/6vrnHxR
W9QpaiYzLBs=
=xcO5
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.21/driver-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Few more omap driver fixes and improvments for v4.21 merge window
This series of changes improves the TI module flag handling to allow
booting with older dts files until the module flags have been moved
to the interconnect target module level. And there's a of_node_name_eq()
clean-up patch from Rob Herring for the GPMC driver.
* tag 'omap-for-v4.21/driver-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
memory: omap-gpmc: Use of_node_name_eq for node name comparisons
bus: ti-sysc: Check for no-reset and no-idle flags at the child level
ARM: OMAP2+: Check also the first dts child for hwmod flags
Signed-off-by: Olof Johansson <olof@lixom.net>
With ti-sysc, we need to now have the device tree properties for
ti,no-reset-on-init and ti,no-idle-on-init at the module level instead
of the child device level.
Let's check for these properties at the child device level to enable
quirks, and warn about moving the properties to the module level.
Otherwise am335x-evm based boards tagging gpio1 with ti,no-reset-on-init
will have their DDR power disabled if wired up in such a tricky way.
Note that this should not be an issue for earlier kernels as we don't
rely on this until the dts files have been updated to probe with ti-sysc
interconnect target driver.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reported-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
for 4.21, please pull the following changes:
- James fixes the firmware interface after a commit changed the use of
VLA and broke large transfers
- Stefan adds a timeout check for Raspberry Pi firmware transactions and
updates a bunch of SoC/firmware files to use SPDX tags
- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
- Yangtao provides a fix for a reference leak due to a call to
of_find_node_by_path()
- Florian fixes the CPU re-entry point out of S3 suspend with kernels
built in Thumb2 mode
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlwC0o4ACgkQh9CWnEQH
BwSYfxAA0AmUWIJ65Tp+UyfmKXI4ufa7Rznf7x3pJs788Fulz1Q/158oifIBHZY9
p6wc9MOFGk0uPc4HN4eVYXuUnQ1liJ6YfWPDj+rBvk9IVOZCKjRSbiELeSjEMeTy
J/nC/N69rIkwkOaTNFne8SNdKba/DMgsYTLz+p0WOyktO50AAcrG4qL1avx/7QnM
TjpUkQ1wKsLJZftJCUSSOcMCnSTuBpcAlRickacuFnoDi+S3QZ1Ub0rtDFP+fjb/
AHfV7jIsVJUuiWcKFrLLWFrR3lGC0Z7AB/w/EE1a8SiDfDC/dgXzZTP6j40aWL4c
aYOQZI4zmrqiajEIjTOk1lV/+yp8CD+qkQ3F5WHAUi/vRTI8UiCYGw6UgsfLyi5s
TE4c35HWgQs4HOmcYuzYV+7TWQ0+cwodGqom0M8As28W+/G0kw7VkmyHJw0F28Bh
2UlOETpUzKv+k+xwa17+FcT897uLGnE97N9g96BoO9EuTramBGTzKShRezC5M9Dj
7/ie8v0IY6UWasSFncT39g8P//oz/Xo5KnlPNUPYBU0Vt9aAQUCJ+O75rgPXWcYn
n1qmauBiCQBv4j8JkHLxpiZEYSSBulE7/DoWt+U7A5OJQmrchi9vW2QSWPWuax3c
1DwOmo5S4M0mPveL+2v28kLfioL4qov1aEYtO/6xshGMzrCm4OQ=
=yGiB
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux into next/drivers
This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes
for 4.21, please pull the following changes:
- James fixes the firmware interface after a commit changed the use of
VLA and broke large transfers
- Stefan adds a timeout check for Raspberry Pi firmware transactions and
updates a bunch of SoC/firmware files to use SPDX tags
- Wolfram switches the GISB bus arbiter to use dev_get_drvdata()
- Yangtao provides a fix for a reference leak due to a call to
of_find_node_by_path()
- Florian fixes the CPU re-entry point out of S3 suspend with kernels
built in Thumb2 mode
* tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux:
soc: bcm: brcmstb: Don't leak device tree node reference
firmware: raspberrypi: Switch to SPDX identifier
firmware: raspberrypi: Fix firmware calls with large buffers
soc: bcm: Switch raspberrypi-power to SPDX identifier
firmware: raspberrypi: Define timeout for transactions
bus: brcmstb_gisb: simplify getting .driver_data
soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL
Signed-off-by: Olof Johansson <olof@lixom.net>
We have OPT_CLKS_NEEDED in legacy platform data, but it's missing
from the ti-sysc driver for device tree based configuration.
In order to pass OPT_CLKS_NEEDED quirk flag we need to update omap4 module
data and add a new compatible for dra7 as the module layout is different
from sysc_regbits_omap4_mcasp.
Fixes: 70a65240ef ("bus: ti-sysc: Add register bits for interconnect
target modules")
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can have holes in clock_roles with interface clock missing for
example. Currently getting an optional clock will fail if there are
only a functional clock and an optional clock.
Fixes: 09dfe58107 ("bus: ti-sysc: Add handling for clkctrl opt clocks")
Signed-off-by: Tony Lindgren <tony@atomide.com>
We should get 'driver_data' from 'struct device' directly. Going via
platform_device is an unneeded step back and forth.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The most noteworthy SoC driver changes this time include:
- The TEE subsystem gains an in-kernel interface to access the TEE
from device drivers.
- The reset controller subsystem gains a driver for the Qualcomm
Snapdragon 845 Power Domain Controller.
- The Xilinx Zynq platform now has a firmware interface for its
platform management unit. This contains a firmware "ioctl" interface
that was a little controversial at first, but the version we merged
solved that by not exposing arbitrary firmware calls to user space.
- The Amlogic Meson platform gains a "canvas" driver that is used
for video processing and shared between different high-level drivers.
The rest is more of the usual, mostly related to SoC specific power
management support and core drivers in drivers/soc:
- Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
features related to power and reset control.
- The Mediatek mt8183 and mt6765 SoC platforms gain support for
their respective power management chips.
- A new driver for NXP i.MX8, which need a firmware interface for
power management.
- The SCPI firmware interface now contains support estimating power
usage of performance states
- The NVIDIA Tegra "pmc" driver gains a few new features, in particular
a pinctrl interface for configuring the pads.
- Lots of small changes for Qualcomm, in particular the "smem"
device driver.
- Some cleanups for the TI OMAP series related to their sysc
controller.
Additional cleanups and bugfixes in SoC specific drivers include the
Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJb1zEhAAoJEGCrR//JCVInnYQP/1pPXWsR/DV4COf4kGJFSAFn
EfHXJM1vKtb7AWl6SClpHFlUMt+fvL+dzDNJ9aeRr2GjcuWfzKDcrBM1ZvM70I31
C1Oc3b6OXEERCozDpRg/Vt8OpIvvWnVpaVffS9E5y6KqF8KZ0UbpWIxUJ87ik44D
UvNXYOU/LUGPxR1UFm5rm2zWF4i+rBvqnpVaXbeOsXsLElzxXVfv2ymhhqIpo2ws
o6e00DSjUImg8hLL4HCGFs2EX1KSD+oFzYaOHIE0/DEaiOnxVOpMSRhX2tZ+tRRb
DekbjL+wz5gOAKJTQfQ2sNNkOuK8WFqmE5G0RJ0iYPXuNsB/17UNb2bhTJeqGdcD
dqCQBLQuDUD2iHJ/d4RK5Kx3a8h2X63n5bdefgF5UX/2RBpXwFk1QtHr8X0DuY8c
o/dPGFNBOn3egzMyXrD5VEtnaTwK1Y6/h09qfuOOF1ZuYDmELKRkWMV9l8dIsvd8
ANjaw5B8MOUAf8DccBmPgUGu0XLCDyuFGqNVd9Kj5u3az+tyggIsgkEjWg1pxTv0
7dDDyv4Ara1V1HVDZ23l3CgmYCZQx2R/vdpX/DjuDPGEHGjZ5s2TW8P6oegdxtIh
LcTonNoTsRYzMrGD/aqhG/8fYsAScXePa3CLKl1Hrl+wFVV0XcaggH23GwD/k+7S
eDBrEzLkOTxM+WXvsvKY
=c/PQ
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"The most noteworthy SoC driver changes this time include:
- The TEE subsystem gains an in-kernel interface to access the TEE
from device drivers.
- The reset controller subsystem gains a driver for the Qualcomm
Snapdragon 845 Power Domain Controller.
- The Xilinx Zynq platform now has a firmware interface for its
platform management unit. This contains a firmware "ioctl"
interface that was a little controversial at first, but the version
we merged solved that by not exposing arbitrary firmware calls to
user space.
- The Amlogic Meson platform gains a "canvas" driver that is used for
video processing and shared between different high-level drivers.
The rest is more of the usual, mostly related to SoC specific power
management support and core drivers in drivers/soc:
- Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
features related to power and reset control.
- The Mediatek mt8183 and mt6765 SoC platforms gain support for their
respective power management chips.
- A new driver for NXP i.MX8, which need a firmware interface for
power management.
- The SCPI firmware interface now contains support estimating power
usage of performance states
- The NVIDIA Tegra "pmc" driver gains a few new features, in
particular a pinctrl interface for configuring the pads.
- Lots of small changes for Qualcomm, in particular the "smem" device
driver.
- Some cleanups for the TI OMAP series related to their sysc
controller.
Additional cleanups and bugfixes in SoC specific drivers include the
Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
firmware: tegra: bpmp: Implement suspend/resume support
drivers: clk: Add ZynqMP clock driver
dt-bindings: clock: Add bindings for ZynqMP clock driver
firmware: xilinx: Add zynqmp IOCTL API for device control
Documentation: xilinx: Add documentation for eemi APIs
MAINTAINERS: imx: include drivers/firmware/imx path
firmware: imx: add misc svc support
firmware: imx: add SCU firmware driver support
reset: Fix potential use-after-free in __of_reset_control_get()
dt-bindings: arm: fsl: add scu binding doc
soc: fsl: qbman: add interrupt coalesce changing APIs
soc: fsl: bman_portals: defer probe after bman's probe
soc: fsl: qbman: Use last response to determine valid bit
soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
soc: fsl: qbman: Check if CPU is offline when initializing portals
reset: qcom: PDC Global (Power Domain Controller) reset controller
dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
reset: Grammar s/more then once/more than once/
bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
...
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
- Work to get rid of direct accesses to struct device_node name and
type pointers in preparation for removing them. New helpers for
parsing DT cpu nodes and conversions to use the helpers. printk
conversions to %pOFn for printing DT node names. Most went thru
subystem trees, so this is the remainder.
- Fixes to DT child node lookups to actually be restricted to child
nodes instead of treewide.
- Refactoring of dtb targets out of arch code. This makes the support
more uniform and enables building all dtbs on c6x, microblaze, and
powerpc.
- Various DT binding updates for Renesas r8a7744 SoC
- Vendor prefixes for Facebook, OLPC
- Restructuring of some ARM binding docs moving some peripheral bindings
out of board/SoC binding files
- New "secure-chosen" binding for secure world settings on ARM
- Dual licensing of 2 DT IRQ binding headers
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAlvTKWYQHHJvYmhAa2Vy
bmVsLm9yZwAKCRD6+121jbxhw8J5EACMAnrTxWQmXfQXOZEVxztcFavH6LP8mh2e
7FZIZ38jzHXXvl81tAg1nBhzFUU/qtvqW8NDCZ9OBxKvp6PFDNhWu241ZodSB1Kw
MZWy2A9QC+qbHYCC+SB5gOT0+Py3v7LNCBa5/TxhbFd35THJM8X0FP7gmcCGX593
9Ml1rqawT4mK5XmCpczT0cXxyC4TgVtpfDWZH2KgJTR/kwXVQlOQOGZ8a1y/wrt7
8TLIe7Qy4SFRzjhwbSta1PUehyYfe4uTSsXIJ84kMvNMxinLXQtvd7t9TfsK8p/R
WjYUneJskVjtxVrMQfdV4MxyFL1YEt2mYcr0PMKIWxMCgGDAZsHPoUZmjyh/PrCI
uiZtEHn3fXpUZAV/xEHHNirJxYyQfHGiksAT+lPrUXYYLCcZ3ZmqiTEYhGoQAfH5
CQPMuxA6yXxp6bov6zJwZSTZtkXciju8aQRhUhlxIfHTqezmGYeql/bnWd+InNuR
upANLZBh6D2jTWzDyobconkCCLlVkSqDoqOx725mMl6hIcdH9d2jVX7hwRf077VI
5i3CyPSJOkSOLSdB8bAPYfBoaDtH2bthxieUrkkSbIjbwHO1H6a2lxPeG/zah0a3
ePMGhi7J84UM4VpJEi000cP+bhPumJtJrG7zxP7ldXdfAF436sQ6KRptlcpLpj5i
IwMhUQNH+g==
=335v
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
"A bit bigger than normal as I've been busy this cycle.
There's a few things with dependencies and a few things subsystem
maintainers didn't pick up, so I'm taking them thru my tree.
The fixes from Johan didn't get into linux-next, but they've been
waiting for some time now and they are what's left of what subsystem
maintainers didn't pick up.
Summary:
- Sync dtc with upstream version v1.4.7-14-gc86da84d30e4
- Work to get rid of direct accesses to struct device_node name and
type pointers in preparation for removing them. New helpers for
parsing DT cpu nodes and conversions to use the helpers. printk
conversions to %pOFn for printing DT node names. Most went thru
subystem trees, so this is the remainder.
- Fixes to DT child node lookups to actually be restricted to child
nodes instead of treewide.
- Refactoring of dtb targets out of arch code. This makes the support
more uniform and enables building all dtbs on c6x, microblaze, and
powerpc.
- Various DT binding updates for Renesas r8a7744 SoC
- Vendor prefixes for Facebook, OLPC
- Restructuring of some ARM binding docs moving some peripheral
bindings out of board/SoC binding files
- New "secure-chosen" binding for secure world settings on ARM
- Dual licensing of 2 DT IRQ binding headers"
* tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits)
ARM: dt: relicense two DT binding IRQ headers
power: supply: twl4030-charger: fix OF sibling-node lookup
NFC: nfcmrvl_uart: fix OF child-node lookup
net: stmmac: dwmac-sun8i: fix OF child-node lookup
net: bcmgenet: fix OF child-node lookup
drm/msm: fix OF child-node lookup
drm/mediatek: fix OF sibling-node lookup
of: Add missing exports of node name compare functions
dt-bindings: Add OLPC vendor prefix
dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus
dt-bindings: thermal: samsung: Add SPDX license identifier
dt-bindings: clock: samsung: Add SPDX license identifiers
dt-bindings: timer: ostm: Add R7S9210 support
dt-bindings: phy: rcar-gen2: Add r8a7744 support
dt-bindings: can: rcar_can: Add r8a7744 support
dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support
dt-bindings: watchdog: renesas-wdt: Document r8a7744 support
dt-bindings: thermal: rcar: Add device tree support for r8a7744
Documentation: dt: Add binding for /secure-chosen/stdout-path
dt-bindings: arm: zte: Move sysctrl bindings to their own doc
...
These updates bring:
- Debugfs support for the Intel VT-d driver. When enabled, it
now also exposes some of its internal data structures to
user-space for debugging purposes.
- ARM-SMMU driver now uses the generic deferred flushing
and fast-path iova allocation code. This is expected to be a
major performance improvement, as this allocation path scales
a lot better.
- Support for r8a7744 in the Renesas iommu driver
- Couple of minor fixes and improvements all over the place
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJb0vixAAoJECvwRC2XARrj0lkQALur432cGae8225gLNG+Ab1B
lDGz/8uJeV4V552r58msq/yFpVascoMYOCgS+5N5J/jn5UiPnWxk//Uz2lvvCsFn
3Z4HswSbmNLSuEHmN3/1CK28An44LjYxtnH/zAEaHRJgWNmC05lO4glPXaSIBwVS
ve6ULymHJittCHFNNAstNBvMYirYV2y+FYxoq6EteTuCruNNXR78KQV7TqPYI+uZ
0DwaXUyxO+HZbVeLpOnj/WHZ6+EUY0cHwHuk8U6ZCHnINZ+k9knt+WUvYu7wPCtj
jGIyJXW5BG0rjJZnVUQs9BFXFSJLV2Ap8M3zKVIyFAUAyStEtGHct0YMRC29GX/J
e45GPbElAZqx1NWRGGTV0xTsH5Gn85S2nP3p7iiPhj5zUhX/6SreZBDQdC+brtsB
8HG85xohsUkVmRq/ez4hu0yqXtB66ppV7TcOjyixybG+ixRPtUwTbiaYUxbvkZTr
hcYUVLGcpJX463VjUKGoRPFL/jZ6BXUWdLVllZPYgDT+IBXtQx1TB20DDtj5V2mR
3m7B0xLQJDWdarhdA9Oj0FQj7ivmwmitcJ9EoNvHSRdEoE1iIy1vHv/7v/GokRVS
J1YT5ZYAsGHBgZIsL7FpVA37i9t3JPVvgakUV/ZfLDyG3v+P0+eS3gNhECYt5luS
D8G7Jy+2vsitO/ZCyu/r
=q1HJ
-----END PGP SIGNATURE-----
Merge tag 'iommu-updates-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel:
- Debugfs support for the Intel VT-d driver.
When enabled, it now also exposes some of its internal data
structures to user-space for debugging purposes.
- ARM-SMMU driver now uses the generic deferred flushing and fast-path
iova allocation code.
This is expected to be a major performance improvement, as this
allocation path scales a lot better.
- Support for r8a7744 in the Renesas iommu driver
- Couple of minor fixes and improvements all over the place
* tag 'iommu-updates-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (39 commits)
iommu/arm-smmu-v3: Remove unnecessary wrapper function
iommu/arm-smmu-v3: Add SPDX header
iommu/amd: Add default branch in amd_iommu_capable()
dt-bindings: iommu: ipmmu-vmsa: Add r8a7744 support
iommu/amd: Move iommu_init_pci() to .init section
iommu/arm-smmu: Support non-strict mode
iommu/io-pgtable-arm-v7s: Add support for non-strict mode
iommu/arm-smmu-v3: Add support for non-strict mode
iommu/io-pgtable-arm: Add support for non-strict mode
iommu: Add "iommu.strict" command line option
iommu/dma: Add support for non-strict mode
iommu/arm-smmu: Ensure that page-table updates are visible before TLBI
iommu/arm-smmu-v3: Implement flush_iotlb_all hook
iommu/arm-smmu-v3: Avoid back-to-back CMD_SYNC operations
iommu/arm-smmu-v3: Fix unexpected CMD_SYNC timeout
iommu/io-pgtable-arm: Fix race handling in split_blk_unmap()
iommu/arm-smmu-v3: Fix a couple of minor comment typos
iommu: Fix a typo
iommu: Remove .domain_{get,set}_windows
iommu: Tidy up window attributes
...
Core changes:
- A patch series from Hans Verkuil to make it possible to
enable/disable IRQs on a GPIO line at runtime and drive GPIO
lines as output without having to put/get them from scratch.
The irqchip callbacks have been improved so that they can
use only the fastpatch callbacks to enable/disable irqs
like any normal irqchip, especially the gpiod_lock_as_irq()
has been improved to be callable in fastpath context.
A bunch of rework had to be done to achieve this but it is
a big win since I never liked to restrict this to slowpath.
The only call requireing slowpath was try_module_get() and
this is kept at the .request_resources() slowpath callback.
In the GPIO CEC driver this is a big win sine a single
line is used for both outgoing and incoming traffic, and
this needs to use IRQs for incoming traffic while actively
driving the line for outgoing traffic.
- Janusz Krzysztofik improved the GPIO array API to pass a
"cookie" (struct gpio_array) and a bitmap for setting or
getting multiple GPIO lines at once. This improvement
orginated in a specific need to speed up an OMAP1 driver and
has led to a much better API and real performance gains
when the state of the array can be used to bypass a lot
of checks and code when we want things to go really fast.
The previous code would minimize the number of calls
down to the driver callbacks assuming the CPU speed was
orders of magnitude faster than the I/O latency, but this
assumption was wrong on several platforms: what we needed
to do was to profile and improve the speed on the hot
path of the array functions and this change is now
completed.
- Clean out the painful and hard to grasp BNF experiments
from the device tree bindings. Future approaches are looking
into using JSON schema for this purpose. (Rob Herring
is floating a patch series.)
New drivers:
- The RCAR driver now supports r8a774a1 (RZ/G2M).
- Synopsys GPIO via CREGs driver.
Major improvements:
- Modernization of the EP93xx driver to use irqdomain and
other contemporary concepts.
- The ingenic driver has been merged into the Ingenic pin
control driver and removed from the GPIO subsystem.
- Debounce support in the ftgpio010 driver.
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJbzdyOAAoJEEEQszewGV1zfYcP/0HBEAOPhHD/i5OQxfKs1msh
mFT/t/IbTmRpCgbEv4CDx4Kc/InE0sUnQr1TL/1WvU6uObM6Ncxq5Z90MvyrgzYu
BqQHq2k2tORvkVSNRxcfD/BAAoo1EerXts1kDhutvdKfepfS6DxpENwzvsFgkVlq
2jj1cdZztjv8A+9cspHDpQP+jDvl1VSc10nR5fRu1TttSpUwzRJaB30NBNXJmMJc
5KUr67lEbsQRPsBvFErU11bydPqhfT+pXmODcfIwS0EtATQ8WC5mkSb/Ooei0fvT
oZ7uR3Os8tMf7isOKssEyFabKwhnfOEt6TBt9em0TfUtInOo0Dc7r8TfBcn57fyZ
xg2R9DQEVRfac8bjhF/BI5KHuN9IMGDDvj6XApumQVliZbISRjMnh3jte6RpcV0A
Ejqz8FeDY13qvEdOnW1EPpwmXdDVWiEAq0ebGLStKNls+/4gB2HmyxGUOzJf+og5
hujsxcJzGQqjCe0moeY/1d7vsy0ZjbHoS+p5fy79U212y2O7onEzFU92AX89bxKC
rx2eCNmiZxCUy1nqu8edO62VnH6QdnqG3o+a4DJfCSHPvFM/E/NX9zHemZubQQ4I
rYXNy4bL4tEG9cqWMfBxWrpiDZw7H6l8kXwdZG8IMyRU9BcKu96amgZ+jBXwzoaB
JZelAAUWB9APghJYFr7o
=YosT
-----END PGP SIGNATURE-----
Merge tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for the v4.20 series:
Core changes:
- A patch series from Hans Verkuil to make it possible to
enable/disable IRQs on a GPIO line at runtime and drive GPIO lines
as output without having to put/get them from scratch.
The irqchip callbacks have been improved so that they can use only
the fastpatch callbacks to enable/disable irqs like any normal
irqchip, especially the gpiod_lock_as_irq() has been improved to be
callable in fastpath context.
A bunch of rework had to be done to achieve this but it is a big
win since I never liked to restrict this to slowpath. The only call
requireing slowpath was try_module_get() and this is kept at the
.request_resources() slowpath callback. In the GPIO CEC driver this
is a big win sine a single line is used for both outgoing and
incoming traffic, and this needs to use IRQs for incoming traffic
while actively driving the line for outgoing traffic.
- Janusz Krzysztofik improved the GPIO array API to pass a "cookie"
(struct gpio_array) and a bitmap for setting or getting multiple
GPIO lines at once.
This improvement orginated in a specific need to speed up an OMAP1
driver and has led to a much better API and real performance gains
when the state of the array can be used to bypass a lot of checks
and code when we want things to go really fast.
The previous code would minimize the number of calls down to the
driver callbacks assuming the CPU speed was orders of magnitude
faster than the I/O latency, but this assumption was wrong on
several platforms: what we needed to do was to profile and improve
the speed on the hot path of the array functions and this change is
now completed.
- Clean out the painful and hard to grasp BNF experiments from the
device tree bindings. Future approaches are looking into using JSON
schema for this purpose. (Rob Herring is floating a patch series.)
New drivers:
- The RCAR driver now supports r8a774a1 (RZ/G2M).
- Synopsys GPIO via CREGs driver.
Major improvements:
- Modernization of the EP93xx driver to use irqdomain and other
contemporary concepts.
- The ingenic driver has been merged into the Ingenic pin control
driver and removed from the GPIO subsystem.
- Debounce support in the ftgpio010 driver"
* tag 'gpio-v4.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (116 commits)
gpio: Clarify kerneldoc on gpiochip_set_chained_irqchip()
gpio: Remove unused 'irqchip' argument to gpiochip_set_cascaded_irqchip()
gpio: Drop parent irq assignment during cascade setup
mmc: pwrseq_simple: Fix incorrect handling of GPIO bitmap
gpio: fix SNPS_CREG kconfig dependency warning
gpiolib: Initialize gdev field before is used
gpio: fix kernel-doc after devres.c file rename
gpio: fix doc string for devm_gpiochip_add_data() to not talk about irq_chip
gpio: syscon: Fix possible NULL ptr usage
gpiolib: Show correct direction from the beginning
pinctrl: msm: Use init_valid_mask exported function
gpiolib: Add init_valid_mask exported function
GPIO: add single-register GPIO via CREG driver
dt-bindings: Document the Synopsys GPIO via CREG bindings
gpio: mockup: use device properties instead of platform_data
gpio: Slightly more helpful debugfs
gpio: omap: Remove set but not used variable 'dev'
gpio: omap: drop omap_gpio_list
Accept partial 'gpio-line-names' property.
gpio: omap: get rid of the conditional PM runtime calls
...
This series gets rid of the SYSC_QUIRK_RESOURCE_PROVIDER to make device
detection happen mostly only if #define DEBUG is set. Few core devices still
need to be detected to set legacy quirks.
We also add support for booting am335x, am437x and dra7 SoCs with L4 devices
defined in device tree instead of legacy platform data.
And finally we simplify suspend with just SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
and dropping the custom functions that were attempting to work around
issues that really turned out to be child device driver related issues.
Apologies for a late pull request, debugging the suspend issues took a while
and I did not want to send these changes until that got sorted out.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlu1AGARHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXMSuBAAvHJ6gKO2bv8AONDj6r1TBSoSjB7BwunL
lnkDVKAzj/cNtahfqDuNLwFH0ftaQ21sS34qhFvvR3UVPBR+6BDz/NtUByh33ylh
jvm3ZJ6AjscuOr9JH78yWQ08Xpqrbf02G4H3yzvFJMjIS9jA4HpEDDg6WKvGJMe7
aGFOFQP1DGrQbr+i6suCPY8wt2O/KOCV1euedJEql6Rt438d4uCygYxyV0aQJr6J
kjM0T7Im8+3Y5RHkcCGP5sHAKVijBiduhzPgBTWYgpVGXc5Fo0aZMD7MdFwAZNlB
2cwX3cEhpDtbB9lnf7/N9zPrpnUrzreN/b1Xq9Dp8nvWdhudBRQsuuMccMgtU+IR
e6s2EbEXSx/H8aVd2YH0ZJF1hA92AVOoesUHZ7NlmyDW4WkbGijy3YdzSiRfohBD
AJ2INcmgSE0jhKKaB77+oWt5ey3Me+UIkArCKaNT/4BtNzDk6UrwkmLU4nFjjx2g
eSvtih97oSHX59L6kQb0SINHuKRNc5i05bq2lIKt6RDiDxwa5FD2UaqojApTFRL9
KOCfOjRAc+22SY0PP4CUVoEUvD2xibrjKci3Uho5/vgeHTA9tE9c8Gw3OyNXj7Tg
z7JTvwy49gV3qqAU6iEmFB5uvBXyKMe6nB7f2DyJ7IgRYcjwkoy15b5tcRBpT9SM
N2iAVnfn23k=
=f9xh
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.20/ti-sysc-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
TI sysc driver changes for v4.20 merge window
This series gets rid of the SYSC_QUIRK_RESOURCE_PROVIDER to make device
detection happen mostly only if #define DEBUG is set. Few core devices still
need to be detected to set legacy quirks.
We also add support for booting am335x, am437x and dra7 SoCs with L4 devices
defined in device tree instead of legacy platform data.
And finally we simplify suspend with just SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
and dropping the custom functions that were attempting to work around
issues that really turned out to be child device driver related issues.
Apologies for a late pull request, debugging the suspend issues took a while
and I did not want to send these changes until that got sorted out.
* tag 'omap-for-v4.20/ti-sysc-take2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
bus: ti-sysc: Make some warnings debug only
bus: ti-sysc: Detect devices for debug on dra7
bus: ti-sysc: Detect timer and gpio on dra7
bus: ti-sysc: Detect devices on am335x when DEBUG is enabled
bus: ti-sysc: Detect more devices on am473x for debugging
bus: ti-sysc: Update revision masks to support am437x
bus: ti-sysc: Defer suspend as needed
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As Grygorii Strashko pointed out, the runtime PM use count of the
children can be whatever at suspend and we should not use it. So
let's just suspend ti-sysc at noirq level and get rid of some code.
Let's also remove the PM_SLEEP ifdef and use __maybe_unused as the
PM code already deals with the ifdefs.
Suggested-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Checking the child node names is pointless as the DT node name can
never be NULL, so remove it.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
We're currently warning about busy children on suspend in
sysc_child_suspend_noirq() but the legacy code omap_device does
not do that. Let's just make it dev_dbg() instead of dev_warn().
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to detect timer and gpio on dra7 because of the
SYSC_QUIRK_LEGACY_IDLE flag for suspend and resume.
Signed-off-by: Tony Lindgren <tony@atomide.com>
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Signed-off-by: Rob Herring <robh@kernel.org>
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.
Cc: Stuart Yoder <stuyoder@gmail.com>
Cc: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
of_dma_configure() API expects coherent_dma_mask to be correctly
set in the devices. This patch does the needful.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
This patch adds support of dma configuration for devices on fsl-mc
bus using 'dma_configure' callback for busses. Also, directly calling
arch_setup_dma_ops is removed from the fsl-mc bus.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
When debug is enabled, we want to see what devices we're detecting
to make things a bit easier for us. Many of these devices will also
be available on am335x and dra7, and some just need updating the
revision register mask.
Signed-off-by: Tony Lindgren <tony@atomide.com>
We need to detect few new devices to tag for noirq_suspend and
pm_runtime_irq_safe to avoid causing regressions compared to
legacy platform data booting.
Let's update i2c, gpio, uart and wdt revision masks to detect
them on am437x. Note that we can remove the second wdt entry
with the updated mask. Note that we also have some uarts with
a different revision register.
Signed-off-by: Tony Lindgren <tony@atomide.com>
