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Commit Graph

12 Commits

Author SHA1 Message Date
Dave Airlie
8bb652eb38 drm/sti: fix warning in build.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2014-08-05 09:41:42 +10:00
Benjamin Gaignard
9bbf86fe87 drm: sti: Add DRM driver itself
Make the link between all the hardware drivers and DRM/KMS interface.
Create the driver itself and make it register all the sub-components.
Use GEM CMA helpers for buffer allocation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-31 09:39:11 +02:00
Benjamin Gaignard
d219673d84 drm: sti: add Compositor
Compositor control all the input sub-device (VID, GDP)
and the mixer(s).
It is the main entry point for composition.
Layer interface is used to control the abstracted layers.

Add debug in mixer and GDP.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:28:27 +02:00
Benjamin Gaignard
e21e21939c drm: sti: add Mixer
Mixer hardware IP is responsible of mixing the different inputs layers.
Z-order is managed by the mixer.
We could 2 mixers: one for main path and one for auxillary path

Mixers are part of Compositor hardware block

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:26:59 +02:00
Benjamin Gaignard
cfd8d744fe drm: sti: add VID layer
VIDeo plug are one of the compositor input sub-devices.
VID are dedicated to video inputs like YUV plans.

Like GDP, VID are part of Compositor hardware block
and use sti_layer structure to provide an abstraction for
Compositor calls.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:26:51 +02:00
Benjamin Gaignard
ba2d53fb6f drm: sti: add GDP layer
Generic Display Pipeline are one of the compositor input sub-devices.
GDP are dedicated to graphic input like RGB plans.
GDP is part of Compositor hardware block which will be introduce later.

A sti_layer structure is used to abstract GDP calls from Compositor.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:26:47 +02:00
Benjamin Gaignard
cdfbff788e drm: sti: add TVOut driver
TVout hardware block is responsible to dispatch the data flow coming
from compositor block to any of the output (HDMI or Analog TV).
It control when output are start/stop and configure according the
require flow path.

TVout is the parent of HDMI and HDA drivers and bind them at runtime.

Tvout is mapped on drm_encoder structure.
One encoder is created for each of the sub-devices and link to their
connector/bridge

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:26:17 +02:00
Benjamin Gaignard
c86a5f6e1b drm: sti: add HDA driver
Add driver to support analog TV ouput.

HDA driver is mapped on drm_bridge and drm_connector structures.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:25:30 +02:00
Benjamin Gaignard
5402626c83 drm: sti: add HDMI driver
Add driver for HDMI output.
HDMI PHY registers are mixed into HDMI device registers
and their is only one IRQ for all this hardware block.
That is why PHYs aren't using phy framework but only a
thin hdmi_phy_ops structure with start and stop functions.

HDMI driver is mapped on drm_bridge and drm_connector structures.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:24:55 +02:00
Benjamin Gaignard
9ed68fa74e drm: sti: add VTAC drivers
Video Traffic Advance Communication Rx and Tx drivers are designed
for inter-die communication.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 19:23:49 +02:00
Benjamin Gaignard
f2cb314864 drm: sti: add VTG driver
Video Time Generator drivers are used to synchronize the compositor
and tvout hardware IPs by providing line count, sample count,
synchronization signals (HSYNC, VSYNC) and top and bottom fields
indication.
VTG are used by pair for each data path (main or auxiliary)
one for master and one for slave.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 18:20:56 +02:00
Benjamin Gaignard
30ebb9088c drm: sti: add bindings for DRM driver
Add DRM/KMS driver bindings documentation.
Describe the required properties for each of the hardware IPs drivers.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2014-07-30 18:11:53 +02:00