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interconnect: qcom: osm-l3: Add sc8180x support
Add support for the Qualcomm SC8180x platform to the OSM L3 driver. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210725025834.3941777-2-bjorn.andersson@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
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@ -15,6 +15,7 @@
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#include <dt-bindings/interconnect/qcom,osm-l3.h>
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#include "sc7180.h"
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#include "sc8180x.h"
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#include "sdm845.h"
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#include "sm8150.h"
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#include "sm8250.h"
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@ -113,6 +114,22 @@ static const struct qcom_icc_desc sc7180_icc_osm_l3 = {
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.reg_perf_state = OSM_REG_PERF_STATE,
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};
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DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3);
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DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32);
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static const struct qcom_icc_node *sc8180x_osm_l3_nodes[] = {
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[MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3,
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[SLAVE_OSM_L3] = &sc8180x_osm_l3,
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};
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static const struct qcom_icc_desc sc8180x_icc_osm_l3 = {
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.nodes = sc8180x_osm_l3_nodes,
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.num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes),
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.lut_row_size = OSM_LUT_ROW_SIZE,
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.reg_freq_lut = OSM_REG_FREQ_LUT,
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.reg_perf_state = OSM_REG_PERF_STATE,
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};
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DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
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DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
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@ -311,6 +328,7 @@ static const struct of_device_id osm_l3_of_match[] = {
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{ .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
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{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
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{ .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
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{ .compatible = "qcom,sc8180x-osm-l3", .data = &sc8180x_icc_osm_l3 },
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{ .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 },
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{ }
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};
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@ -168,5 +168,7 @@
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#define SC8180X_SLAVE_EBI_CH0_DISPLAY 158
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#define SC8180X_SLAVE_MNOC_SF_MEM_NOC_DISPLAY 159
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#define SC8180X_SLAVE_MNOC_HF_MEM_NOC_DISPLAY 160
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#define SC8180X_MASTER_OSM_L3_APPS 161
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#define SC8180X_SLAVE_OSM_L3 162
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#endif
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