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Blackfin arch: unify cplbinfo files

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Merge MPU and noMPU version of CPLB info code to one common version.

Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Mike Frysinger 2008-11-18 17:48:22 +08:00 committed by Bryan Wu
parent 4db557d4ae
commit ff4c02e4be
6 changed files with 201 additions and 363 deletions
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1
arch/blackfin/kernel/Makefile
View File

@ -16,6 +16,7 @@ else
endif
obj-$(CONFIG_BFIN_GPTIMERS) += gptimers.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_KGDB) += kgdb.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o

3
arch/blackfin/kernel/cplb-mpu/Makefile
View File

@ -3,6 +3,3 @@
#
obj-y := cplbinit.o cacheinit.o cplbmgr.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o

149
arch/blackfin/kernel/cplb-mpu/cplbinfo.c
View File

@ -1,149 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbinfo.c
* Based on:
* Author: Sonic Zhang <sonic.zhang@analog.com>
*
* Created: Jan. 2005
* Description: Display CPLB status
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include <asm/current.h>
#include <asm/system.h>
#include <asm/cplb.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
static char *cplb_print_entry(char *buf, struct cplb_entry *tbl, int switched)
{
int i;
buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n");
for (i = 0; i < MAX_CPLBS; i++) {
unsigned long data = tbl[i].data;
unsigned long addr = tbl[i].addr;
if (!(data & CPLB_VALID))
continue;
buf +=
sprintf(buf,
"%d\t0x%08lx\t%06lx\t%s\t%c\t%c\t%c\t%c\n",
i, addr, data,
page_size_string_table[(data & 0x30000) >> 16],
(data & CPLB_USER_RD) ? 'Y' : 'N',
(data & CPLB_USER_WR) ? 'Y' : 'N',
(data & CPLB_SUPV_WR) ? 'Y' : 'N',
i < switched ? 'N' : 'Y');
}
buf += sprintf(buf, "\n");
return buf;
}
int cplbinfo_proc_output(char *buf, void *data)
{
char *p;
unsigned int cpu = (unsigned int)data;;
p = buf;
p += sprintf(p, "------------- CPLB Information on CPU%u --------------\n\n", cpu);
if (bfin_read_IMEM_CONTROL() & ENICPLB) {
p += sprintf(p, "Instruction CPLB entry:\n");
p = cplb_print_entry(p, icplb_tbl[cpu], first_switched_icplb);
} else
p += sprintf(p, "Instruction CPLB is disabled.\n\n");
if (1 || bfin_read_DMEM_CONTROL() & ENDCPLB) {
p += sprintf(p, "Data CPLB entry:\n");
p = cplb_print_entry(p, dcplb_tbl[cpu], first_switched_dcplb);
} else
p += sprintf(p, "Data CPLB is disabled.\n");
p += sprintf(p, "ICPLB miss: %d\nICPLB supervisor miss: %d\n",
nr_icplb_miss[cpu], nr_icplb_supv_miss[cpu]);
p += sprintf(p, "DCPLB miss: %d\nDCPLB protection fault:%d\n",
nr_dcplb_miss[cpu], nr_dcplb_prot[cpu]);
p += sprintf(p, "CPLB flushes: %d\n",
nr_cplb_flush[cpu]);
return p - buf;
}
static int cplbinfo_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = cplbinfo_proc_output(page, data);
if (len <= off + count)
*eof = 1;
*start = page + off;
len -= off;
if (len > count)
len = count;
if (len < 0)
len = 0;
return len;
}
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *parent, *entry;
unsigned int cpu;
unsigned char str[10];
parent = proc_mkdir("cplbinfo", NULL);
for_each_online_cpu(cpu) {
sprintf(str, "cpu%u", cpu);
entry = create_proc_entry(str, 0, parent);
if (!entry)
return -ENOMEM;
entry->read_proc = cplbinfo_read_proc;
entry->data = (void *)cpu;
}
return 0;
}
static void __exit cplbinfo_exit(void)
{
unsigned int cpu;
unsigned char str[20];
for_each_online_cpu(cpu) {
sprintf(str, "cplbinfo/cpu%u", cpu);
remove_proc_entry(str, NULL);
}
remove_proc_entry("cplbinfo", NULL);
}
module_init(cplbinfo_init);
module_exit(cplbinfo_exit);

3
arch/blackfin/kernel/cplb-nompu/Makefile
View File

@ -3,6 +3,3 @@
#
obj-y := cplbinit.o cacheinit.o cplbhdlr.o cplbmgr.o
obj-$(CONFIG_CPLB_INFO) += cplbinfo.o

208
arch/blackfin/kernel/cplb-nompu/cplbinfo.c
View File

@ -1,208 +0,0 @@
/*
* File: arch/blackfin/mach-common/cplbinfo.c
* Based on:
* Author: Sonic Zhang <sonic.zhang@analog.com>
*
* Created: Jan. 2005
* Description: Display CPLB status
*
* Modified:
* Copyright 2004-2006 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
#define CPLB_I 1
#define CPLB_D 2
#define SYNC_SYS SSYNC()
#define SYNC_CORE CSYNC()
#define CPLB_BIT_PAGESIZE 0x30000
static int page_size_table[4] = {
0x00000400, /* 1K */
0x00001000, /* 4K */
0x00100000, /* 1M */
0x00400000 /* 4M */
};
static char page_size_string_table[][4] = { "1K", "4K", "1M", "4M" };
static int cplb_find_entry(unsigned long *cplb_addr,
unsigned long *cplb_data, unsigned long addr,
unsigned long data)
{
int ii;
for (ii = 0; ii < 16; ii++)
if (addr >= cplb_addr[ii] && addr < cplb_addr[ii] +
page_size_table[(cplb_data[ii] & CPLB_BIT_PAGESIZE) >> 16]
&& (cplb_data[ii] == data))
return ii;
return -1;
}
static char *cplb_print_entry(char *buf, int type, unsigned int cpu)
{
unsigned long *p_addr = dpdt_tables[cpu];
unsigned long *p_data = dpdt_tables[cpu] + 1;
unsigned long *p_icount = dpdt_swapcount_tables[cpu];
unsigned long *p_ocount = dpdt_swapcount_tables[cpu] + 1;
unsigned long *cplb_addr = (unsigned long *)DCPLB_ADDR0;
unsigned long *cplb_data = (unsigned long *)DCPLB_DATA0;
int entry = 0, used_cplb = 0;
if (type == CPLB_I) {
buf += sprintf(buf, "Instruction CPLB entry:\n");
p_addr = ipdt_tables[cpu];
p_data = ipdt_tables[cpu] + 1;
p_icount = ipdt_swapcount_tables[cpu];
p_ocount = ipdt_swapcount_tables[cpu] + 1;
cplb_addr = (unsigned long *)ICPLB_ADDR0;
cplb_data = (unsigned long *)ICPLB_DATA0;
} else
buf += sprintf(buf, "Data CPLB entry:\n");
buf += sprintf(buf, "Address\t\tData\tSize\tValid\tLocked\tSwapin\tiCount\toCount\n");
while (*p_addr != 0xffffffff) {
entry = cplb_find_entry(cplb_addr, cplb_data, *p_addr, *p_data);
if (entry >= 0)
used_cplb |= 1 << entry;
buf +=
sprintf(buf,
"0x%08lx\t0x%05lx\t%s\t%c\t%c\t%2d\t%ld\t%ld\n",
*p_addr, *p_data,
page_size_string_table[(*p_data & 0x30000) >> 16],
(*p_data & CPLB_VALID) ? 'Y' : 'N',
(*p_data & CPLB_LOCK) ? 'Y' : 'N', entry, *p_icount,
*p_ocount);
p_addr += 2;
p_data += 2;
p_icount += 2;
p_ocount += 2;
}
if (used_cplb != 0xffff) {
buf += sprintf(buf, "Unused/mismatched CPLBs:\n");
for (entry = 0; entry < 16; entry++)
if (0 == ((1 << entry) & used_cplb)) {
int flags = cplb_data[entry];
buf +=
sprintf(buf,
"%2d: 0x%08lx\t0x%05x\t%s\t%c\t%c\n",
entry, cplb_addr[entry], flags,
page_size_string_table[(flags &
0x30000) >>
16],
(flags & CPLB_VALID) ? 'Y' : 'N',
(flags & CPLB_LOCK) ? 'Y' : 'N');
}
}
buf += sprintf(buf, "\n");
return buf;
}
static int cplbinfo_proc_output(char *buf, void *data)
{
unsigned int cpu = (unsigned int)data;
char *p;
p = buf;
p += sprintf(p, "------------- CPLB Information on CPU%u--------------\n\n", cpu);
if (bfin_read_IMEM_CONTROL() & ENICPLB)
p = cplb_print_entry(p, CPLB_I, cpu);
else
p += sprintf(p, "Instruction CPLB is disabled.\n\n");
if (bfin_read_DMEM_CONTROL() & ENDCPLB)
p = cplb_print_entry(p, CPLB_D, cpu);
else
p += sprintf(p, "Data CPLB is disabled.\n");
return p - buf;
}
static int cplbinfo_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len;
len = cplbinfo_proc_output(page, data);
if (len <= off + count)
*eof = 1;
*start = page + off;
len -= off;
if (len > count)
len = count;
if (len < 0)
len = 0;
return len;
}
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *parent, *entry;
unsigned int cpu;
unsigned char str[10];
parent = proc_mkdir("cplbinfo", NULL);
for_each_online_cpu(cpu) {
sprintf(str, "cpu%u", cpu);
entry = create_proc_entry(str, 0, parent);
if (!entry)
return -ENOMEM;
entry->read_proc = cplbinfo_read_proc;
entry->data = (void *)cpu;
}
return 0;
}
static void __exit cplbinfo_exit(void)
{
unsigned int cpu;
unsigned char str[20];
for_each_online_cpu(cpu) {
sprintf(str, "cplbinfo/cpu%u", cpu);
remove_proc_entry(str, NULL);
}
remove_proc_entry("cplbinfo", NULL);
}
module_init(cplbinfo_init);
module_exit(cplbinfo_exit);

200
arch/blackfin/kernel/cplbinfo.c Normal file
View File

@ -0,0 +1,200 @@
/*
* arch/blackfin/kernel/cplbinfo.c - display CPLB status
*
* Copyright 2004-2008 Analog Devices Inc.
* Licensed under the GPL-2 or later.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include <asm/cplbinit.h>
#include <asm/blackfin.h>
typedef enum { ICPLB, DCPLB } cplb_type;
static char page_strtbl[][3] = { "1K", "4K", "1M", "4M" };
#define page(flags) (((flags) & 0x30000) >> 16)
#define strpage(flags) page_strtbl[page(flags)]
#ifdef CONFIG_MPU
static char *cplb_print_entry(char *buf, cplb_type type, unsigned int cpu)
{
struct cplb_entry *tbl;
int switched;
int i;
if (type == ICPLB) {
tbl = icplb_tbl[cpu];
switched = first_switched_icplb;
} else {
tbl = dcplb_tbl[cpu];
switched = first_switched_dcplb;
}
buf += sprintf(buf, "Index\tAddress\t\tData\tSize\tU/RD\tU/WR\tS/WR\tSwitch\n");
for (i = 0; i < MAX_CPLBS; ++i) {
unsigned long data = tbl[i].data;
unsigned long addr = tbl[i].addr;
if (!(data & CPLB_VALID))
continue;
buf += sprintf(buf,
"%d\t0x%08lx\t%05lx\t%s\t%c\t%c\t%c\t%c\n",
i, addr, data, strpage(data),
(data & CPLB_USER_RD) ? 'Y' : 'N',
(data & CPLB_USER_WR) ? 'Y' : 'N',
(data & CPLB_SUPV_WR) ? 'Y' : 'N',
i < switched ? 'N' : 'Y');
}
buf += sprintf(buf, "\n");
return buf;
}
#else
static int page_size_table[4] = {
0x00000400, /* 1K */
0x00001000, /* 4K */
0x00100000, /* 1M */
0x00400000 /* 4M */
};
static int cplb_find_entry(unsigned long *cplb_addr,
unsigned long *cplb_data, unsigned long addr,
unsigned long data)
{
int i;
for (i = 0; i < 16; ++i)
if (addr >= cplb_addr[i] &&
addr < cplb_addr[i] + page_size_table[page(cplb_data[i])] &&
cplb_data[i] == data)
return i;
return -1;
}
static char *cplb_print_entry(char *buf, cplb_type type, unsigned int cpu)
{
unsigned long *p_addr, *p_data, *p_icount, *p_ocount;
unsigned long *cplb_addr, *cplb_data;
int entry = 0, used_cplb = 0;
if (type == ICPLB) {
p_addr = ipdt_tables[cpu];
p_data = ipdt_tables[cpu] + 1;
p_icount = ipdt_swapcount_tables[cpu];
p_ocount = ipdt_swapcount_tables[cpu] + 1;
cplb_addr = (unsigned long *)ICPLB_ADDR0;
cplb_data = (unsigned long *)ICPLB_DATA0;
} else {
p_addr = dpdt_tables[cpu];
p_data = dpdt_tables[cpu] + 1;
p_icount = dpdt_swapcount_tables[cpu];
p_ocount = dpdt_swapcount_tables[cpu] + 1;
cplb_addr = (unsigned long *)DCPLB_ADDR0;
cplb_data = (unsigned long *)DCPLB_DATA0;
}
buf += sprintf(buf, "Address\t\tData\tSize\tValid\tLocked\tSwapin\tiCount\toCount\n");
while (*p_addr != 0xffffffff) {
entry = cplb_find_entry(cplb_addr, cplb_data, *p_addr, *p_data);
if (entry >= 0)
used_cplb |= 1 << entry;
buf += sprintf(buf,
"0x%08lx\t0x%05lx\t%s\t%c\t%c\t%2d\t%ld\t%ld\n",
*p_addr, *p_data, strpage(*p_data),
(*p_data & CPLB_VALID) ? 'Y' : 'N',
(*p_data & CPLB_LOCK) ? 'Y' : 'N', entry, *p_icount,
*p_ocount);
p_addr += 2;
p_data += 2;
p_icount += 2;
p_ocount += 2;
}
if (used_cplb != 0xffff) {
buf += sprintf(buf, "Unused/mismatched CPLBs:\n");
for (entry = 0; entry < 16; ++entry)
if (0 == ((1 << entry) & used_cplb)) {
int flags = cplb_data[entry];
buf += sprintf(buf,
"%2d: 0x%08lx\t0x%05x\t%s\t%c\t%c\n",
entry, cplb_addr[entry], flags, strpage(flags),
(flags & CPLB_VALID) ? 'Y' : 'N',
(flags & CPLB_LOCK) ? 'Y' : 'N');
}
}
buf += sprintf(buf, "\n");
return buf;
}
#endif
static int cplbinfo_proc_output(char *buf, void *data)
{
unsigned int cpu = (unsigned int)data;
char *p = buf;
if (bfin_read_IMEM_CONTROL() & ENICPLB) {
p += sprintf(p, "Instruction CPLB entry:\n");
p = cplb_print_entry(p, ICPLB, cpu);
} else
p += sprintf(p, "Instruction CPLB is disabled.\n\n");
if (bfin_read_DMEM_CONTROL() & ENDCPLB) {
p += sprintf(p, "Data CPLB entry:\n");
p = cplb_print_entry(p, DCPLB, cpu);
} else
p += sprintf(p, "Data CPLB is disabled.\n\n");
return p - buf;
}
static int cplbinfo_read_proc(char *page, char **start, off_t off,
int count, int *eof, void *data)
{
int len = cplbinfo_proc_output(page, data);
if (len <= off + count)
*eof = 1;
*start = page + off;
len -= off;
return max(min(len, count), 0);
}
static int __init cplbinfo_init(void)
{
struct proc_dir_entry *parent, *entry;
unsigned int cpu;
unsigned char str[10];
parent = proc_mkdir("cplbinfo", NULL);
if (!parent)
return -ENOMEM;
for_each_online_cpu(cpu) {
sprintf(str, "cpu%u", cpu);
entry = create_proc_entry(str, 0, parent);
if (!entry)
return -ENOMEM;
entry->read_proc = cplbinfo_read_proc;
entry->data = (void *)cpu;
}
return 0;
}
late_initcall(cplbinfo_init);