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intel-gtt: generic (insert|remove)_entries for i915
Beef up the generic version to support dmar. Otherwise like for the i830. v2: Don't try to DMA remap on resume for already remapped pages. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -124,7 +124,6 @@ static struct _intel_private {
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#define IS_PINEVIEW intel_private.driver->is_pineview
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#define IS_IRONLAKE intel_private.driver->is_ironlake
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#if USE_PCI_DMA_API
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static void intel_agp_free_sglist(struct agp_memory *mem)
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{
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struct sg_table st;
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@ -144,6 +143,9 @@ static int intel_agp_map_memory(struct agp_memory *mem)
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struct scatterlist *sg;
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int i;
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if (mem->sg_list)
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return 0; /* already mapped (for e.g. resume */
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DBG("try mapping %lu pages\n", (unsigned long)mem->page_count);
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if (sg_alloc_table(&st, mem->page_count, GFP_KERNEL))
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@ -175,6 +177,7 @@ static void intel_agp_unmap_memory(struct agp_memory *mem)
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intel_agp_free_sglist(mem);
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}
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#if USE_PCI_DMA_API
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static void intel_agp_insert_sg_entries(struct agp_memory *mem,
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off_t pg_start, int mask_type)
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{
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@ -1051,6 +1054,31 @@ static bool i830_check_flags(unsigned int flags)
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return false;
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}
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static void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
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unsigned int sg_len,
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unsigned int pg_start,
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unsigned int flags)
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{
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struct scatterlist *sg;
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unsigned int len, m;
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int i, j;
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j = pg_start;
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/* sg may merge pages, but we have to separate
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* per-page addr for GTT */
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for_each_sg(sg_list, sg, sg_len, i) {
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len = sg_dma_len(sg) >> PAGE_SHIFT;
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for (m = 0; m < len; m++) {
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dma_addr_t addr = sg_dma_address(sg) + (m << PAGE_SHIFT);
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intel_private.driver->write_entry(addr,
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j, flags);
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j++;
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}
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}
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readl(intel_private.gtt+j-1);
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}
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static int intel_fake_agp_insert_entries(struct agp_memory *mem,
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off_t pg_start, int type)
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{
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@ -1082,11 +1110,21 @@ static int intel_fake_agp_insert_entries(struct agp_memory *mem,
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if (!mem->is_flushed)
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global_cache_flush();
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for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
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intel_private.driver->write_entry(page_to_phys(mem->pages[i]),
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j, type);
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if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2) {
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ret = intel_agp_map_memory(mem);
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if (ret != 0)
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return ret;
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intel_gtt_insert_sg_entries(mem->sg_list, mem->num_sg,
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pg_start, type);
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} else {
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for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
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dma_addr_t addr = page_to_phys(mem->pages[i]);
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intel_private.driver->write_entry(addr,
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j, type);
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}
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readl(intel_private.gtt+j-1);
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}
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readl(intel_private.gtt+j-1);
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out:
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ret = 0;
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@ -1109,6 +1147,9 @@ static int intel_fake_agp_remove_entries(struct agp_memory *mem,
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return -EINVAL;
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}
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if (USE_PCI_DMA_API && INTEL_GTT_GEN > 2)
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intel_agp_unmap_memory(mem);
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for (i = pg_start; i < (mem->page_count + pg_start); i++) {
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intel_private.driver->write_entry(intel_private.scratch_page_dma,
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i, 0);
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@ -1469,8 +1510,8 @@ static const struct agp_bridge_driver intel_915_driver = {
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.cache_flush = global_cache_flush,
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.create_gatt_table = intel_fake_agp_create_gatt_table,
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.free_gatt_table = intel_fake_agp_free_gatt_table,
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.insert_memory = intel_i915_insert_entries,
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.remove_memory = intel_i915_remove_entries,
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.insert_memory = intel_fake_agp_insert_entries,
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.remove_memory = intel_fake_agp_remove_entries,
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.alloc_by_type = intel_fake_agp_alloc_by_type,
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.free_by_type = intel_i810_free_by_type,
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.agp_alloc_page = agp_generic_alloc_page,
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@ -1479,10 +1520,6 @@ static const struct agp_bridge_driver intel_915_driver = {
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.agp_destroy_pages = agp_generic_destroy_pages,
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.agp_type_to_mask_type = intel_i830_type_to_mask_type,
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.chipset_flush = intel_i915_chipset_flush,
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#if USE_PCI_DMA_API
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.agp_map_memory = intel_agp_map_memory,
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.agp_unmap_memory = intel_agp_unmap_memory,
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#endif
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};
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static const struct agp_bridge_driver intel_i965_driver = {
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@ -1586,6 +1623,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
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.setup = i9xx_setup,
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/* i945 is the last gpu to need phys mem (for overlay and cursors). */
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.write_entry = i830_write_entry,
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.check_flags = i830_check_flags,
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};
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static const struct intel_gtt_driver g33_gtt_driver = {
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.gen = 3,
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