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thermal/drivers/int340x/processor_thermal: Fix tcc setting
The following fixes are done for tcc sysfs interface:
- TCC is 6 bits only from bit 29-24
- TCC of 0 is valid
- When BIT(31) is set, this register is read only
- Check for invalid tcc value
- Error for negative values
Fixes: fdf4f2fb8e
("drivers: thermal: processor_thermal_device: Export sysfs interface for TCC offset")
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: stable@vger.kernel.org
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20210628215803.75038-1-srinivas.pandruvada@linux.intel.com
This commit is contained in:
parent
ad079d981d
commit
fe6a6de669
@ -78,24 +78,27 @@ static ssize_t tcc_offset_degree_celsius_show(struct device *dev,
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if (err)
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return err;
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val = (val >> 24) & 0xff;
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val = (val >> 24) & 0x3f;
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return sprintf(buf, "%d\n", (int)val);
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}
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static int tcc_offset_update(int tcc)
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static int tcc_offset_update(unsigned int tcc)
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{
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u64 val;
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int err;
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if (!tcc)
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if (tcc > 63)
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return -EINVAL;
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err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
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if (err)
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return err;
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val &= ~GENMASK_ULL(31, 24);
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val |= (tcc & 0xff) << 24;
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if (val & BIT(31))
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return -EPERM;
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val &= ~GENMASK_ULL(29, 24);
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val |= (tcc & 0x3f) << 24;
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err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val);
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if (err)
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@ -104,14 +107,15 @@ static int tcc_offset_update(int tcc)
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return 0;
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}
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static int tcc_offset_save;
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static unsigned int tcc_offset_save;
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static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
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struct device_attribute *attr, const char *buf,
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size_t count)
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{
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unsigned int tcc;
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u64 val;
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int tcc, err;
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int err;
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err = rdmsrl_safe(MSR_PLATFORM_INFO, &val);
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if (err)
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@ -120,7 +124,7 @@ static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
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if (!(val & BIT(30)))
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return -EACCES;
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if (kstrtoint(buf, 0, &tcc))
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if (kstrtouint(buf, 0, &tcc))
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return -EINVAL;
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err = tcc_offset_update(tcc);
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