mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-16 01:04:08 +08:00
tools arch x86: Sync the msr-index.h copy with the kernel sources
To pick up the changes in:
Fixes: 69372cf012
("x86/cpu: Add VM page flush MSR availablility as a CPUID feature")
That cause these changes in tooling:
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > before
$ cp arch/x86/include/asm/msr-index.h tools/arch/x86/include/asm/msr-index.h
$ tools/perf/trace/beauty/tracepoints/x86_msr.sh > after
$ diff -u before after
--- before 2020-12-21 09:09:05.593005003 -0300
+++ after 2020-12-21 09:12:48.436994802 -0300
@@ -21,7 +21,7 @@
[0x0000004f] = "PPIN",
[0x00000060] = "LBR_CORE_TO",
[0x00000079] = "IA32_UCODE_WRITE",
- [0x0000008b] = "IA32_UCODE_REV",
+ [0x0000008b] = "AMD64_PATCH_LEVEL",
[0x0000008C] = "IA32_SGXLEPUBKEYHASH0",
[0x0000008D] = "IA32_SGXLEPUBKEYHASH1",
[0x0000008E] = "IA32_SGXLEPUBKEYHASH2",
@@ -286,6 +286,7 @@
[0xc0010114 - x86_AMD_V_KVM_MSRs_offset] = "VM_CR",
[0xc0010115 - x86_AMD_V_KVM_MSRs_offset] = "VM_IGNNE",
[0xc0010117 - x86_AMD_V_KVM_MSRs_offset] = "VM_HSAVE_PA",
+ [0xc001011e - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VM_PAGE_FLUSH",
[0xc001011f - x86_AMD_V_KVM_MSRs_offset] = "AMD64_VIRT_SPEC_CTRL",
[0xc0010130 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV_ES_GHCB",
[0xc0010131 - x86_AMD_V_KVM_MSRs_offset] = "AMD64_SEV",
$
The new MSR has a pattern that wasn't matched to avoid a clash with
IA32_UCODE_REV, change the regex to prefer the more relevant AMD_
prefixed ones to catch this new AMD64_VM_PAGE_FLUSH MSR.
Which causes these parts of tools/perf/ to be rebuilt:
CC /tmp/build/perf/trace/beauty/tracepoints/x86_msr.o
LD /tmp/build/perf/trace/beauty/tracepoints/perf-in.o
LD /tmp/build/perf/trace/beauty/perf-in.o
LD /tmp/build/perf/perf-in.o
LINK /tmp/build/perf/perf
This addresses this perf tools build warning:
diff -u tools/arch/x86/include/asm/msr-index.h arch/x86/include/asm/msr-index.h
Warning: Kernel ABI header at 'tools/arch/x86/include/asm/msr-index.h' differs from latest version at 'arch/x86/include/asm/msr-index.h'
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
parent
7f3905f00a
commit
fde668244d
@ -472,6 +472,7 @@
|
|||||||
#define MSR_AMD64_ICIBSEXTDCTL 0xc001103c
|
#define MSR_AMD64_ICIBSEXTDCTL 0xc001103c
|
||||||
#define MSR_AMD64_IBSOPDATA4 0xc001103d
|
#define MSR_AMD64_IBSOPDATA4 0xc001103d
|
||||||
#define MSR_AMD64_IBS_REG_COUNT_MAX 8 /* includes MSR_AMD64_IBSBRTARGET */
|
#define MSR_AMD64_IBS_REG_COUNT_MAX 8 /* includes MSR_AMD64_IBSBRTARGET */
|
||||||
|
#define MSR_AMD64_VM_PAGE_FLUSH 0xc001011e
|
||||||
#define MSR_AMD64_SEV_ES_GHCB 0xc0010130
|
#define MSR_AMD64_SEV_ES_GHCB 0xc0010130
|
||||||
#define MSR_AMD64_SEV 0xc0010131
|
#define MSR_AMD64_SEV 0xc0010131
|
||||||
#define MSR_AMD64_SEV_ENABLED_BIT 0
|
#define MSR_AMD64_SEV_ENABLED_BIT 0
|
||||||
|
@ -15,7 +15,7 @@ x86_msr_index=${arch_x86_header_dir}/msr-index.h
|
|||||||
|
|
||||||
printf "static const char *x86_MSRs[] = {\n"
|
printf "static const char *x86_MSRs[] = {\n"
|
||||||
regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
|
regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:space:]]*.*'
|
||||||
egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|AMD64|IA32_TSCDEADLINE|IDT_FCR4)' | \
|
egrep $regex ${x86_msr_index} | egrep -v 'MSR_(ATOM|P[46]|IA32_(TSCDEADLINE|UCODE_REV)|IDT_FCR4)' | \
|
||||||
sed -r "s/$regex/\2 \1/g" | sort -n | \
|
sed -r "s/$regex/\2 \1/g" | sort -n | \
|
||||||
xargs printf "\t[%s] = \"%s\",\n"
|
xargs printf "\t[%s] = \"%s\",\n"
|
||||||
printf "};\n\n"
|
printf "};\n\n"
|
||||||
|
Loading…
Reference in New Issue
Block a user