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[ARM] S3C24XX: GPIO: Start removal of S3C24XX_GPIO_BASE

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The S3C24XX_GPIO_BASE makes it difficult to compress the
GPIO number space, and is only used in a few places of
which everything outside arch/arm/plat-s3c24xx/gpiolib.c
will be removed as soon as possible.

Change gpiolib.c to use the S3C2410_GPxCON register addresses
as the base for each bank, thus eliminating S3C24XX_GPIO_BASE.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks 2009-05-17 22:18:27 +01:00
parent 9c7099ca75
commit fda7b2b097
1 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
arch/arm/plat-s3c24xx/gpiolib.c
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@ -79,7 +79,7 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
struct s3c_gpio_chip s3c24xx_gpios[] = { struct s3c_gpio_chip s3c24xx_gpios[] = {
[0] = { [0] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPA0), .base = S3C2410_GPACON,
.pm = __gpio_pm(&s3c_gpio_pm_1bit), .pm = __gpio_pm(&s3c_gpio_pm_1bit),
.chip = { .chip = {
.base = S3C2410_GPA0, .base = S3C2410_GPA0,
@ -91,7 +91,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[1] = { [1] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPB0), .base = S3C2410_GPBCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPB0, .base = S3C2410_GPB0,
@ -101,7 +101,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[2] = { [2] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPC0), .base = S3C2410_GPCCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPC0, .base = S3C2410_GPC0,
@ -111,7 +111,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[3] = { [3] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPD0), .base = S3C2410_GPDCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPD0, .base = S3C2410_GPD0,
@ -121,7 +121,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[4] = { [4] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPE0), .base = S3C2410_GPECON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPE0, .base = S3C2410_GPE0,
@ -131,7 +131,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[5] = { [5] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPF0), .base = S3C2410_GPFCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPF0, .base = S3C2410_GPF0,
@ -142,7 +142,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
}, },
}, },
[6] = { [6] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPG0), .base = S3C2410_GPGCON,
.pm = __gpio_pm(&s3c_gpio_pm_2bit), .pm = __gpio_pm(&s3c_gpio_pm_2bit),
.chip = { .chip = {
.base = S3C2410_GPG0, .base = S3C2410_GPG0,