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[MIPS] SNI PCIT CPLUS: workaround for b0rked irq wiring of onboard PCI bus 1
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -113,6 +113,16 @@ static char irq_tab_pcit[13][5] __initdata = {
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{ 0, INTA, INTB, INTC, INTD }, /* Slot 5 */
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};
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static char irq_tab_pcit_cplus[13][5] __initdata = {
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/* INTA INTB INTC INTD */
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{ 0, 0, 0, 0, 0 }, /* HOST bridge */
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{ 0, INTB, INTC, INTD, INTA }, /* PCI Slot 9 */
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{ 0, 0, 0, 0, 0 }, /* PCI-EISA */
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{ 0, 0, 0, 0, 0 }, /* Unused */
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{ 0, INTA, INTB, INTC, INTD }, /* PCI-PCI bridge */
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{ 0, INTB, INTC, INTD, INTA }, /* fixup */
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};
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static inline int is_rm300_revd(void)
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{
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unsigned char csmsr = *(volatile unsigned char *)PCIMT_CSMSR;
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@ -123,8 +133,19 @@ static inline int is_rm300_revd(void)
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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switch (sni_brd_type) {
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case SNI_BRD_PCI_TOWER:
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case SNI_BRD_PCI_TOWER_CPLUS:
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if (slot == 4) {
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/*
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* SNI messed up interrupt wiring for onboard
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* PCI bus 1; we need to fix this up here
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*/
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while (dev && dev->bus->number != 1)
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dev = dev->bus->self;
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if (dev && dev->devfn >= PCI_DEVFN(4, 0))
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slot = 5;
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}
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return irq_tab_pcit_cplus[slot][pin];
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case SNI_BRD_PCI_TOWER:
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return irq_tab_pcit[slot][pin];
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case SNI_BRD_PCI_MTOWER:
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