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tty: serial: samsung_tty: Add support for Apple UARTs
Apple SoCs are a distant descendant of Samsung designs and use yet another variant of their UART style, with different interrupt handling. In particular, this variant has the following differences with existing ones: * It includes a built-in interrupt controller with different registers, using only a single platform IRQ * Internal interrupt sources are treated as edge-triggered, even though the IRQ output is level-triggered. This chiefly affects the TX IRQ path: the driver can no longer rely on the TX buffer empty IRQ immediately firing after TX is enabled, but instead must prime the FIFO with data directly. Signed-off-by: Hector Martin <marcan@marcan.st> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210304213902.83903-25-marcan@marcan.st Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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@ -236,7 +236,7 @@ config SERIAL_CLPS711X_CONSOLE
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config SERIAL_SAMSUNG
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tristate "Samsung SoC serial support"
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depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
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depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || ARCH_APPLE || COMPILE_TEST
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select SERIAL_CORE
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help
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Support for the on-chip UARTs on the Samsung S3C24XX series CPUs,
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@ -59,6 +59,7 @@
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enum s3c24xx_port_type {
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TYPE_S3C24XX,
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TYPE_S3C6400,
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TYPE_APPLE_S5L,
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};
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struct s3c24xx_uart_info {
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@ -151,6 +152,8 @@ struct s3c24xx_uart_port {
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#endif
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};
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static void s3c24xx_serial_tx_chars(struct s3c24xx_uart_port *ourport);
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/* conversion functions */
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#define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev)
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@ -290,6 +293,9 @@ static void s3c24xx_serial_stop_tx(struct uart_port *port)
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case TYPE_S3C6400:
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s3c24xx_set_bit(port, S3C64XX_UINTM_TXD, S3C64XX_UINTM);
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break;
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case TYPE_APPLE_S5L:
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s3c24xx_clear_bit(port, APPLE_S5L_UCON_TXTHRESH_ENA, S3C2410_UCON);
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break;
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default:
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disable_irq_nosync(ourport->tx_irq);
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break;
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@ -358,6 +364,9 @@ static void enable_tx_dma(struct s3c24xx_uart_port *ourport)
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case TYPE_S3C6400:
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s3c24xx_set_bit(port, S3C64XX_UINTM_TXD, S3C64XX_UINTM);
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break;
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case TYPE_APPLE_S5L:
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WARN_ON(1); // No DMA
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break;
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default:
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disable_irq_nosync(ourport->tx_irq);
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break;
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@ -396,12 +405,23 @@ static void enable_tx_pio(struct s3c24xx_uart_port *ourport)
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s3c24xx_clear_bit(port, S3C64XX_UINTM_TXD,
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S3C64XX_UINTM);
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break;
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case TYPE_APPLE_S5L:
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ucon |= APPLE_S5L_UCON_TXTHRESH_ENA_MSK;
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wr_regl(port, S3C2410_UCON, ucon);
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break;
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default:
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enable_irq(ourport->tx_irq);
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break;
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}
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ourport->tx_mode = S3C24XX_TX_PIO;
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/*
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* The Apple version only has edge triggered TX IRQs, so we need
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* to kick off the process by sending some characters here.
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*/
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if (ourport->info->type == TYPE_APPLE_S5L)
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s3c24xx_serial_tx_chars(ourport);
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}
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static void s3c24xx_serial_start_tx_pio(struct s3c24xx_uart_port *ourport)
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@ -527,6 +547,10 @@ static void s3c24xx_serial_stop_rx(struct uart_port *port)
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s3c24xx_set_bit(port, S3C64XX_UINTM_RXD,
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S3C64XX_UINTM);
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break;
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case TYPE_APPLE_S5L:
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s3c24xx_clear_bit(port, APPLE_S5L_UCON_RXTHRESH_ENA, S3C2410_UCON);
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s3c24xx_clear_bit(port, APPLE_S5L_UCON_RXTO_ENA, S3C2410_UCON);
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break;
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default:
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disable_irq_nosync(ourport->rx_irq);
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break;
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@ -664,14 +688,18 @@ static void enable_rx_pio(struct s3c24xx_uart_port *ourport)
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/* set Rx mode to DMA mode */
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ucon = rd_regl(port, S3C2410_UCON);
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ucon &= ~(S3C64XX_UCON_TIMEOUT_MASK |
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S3C64XX_UCON_EMPTYINT_EN |
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S3C64XX_UCON_DMASUS_EN |
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S3C64XX_UCON_TIMEOUT_EN |
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S3C64XX_UCON_RXMODE_MASK);
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ucon |= 0xf << S3C64XX_UCON_TIMEOUT_SHIFT |
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S3C64XX_UCON_TIMEOUT_EN |
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S3C64XX_UCON_RXMODE_CPU;
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ucon &= ~S3C64XX_UCON_RXMODE_MASK;
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ucon |= S3C64XX_UCON_RXMODE_CPU;
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/* Apple types use these bits for IRQ masks */
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if (ourport->info->type != TYPE_APPLE_S5L) {
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ucon &= ~(S3C64XX_UCON_TIMEOUT_MASK |
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S3C64XX_UCON_EMPTYINT_EN |
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S3C64XX_UCON_DMASUS_EN |
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S3C64XX_UCON_TIMEOUT_EN);
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ucon |= 0xf << S3C64XX_UCON_TIMEOUT_SHIFT |
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S3C64XX_UCON_TIMEOUT_EN;
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}
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wr_regl(port, S3C2410_UCON, ucon);
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ourport->rx_mode = S3C24XX_RX_PIO;
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@ -935,6 +963,27 @@ static irqreturn_t s3c64xx_serial_handle_irq(int irq, void *id)
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return ret;
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}
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/* interrupt handler for Apple SoC's.*/
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static irqreturn_t apple_serial_handle_irq(int irq, void *id)
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{
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struct s3c24xx_uart_port *ourport = id;
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struct uart_port *port = &ourport->port;
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unsigned int pend = rd_regl(port, S3C2410_UTRSTAT);
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irqreturn_t ret = IRQ_NONE;
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if (pend & (APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO)) {
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wr_regl(port, S3C2410_UTRSTAT,
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APPLE_S5L_UTRSTAT_RXTHRESH | APPLE_S5L_UTRSTAT_RXTO);
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ret = s3c24xx_serial_rx_irq(irq, id);
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}
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if (pend & APPLE_S5L_UTRSTAT_TXTHRESH) {
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wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_TXTHRESH);
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ret = s3c24xx_serial_tx_irq(irq, id);
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}
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return ret;
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}
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static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port)
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{
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struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
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@ -1154,6 +1203,32 @@ static void s3c64xx_serial_shutdown(struct uart_port *port)
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ourport->tx_in_progress = 0;
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}
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static void apple_s5l_serial_shutdown(struct uart_port *port)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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unsigned int ucon;
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ucon = rd_regl(port, S3C2410_UCON);
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ucon &= ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTO_ENA_MSK);
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wr_regl(port, S3C2410_UCON, ucon);
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wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_ALL_FLAGS);
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free_irq(port->irq, ourport);
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ourport->tx_enabled = 0;
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ourport->tx_mode = 0;
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ourport->rx_enabled = 0;
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if (ourport->dma)
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s3c24xx_serial_release_dma(ourport);
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ourport->tx_in_progress = 0;
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}
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static int s3c24xx_serial_startup(struct uart_port *port)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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@ -1241,6 +1316,45 @@ static int s3c64xx_serial_startup(struct uart_port *port)
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return ret;
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}
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static int apple_s5l_serial_startup(struct uart_port *port)
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{
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struct s3c24xx_uart_port *ourport = to_ourport(port);
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unsigned long flags;
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unsigned int ufcon;
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int ret;
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wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_ALL_FLAGS);
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ret = request_irq(port->irq, apple_serial_handle_irq, 0,
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s3c24xx_serial_portname(port), ourport);
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if (ret) {
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dev_err(port->dev, "cannot get irq %d\n", port->irq);
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return ret;
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}
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/* For compatibility with s3c24xx Soc's */
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ourport->rx_enabled = 1;
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ourport->tx_enabled = 0;
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spin_lock_irqsave(&port->lock, flags);
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ufcon = rd_regl(port, S3C2410_UFCON);
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ufcon |= S3C2410_UFCON_RESETRX | S5PV210_UFCON_RXTRIG8;
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if (!uart_console(port))
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ufcon |= S3C2410_UFCON_RESETTX;
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wr_regl(port, S3C2410_UFCON, ufcon);
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enable_rx_pio(ourport);
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spin_unlock_irqrestore(&port->lock, flags);
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/* Enable Rx Interrupt */
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s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTHRESH_ENA, S3C2410_UCON);
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s3c24xx_set_bit(port, APPLE_S5L_UCON_RXTO_ENA, S3C2410_UCON);
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return ret;
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}
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/* power power management control */
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static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
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@ -1568,6 +1682,8 @@ static const char *s3c24xx_serial_type(struct uart_port *port)
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return "S3C24XX";
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case TYPE_S3C6400:
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return "S3C6400/10";
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case TYPE_APPLE_S5L:
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return "APPLE S5L";
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default:
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return NULL;
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}
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@ -1659,6 +1775,27 @@ static const struct uart_ops s3c64xx_serial_ops = {
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#endif
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};
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static const struct uart_ops apple_s5l_serial_ops = {
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.pm = s3c24xx_serial_pm,
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.tx_empty = s3c24xx_serial_tx_empty,
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.get_mctrl = s3c24xx_serial_get_mctrl,
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.set_mctrl = s3c24xx_serial_set_mctrl,
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.stop_tx = s3c24xx_serial_stop_tx,
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.start_tx = s3c24xx_serial_start_tx,
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.stop_rx = s3c24xx_serial_stop_rx,
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.break_ctl = s3c24xx_serial_break_ctl,
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.startup = apple_s5l_serial_startup,
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.shutdown = apple_s5l_serial_shutdown,
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.set_termios = s3c24xx_serial_set_termios,
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.type = s3c24xx_serial_type,
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.config_port = s3c24xx_serial_config_port,
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.verify_port = s3c24xx_serial_verify_port,
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#if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE) && defined(CONFIG_CONSOLE_POLL)
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.poll_get_char = s3c24xx_serial_get_poll_char,
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.poll_put_char = s3c24xx_serial_put_poll_char,
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#endif
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};
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static struct uart_driver s3c24xx_uart_drv = {
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.owner = THIS_MODULE,
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.driver_name = "s3c2410_serial",
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@ -1975,6 +2112,18 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
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wr_regl(port, S3C64XX_UINTP, 0xf);
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wr_regl(port, S3C64XX_UINTSP, 0xf);
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break;
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case TYPE_APPLE_S5L: {
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unsigned int ucon;
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ucon = rd_regl(port, S3C2410_UCON);
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ucon &= ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTO_ENA_MSK);
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wr_regl(port, S3C2410_UCON, ucon);
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wr_regl(port, S3C2410_UTRSTAT, APPLE_S5L_UTRSTAT_ALL_FLAGS);
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break;
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}
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default:
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break;
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}
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@ -2054,6 +2203,9 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
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case TYPE_S3C6400:
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ourport->port.ops = &s3c64xx_serial_ops;
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break;
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case TYPE_APPLE_S5L:
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ourport->port.ops = &apple_s5l_serial_ops;
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break;
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}
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if (np) {
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@ -2196,6 +2348,43 @@ static int s3c24xx_serial_resume_noirq(struct device *dev)
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clk_disable_unprepare(ourport->clk);
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break;
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}
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case TYPE_APPLE_S5L: {
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unsigned int ucon;
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int ret;
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ret = clk_prepare_enable(ourport->clk);
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if (ret) {
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dev_err(dev, "clk_enable clk failed: %d\n", ret);
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return ret;
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}
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if (!IS_ERR(ourport->baudclk)) {
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ret = clk_prepare_enable(ourport->baudclk);
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if (ret) {
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dev_err(dev, "clk_enable baudclk failed: %d\n", ret);
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clk_disable_unprepare(ourport->clk);
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return ret;
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}
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}
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ucon = rd_regl(port, S3C2410_UCON);
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ucon &= ~(APPLE_S5L_UCON_TXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTO_ENA_MSK);
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if (ourport->tx_enabled)
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ucon |= APPLE_S5L_UCON_TXTHRESH_ENA_MSK;
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if (ourport->rx_enabled)
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ucon |= APPLE_S5L_UCON_RXTHRESH_ENA_MSK |
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APPLE_S5L_UCON_RXTO_ENA_MSK;
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wr_regl(port, S3C2410_UCON, ucon);
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if (!IS_ERR(ourport->baudclk))
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clk_disable_unprepare(ourport->baudclk);
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clk_disable_unprepare(ourport->clk);
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break;
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}
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default:
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break;
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}
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@ -2605,6 +2794,34 @@ static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = {
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#define EXYNOS5433_SERIAL_DRV_DATA (kernel_ulong_t)NULL
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#endif
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#ifdef CONFIG_ARCH_APPLE
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static struct s3c24xx_serial_drv_data s5l_serial_drv_data = {
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.info = &(struct s3c24xx_uart_info) {
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.name = "Apple S5L UART",
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.type = TYPE_APPLE_S5L,
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.port_type = PORT_8250,
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.fifosize = 16,
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.rx_fifomask = S3C2410_UFSTAT_RXMASK,
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.rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
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.rx_fifofull = S3C2410_UFSTAT_RXFULL,
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.tx_fifofull = S3C2410_UFSTAT_TXFULL,
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.tx_fifomask = S3C2410_UFSTAT_TXMASK,
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.tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
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.def_clk_sel = S3C2410_UCON_CLKSEL0,
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.num_clks = 1,
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.clksel_mask = 0,
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.clksel_shift = 0,
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},
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.def_cfg = &(struct s3c2410_uartcfg) {
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.ucon = APPLE_S5L_UCON_DEFAULT,
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.ufcon = S3C2410_UFCON_DEFAULT,
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},
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};
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#define S5L_SERIAL_DRV_DATA ((kernel_ulong_t)&s5l_serial_drv_data)
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#else
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#define S5L_SERIAL_DRV_DATA ((kernel_ulong_t)NULL)
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#endif
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static const struct platform_device_id s3c24xx_serial_driver_ids[] = {
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{
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.name = "s3c2410-uart",
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@ -2627,6 +2844,9 @@ static const struct platform_device_id s3c24xx_serial_driver_ids[] = {
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}, {
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.name = "exynos5433-uart",
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.driver_data = EXYNOS5433_SERIAL_DRV_DATA,
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}, {
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.name = "s5l-uart",
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.driver_data = S5L_SERIAL_DRV_DATA,
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},
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{ },
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};
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@ -2648,6 +2868,8 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = {
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.data = (void *)EXYNOS4210_SERIAL_DRV_DATA },
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{ .compatible = "samsung,exynos5433-uart",
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.data = (void *)EXYNOS5433_SERIAL_DRV_DATA },
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{ .compatible = "apple,s5l-uart",
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.data = (void *)S5L_SERIAL_DRV_DATA },
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{},
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};
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MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match);
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@ -246,6 +246,22 @@
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S5PV210_UFCON_TXTRIG4 | \
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S5PV210_UFCON_RXTRIG4)
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#define APPLE_S5L_UCON_RXTO_ENA 9
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#define APPLE_S5L_UCON_RXTHRESH_ENA 12
|
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#define APPLE_S5L_UCON_TXTHRESH_ENA 13
|
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#define APPLE_S5L_UCON_RXTO_ENA_MSK (1 << APPLE_S5L_UCON_RXTO_ENA)
|
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#define APPLE_S5L_UCON_RXTHRESH_ENA_MSK (1 << APPLE_S5L_UCON_RXTHRESH_ENA)
|
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#define APPLE_S5L_UCON_TXTHRESH_ENA_MSK (1 << APPLE_S5L_UCON_TXTHRESH_ENA)
|
||||
|
||||
#define APPLE_S5L_UCON_DEFAULT (S3C2410_UCON_TXIRQMODE | \
|
||||
S3C2410_UCON_RXIRQMODE | \
|
||||
S3C2410_UCON_RXFIFO_TOI)
|
||||
|
||||
#define APPLE_S5L_UTRSTAT_RXTHRESH (1<<4)
|
||||
#define APPLE_S5L_UTRSTAT_TXTHRESH (1<<5)
|
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#define APPLE_S5L_UTRSTAT_RXTO (1<<9)
|
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#define APPLE_S5L_UTRSTAT_ALL_FLAGS (0x3f0)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
|
Loading…
Reference in New Issue
Block a user