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msm: timer: Support sched_clock()

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Now that sched_clock is mandatory on ARM it's simple to add
sched_clock support to the MSM timer code. Add it so that we get
more accurate sched_clock output than the jiffies based version
that's provided by default.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Stephen Boyd 2012-02-22 01:39:37 +00:00 committed by Marc Zyngier
parent 6905a65879
commit f8e56c42e4
1 changed files with 10 additions and 2 deletions
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12
arch/arm/mach-msm/timer.c
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@ -24,6 +24,7 @@
#include <asm/mach/time.h> #include <asm/mach/time.h>
#include <asm/hardware/gic.h> #include <asm/hardware/gic.h>
#include <asm/localtimer.h> #include <asm/localtimer.h>
#include <asm/sched_clock.h>
#include <mach/msm_iomap.h> #include <mach/msm_iomap.h>
#include <mach/cpu.h> #include <mach/cpu.h>
@ -105,12 +106,12 @@ static union {
static void __iomem *source_base; static void __iomem *source_base;
static cycle_t msm_read_timer_count(struct clocksource *cs) static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
{ {
return readl_relaxed(source_base + TIMER_COUNT_VAL); return readl_relaxed(source_base + TIMER_COUNT_VAL);
} }
static cycle_t msm_read_timer_count_shift(struct clocksource *cs) static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
{ {
/* /*
* Shift timer count down by a constant due to unreliable lower bits * Shift timer count down by a constant due to unreliable lower bits
@ -127,6 +128,11 @@ static struct clocksource msm_clocksource = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS, .flags = CLOCK_SOURCE_IS_CONTINUOUS,
}; };
static notrace u32 msm_sched_clock_read(void)
{
return msm_clocksource.read(&msm_clocksource);
}
static void __init msm_timer_init(void) static void __init msm_timer_init(void)
{ {
struct clock_event_device *ce = &msm_clockevent; struct clock_event_device *ce = &msm_clockevent;
@ -189,6 +195,8 @@ err:
res = clocksource_register_hz(cs, dgt_hz); res = clocksource_register_hz(cs, dgt_hz);
if (res) if (res)
pr_err("clocksource_register failed\n"); pr_err("clocksource_register failed\n");
setup_sched_clock(msm_sched_clock_read,
cpu_is_msm7x01() ? 32 - MSM_DGT_SHIFT : 32, dgt_hz);
} }
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS