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arm64: dts: qcom: sm8550-qrd: add the Wifi node

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Describe the ath12k WLAN on-board the WCN7850 module present on the
board.

[Neil: authored the initial version of the change]
Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This commit is contained in:
Bartosz Golaszewski 2024-03-25 14:16:14 +01:00 committed by Xilin Wu
parent d67cbb89c0
commit f82041efa9
2 changed files with 107 additions and 0 deletions
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97
arch/arm64/boot/dts/qcom/sm8550-qrd.dts
View File

@ -214,6 +214,68 @@
regulator-always-on;
regulator-boot-on;
};
wcn7850-pmu {
compatible = "qcom,wcn7850-pmu";
pinctrl-names = "default";
pinctrl-0 = <&wlan_en>, <&pmk8550_sleep_clk>;
wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
/*
* TODO Add bt-enable-gpios once the Bluetooth driver is
* converted to using the power sequencer.
*/
vdd-supply = <&vreg_s5g_0p85>;
vddio-supply = <&vreg_l15b_1p8>;
vddaon-supply = <&vreg_s2g_0p85>;
vdddig-supply = <&vreg_s4e_0p95>;
vddrfa1p2-supply = <&vreg_s4g_1p25>;
vddrfa1p8-supply = <&vreg_s6g_1p86>;
regulators {
vreg_pmu_rfa_cmn: ldo0 {
regulator-name = "vreg_pmu_rfa_cmn";
};
vreg_pmu_aon_0p59: ldo1 {
regulator-name = "vreg_pmu_aon_0p59";
};
vreg_pmu_wlcx_0p8: ldo2 {
regulator-name = "vreg_pmu_wlcx_0p8";
};
vreg_pmu_wlmx_0p85: ldo3 {
regulator-name = "vreg_pmu_wlmx_0p85";
};
vreg_pmu_btcmx_0p85: ldo4 {
regulator-name = "vreg_pmu_btcmx_0p85";
};
vreg_pmu_rfa_0p8: ldo5 {
regulator-name = "vreg_pmu_rfa_0p8";
};
vreg_pmu_rfa_1p2: ldo6 {
regulator-name = "vreg_pmu_rfa_1p2";
};
vreg_pmu_rfa_1p8: ldo7 {
regulator-name = "vreg_pmu_rfa_1p8";
};
vreg_pmu_pcie_0p9: ldo8 {
regulator-name = "vreg_pmu_pcie_0p9";
};
vreg_pmu_pcie_1p8: ldo9 {
regulator-name = "vreg_pmu_pcie_1p8";
};
};
};
};
&apps_rsc {
@ -824,6 +886,23 @@
status = "okay";
};
&pcieport0 {
wifi@0 {
compatible = "pci17cb,1107";
reg = <0x10000 0x0 0x0 0x0 0x0>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
};
};
&pcie0_phy {
vdda-phy-supply = <&vreg_l1e_0p88>;
vdda-pll-supply = <&vreg_l3e_1p2>;
@ -911,6 +990,17 @@
clock-frequency = <1000>;
};
&pmk8550_gpios {
pmk8550_sleep_clk: sleep-clk-state {
pins = "gpio3";
function = "func1";
input-disable;
output-enable;
bias-disable;
power-source = <0>;
};
};
&qupv3_id_0 {
status = "okay";
};
@ -1084,6 +1174,13 @@
bias-disable;
output-low;
};
wlan_en: wlan-en-state {
pins = "gpio80";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
&uart7 {

10
arch/arm64/boot/dts/qcom/sm8550.dtsi
View File

@ -1770,6 +1770,16 @@
phy-names = "pciephy";
status = "disabled";
pcieport0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
bus-range = <0x01 0xff>;
};
};
pcie0_phy: phy@1c06000 {