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arc: Fix typos/spellos
s/commiting/committing/ s/defintion/definition/ s/gaurantees/guarantees/ s/interrpted/interrupted/ s/interrutps/interrupts/ s/succeded/succeeded/ s/unconditonally/unconditionally/ Reviewed-by: Christian Brauner <christian.brauner@ubuntu.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -31,7 +31,7 @@ endif
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ifdef CONFIG_ARC_CURR_IN_REG
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# For a global register defintion, make sure it gets passed to every file
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# For a global register definition, make sure it gets passed to every file
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# We had a customer reported bug where some code built in kernel was NOT using
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# any kernel headers, and missing the r25 global register
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# Can't do unconditionally because of recursive include issues
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@ -116,7 +116,7 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
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*
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* Technically the lock is also needed for UP (boils down to irq save/restore)
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* but we can cheat a bit since cmpxchg() atomic_ops_lock() would cause irqs to
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* be disabled thus can't possibly be interrpted/preempted/clobbered by xchg()
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* be disabled thus can't possibly be interrupted/preempted/clobbered by xchg()
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* Other way around, xchg is one instruction anyways, so can't be interrupted
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* as such
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*/
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@ -143,7 +143,7 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
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/*
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* "atomic" variant of xchg()
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* REQ: It needs to follow the same serialization rules as other atomic_xxx()
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* Since xchg() doesn't always do that, it would seem that following defintion
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* Since xchg() doesn't always do that, it would seem that following definition
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* is incorrect. But here's the rationale:
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* SMP : Even xchg() takes the atomic_ops_lock, so OK.
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* LLSC: atomic_ops_lock are not relevant at all (even if SMP, since LLSC
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@ -50,14 +50,14 @@ SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new)
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int ret;
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/*
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* This is only for old cores lacking LLOCK/SCOND, which by defintion
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* This is only for old cores lacking LLOCK/SCOND, which by definition
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* can't possibly be SMP. Thus doesn't need to be SMP safe.
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* And this also helps reduce the overhead for serializing in
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* the UP case
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*/
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WARN_ON_ONCE(IS_ENABLED(CONFIG_SMP));
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/* Z indicates to userspace if operation succeded */
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/* Z indicates to userspace if operation succeeded */
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regs->status32 &= ~STATUS_Z_MASK;
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ret = access_ok(uaddr, sizeof(*uaddr));
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@ -107,7 +107,7 @@ fail:
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void arch_cpu_idle(void)
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{
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/* Re-enable interrupts <= default irq priority before commiting SLEEP */
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/* Re-enable interrupts <= default irq priority before committing SLEEP */
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const unsigned int arg = 0x10 | ARCV2_IRQ_DEF_PRIO;
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__asm__ __volatile__(
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@ -120,7 +120,7 @@ void arch_cpu_idle(void)
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void arch_cpu_idle(void)
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{
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/* sleep, but enable both set E1/E2 (levels of interrutps) before committing */
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/* sleep, but enable both set E1/E2 (levels of interrupts) before committing */
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__asm__ __volatile__("sleep 0x3 \n");
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}
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@ -259,7 +259,7 @@ setup_rt_frame(struct ksignal *ksig, sigset_t *set, struct pt_regs *regs)
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regs->r2 = (unsigned long)&sf->uc;
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/*
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* small optim to avoid unconditonally calling do_sigaltstack
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* small optim to avoid unconditionally calling do_sigaltstack
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* in sigreturn path, now that we only have rt_sigreturn
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*/
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magic = MAGIC_SIGALTSTK;
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@ -391,7 +391,7 @@ void do_signal(struct pt_regs *regs)
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void do_notify_resume(struct pt_regs *regs)
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{
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/*
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* ASM glue gaurantees that this is only called when returning to
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* ASM glue guarantees that this is only called when returning to
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* user mode
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*/
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if (test_thread_flag(TIF_NOTIFY_RESUME))
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