mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 15:13:55 +08:00
[media] v4l: vsp1: Add Z-order support for DRM pipeline
Make the Z-order of planes configurable by assigning RPFs to BRU inputs dynamically based on the Z-order position. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
This commit is contained in:
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30276a731a
commit
f5e04e7ea7
@ -93,6 +93,7 @@ int vsp1_du_setup_lif(struct device *dev, unsigned int width,
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media_entity_pipeline_stop(&pipe->output->entity.subdev.entity);
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for (i = 0; i < bru->entity.source_pad; ++i) {
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vsp1->drm->inputs[i].enabled = false;
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bru->inputs[i].rpf = NULL;
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pipe->inputs[i] = NULL;
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}
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@ -217,14 +218,9 @@ void vsp1_du_atomic_begin(struct device *dev)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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unsigned long flags;
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spin_lock_irqsave(&pipe->irqlock, flags);
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vsp1->drm->num_inputs = pipe->num_inputs;
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spin_unlock_irqrestore(&pipe->irqlock, flags);
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/* Prepare the display list. */
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pipe->dl = vsp1_dl_list_get(pipe->output->dlm);
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}
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@ -239,10 +235,12 @@ EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
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* @mem: DMA addresses of the memory buffers (one per plane)
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* @src: the source crop rectangle for the RPF
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* @dst: the destination compose rectangle for the BRU input
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* @zpos: the Z-order position of the input
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*
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* Configure the VSP to perform composition of the image referenced by @mem
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* through RPF @rpf_index, using the @src crop rectangle and the @dst
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* composition rectangle. The Z-order is fixed with RPF 0 at the bottom.
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* composition rectangle. The Z-order is configurable with higher @zpos values
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* displayed on top.
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*
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* Image format as stored in memory is expressed as a V4L2 @pixelformat value.
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* As a special case, setting the pixel format to 0 will disable the RPF. The
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@ -260,24 +258,16 @@ EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
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*
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* This function isn't reentrant, the caller needs to serialize calls.
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*
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* TODO: Implement Z-order control by decoupling the RPF index from the BRU
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* input index.
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*
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* Return 0 on success or a negative error code on failure.
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*/
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int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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u32 pixelformat, unsigned int pitch,
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dma_addr_t mem[2], const struct v4l2_rect *src,
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const struct v4l2_rect *dst)
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int vsp1_du_atomic_update_ext(struct device *dev, unsigned int rpf_index,
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u32 pixelformat, unsigned int pitch,
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dma_addr_t mem[2], const struct v4l2_rect *src,
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const struct v4l2_rect *dst, unsigned int zpos)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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const struct vsp1_format_info *fmtinfo;
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struct v4l2_subdev_selection sel;
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struct v4l2_subdev_format format;
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struct vsp1_rwpf *rpf;
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unsigned long flags;
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int ret;
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if (rpf_index >= vsp1->info->rpf_count)
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return -EINVAL;
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@ -288,31 +278,20 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__,
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rpf_index);
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spin_lock_irqsave(&pipe->irqlock, flags);
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if (pipe->inputs[rpf_index]) {
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/* Remove the RPF from the pipeline if it was previously
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* enabled.
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*/
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vsp1->bru->inputs[rpf_index].rpf = NULL;
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pipe->inputs[rpf_index] = NULL;
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pipe->num_inputs--;
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}
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spin_unlock_irqrestore(&pipe->irqlock, flags);
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vsp1->drm->inputs[rpf_index].enabled = false;
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return 0;
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}
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dev_dbg(vsp1->dev,
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"%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad }\n",
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"%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad } zpos %u\n",
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__func__, rpf_index,
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src->left, src->top, src->width, src->height,
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dst->left, dst->top, dst->width, dst->height,
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pixelformat, pitch, &mem[0], &mem[1]);
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pixelformat, pitch, &mem[0], &mem[1], zpos);
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/* Set the stride at the RPF input. */
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/* Store the format, stride, memory buffer address, crop and compose
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* rectangles and Z-order position and for the input.
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*/
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fmtinfo = vsp1_get_format_info(pixelformat);
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if (!fmtinfo) {
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dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n",
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@ -325,15 +304,38 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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rpf->format.plane_fmt[0].bytesperline = pitch;
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rpf->format.plane_fmt[1].bytesperline = pitch;
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rpf->mem.addr[0] = mem[0];
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rpf->mem.addr[1] = mem[1];
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rpf->mem.addr[2] = 0;
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vsp1->drm->inputs[rpf_index].crop = *src;
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vsp1->drm->inputs[rpf_index].compose = *dst;
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vsp1->drm->inputs[rpf_index].zpos = zpos;
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vsp1->drm->inputs[rpf_index].enabled = true;
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return 0;
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}
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EXPORT_SYMBOL_GPL(vsp1_du_atomic_update_ext);
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static int vsp1_du_setup_rpf_pipe(struct vsp1_device *vsp1,
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struct vsp1_rwpf *rpf, unsigned int bru_input)
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{
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struct v4l2_subdev_selection sel;
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struct v4l2_subdev_format format;
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const struct v4l2_rect *crop;
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int ret;
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/* Configure the format on the RPF sink pad and propagate it up to the
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* BRU sink pad.
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*/
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crop = &vsp1->drm->inputs[rpf->entity.index].crop;
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memset(&format, 0, sizeof(format));
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format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
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format.pad = RWPF_PAD_SINK;
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format.format.width = src->width + src->left;
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format.format.height = src->height + src->top;
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format.format.code = fmtinfo->mbus;
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format.format.width = crop->width + crop->left;
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format.format.height = crop->height + crop->top;
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format.format.code = rpf->fmtinfo->mbus;
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format.format.field = V4L2_FIELD_NONE;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
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@ -350,7 +352,7 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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sel.which = V4L2_SUBDEV_FORMAT_ACTIVE;
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sel.pad = RWPF_PAD_SINK;
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sel.target = V4L2_SEL_TGT_CROP;
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sel.r = *src;
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sel.r = *crop;
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ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL,
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&sel);
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@ -385,7 +387,7 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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return ret;
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/* BRU sink, propagate the format from the RPF source. */
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format.pad = rpf->entity.index;
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format.pad = bru_input;
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ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL,
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&format);
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@ -396,9 +398,9 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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__func__, format.format.width, format.format.height,
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format.format.code, format.pad);
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sel.pad = rpf->entity.index;
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sel.pad = bru_input;
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sel.target = V4L2_SEL_TGT_COMPOSE;
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sel.r = *dst;
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sel.r = vsp1->drm->inputs[rpf->entity.index].compose;
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ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection,
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NULL, &sel);
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@ -410,32 +412,13 @@ int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
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__func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
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sel.pad);
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/* Store the BRU input pad number in the RPF. */
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rpf->bru_input = rpf->entity.index;
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/* Cache the memory buffer address but don't apply the values to the
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* hardware as the crop offsets haven't been computed yet.
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*/
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rpf->mem.addr[0] = mem[0];
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rpf->mem.addr[1] = mem[1];
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rpf->mem.addr[2] = 0;
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spin_lock_irqsave(&pipe->irqlock, flags);
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/* If the RPF was previously stopped set the BRU input to the RPF and
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* store the RPF in the pipeline inputs array.
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*/
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if (!pipe->inputs[rpf->entity.index]) {
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vsp1->bru->inputs[rpf_index].rpf = rpf;
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pipe->inputs[rpf->entity.index] = rpf;
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pipe->num_inputs++;
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}
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spin_unlock_irqrestore(&pipe->irqlock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(vsp1_du_atomic_update);
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static unsigned int rpf_zpos(struct vsp1_device *vsp1, struct vsp1_rwpf *rpf)
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{
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return vsp1->drm->inputs[rpf->entity.index].zpos;
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}
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/**
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* vsp1_du_atomic_flush - Commit an atomic update
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@ -445,10 +428,60 @@ void vsp1_du_atomic_flush(struct device *dev)
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{
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struct vsp1_device *vsp1 = dev_get_drvdata(dev);
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struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
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struct vsp1_rwpf *inputs[VSP1_MAX_RPF] = { NULL, };
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struct vsp1_entity *entity;
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unsigned long flags;
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bool stop = false;
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unsigned int i;
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int ret;
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/* Count the number of enabled inputs and sort them by Z-order. */
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pipe->num_inputs = 0;
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for (i = 0; i < vsp1->info->rpf_count; ++i) {
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struct vsp1_rwpf *rpf = vsp1->rpf[i];
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unsigned int j;
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if (!vsp1->drm->inputs[i].enabled) {
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pipe->inputs[i] = NULL;
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continue;
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}
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pipe->inputs[i] = rpf;
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/* Insert the RPF in the sorted RPFs array. */
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for (j = pipe->num_inputs++; j > 0; --j) {
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if (rpf_zpos(vsp1, inputs[j-1]) <= rpf_zpos(vsp1, rpf))
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break;
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inputs[j] = inputs[j-1];
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}
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inputs[j] = rpf;
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}
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/* Setup the RPF input pipeline for every enabled input. */
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for (i = 0; i < vsp1->info->num_bru_inputs; ++i) {
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struct vsp1_rwpf *rpf = inputs[i];
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if (!rpf) {
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vsp1->bru->inputs[i].rpf = NULL;
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continue;
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}
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vsp1->bru->inputs[i].rpf = rpf;
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rpf->bru_input = i;
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rpf->entity.sink_pad = i;
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dev_dbg(vsp1->dev, "%s: connecting RPF.%u to BRU:%u\n",
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__func__, rpf->entity.index, i);
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ret = vsp1_du_setup_rpf_pipe(vsp1, rpf, i);
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if (ret < 0)
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dev_err(vsp1->dev,
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"%s: failed to setup RPF.%u\n",
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__func__, rpf->entity.index);
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}
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/* Configure all entities in the pipeline. */
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list_for_each_entry(entity, &pipe->entities, list_pipe) {
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/* Disconnect unused RPFs from the pipeline. */
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if (entity->type == VSP1_ENTITY_RPF) {
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@ -466,6 +499,9 @@ void vsp1_du_atomic_flush(struct device *dev)
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if (entity->ops->configure)
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entity->ops->configure(entity, pipe, pipe->dl);
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/* The memory buffer address must be applied after configuring
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* the RPF to make sure the crop offset are computed.
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*/
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if (entity->type == VSP1_ENTITY_RPF)
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vsp1_rwpf_set_memory(to_rwpf(&entity->subdev),
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pipe->dl);
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@ -475,19 +511,13 @@ void vsp1_du_atomic_flush(struct device *dev)
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pipe->dl = NULL;
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/* Start or stop the pipeline if needed. */
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spin_lock_irqsave(&pipe->irqlock, flags);
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if (!vsp1->drm->num_inputs && pipe->num_inputs) {
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vsp1_write(vsp1, VI6_DISP_IRQ_STA, 0);
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vsp1_write(vsp1, VI6_DISP_IRQ_ENB, VI6_DISP_IRQ_ENB_DSTE);
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spin_lock_irqsave(&pipe->irqlock, flags);
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vsp1_pipeline_run(pipe);
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spin_unlock_irqrestore(&pipe->irqlock, flags);
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} else if (vsp1->drm->num_inputs && !pipe->num_inputs) {
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stop = true;
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}
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spin_unlock_irqrestore(&pipe->irqlock, flags);
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if (stop) {
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vsp1_write(vsp1, VI6_DISP_IRQ_ENB, 0);
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vsp1_pipeline_stop(pipe);
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}
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@ -13,18 +13,26 @@
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#ifndef __VSP1_DRM_H__
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#define __VSP1_DRM_H__
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#include <linux/videodev2.h>
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#include "vsp1_pipe.h"
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/**
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* vsp1_drm - State for the API exposed to the DRM driver
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* @pipe: the VSP1 pipeline used for display
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* @num_inputs: number of active pipeline inputs at the beginning of an update
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* @update: the pipeline configuration has been updated
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* @planes: source crop rectangle, destination compose rectangle and z-order
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* position for every input
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*/
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struct vsp1_drm {
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struct vsp1_pipeline pipe;
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unsigned int num_inputs;
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bool update;
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struct {
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bool enabled;
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struct v4l2_rect crop;
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struct v4l2_rect compose;
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unsigned int zpos;
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} inputs[VSP1_MAX_RPF];
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};
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int vsp1_drm_init(struct vsp1_device *vsp1);
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pipe->state = VSP1_PIPELINE_STOPPED;
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}
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/* Must be called with the pipe irqlock held. */
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void vsp1_pipeline_run(struct vsp1_pipeline *pipe)
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{
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struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
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@ -24,10 +24,20 @@ int vsp1_du_setup_lif(struct device *dev, unsigned int width,
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unsigned int height);
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void vsp1_du_atomic_begin(struct device *dev);
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int vsp1_du_atomic_update(struct device *dev, unsigned int rpf, u32 pixelformat,
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unsigned int pitch, dma_addr_t mem[2],
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const struct v4l2_rect *src,
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const struct v4l2_rect *dst);
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int vsp1_du_atomic_update_ext(struct device *dev, unsigned int rpf,
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u32 pixelformat, unsigned int pitch,
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dma_addr_t mem[2], const struct v4l2_rect *src,
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const struct v4l2_rect *dst, unsigned int zpos);
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void vsp1_du_atomic_flush(struct device *dev);
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static inline int vsp1_du_atomic_update(struct device *dev,
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unsigned int rpf_index, u32 pixelformat,
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unsigned int pitch, dma_addr_t mem[2],
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const struct v4l2_rect *src,
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const struct v4l2_rect *dst)
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{
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return vsp1_du_atomic_update_ext(dev, rpf_index, pixelformat, pitch,
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mem, src, dst, 0);
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}
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#endif /* __MEDIA_VSP1_H__ */
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