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x86/decoder: Fix and update the opcodes map

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Update x86-opcode-map.txt based on the October 2017 Intel SDM publication.
Fix INVPID to INVVPID.
Add UD0 and UD1 instruction opcodes.

Also sync the objtool and perf tooling copies of this file.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Masami Hiramatsu <masami.hiramatsu@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/aac062d7-c0f6-96e3-5c92-ed299e2bd3da@infradead.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Randy Dunlap 2017-12-11 10:38:36 -08:00 committed by Ingo Molnar
parent 7ee18d6779
commit f5b5fab178
3 changed files with 35 additions and 8 deletions
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13
arch/x86/lib/x86-opcode-map.txt
View File

@ -607,7 +607,7 @@ fb: psubq Pq,Qq | vpsubq Vx,Hx,Wx (66),(v1)
fc: paddb Pq,Qq | vpaddb Vx,Hx,Wx (66),(v1)
fd: paddw Pq,Qq | vpaddw Vx,Hx,Wx (66),(v1)
fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
ff:
ff: UD0
EndTable
Table: 3-byte opcode 1 (0x0f 0x38)
@ -717,7 +717,7 @@ AVXcode: 2
7e: vpermt2d/q Vx,Hx,Wx (66),(ev)
7f: vpermt2ps/d Vx,Hx,Wx (66),(ev)
80: INVEPT Gy,Mdq (66)
81: INVPID Gy,Mdq (66)
81: INVVPID Gy,Mdq (66)
82: INVPCID Gy,Mdq (66)
83: vpmultishiftqb Vx,Hx,Wx (66),(ev)
88: vexpandps/d Vpd,Wpd (66),(ev)
@ -970,6 +970,15 @@ GrpTable: Grp9
EndTable
GrpTable: Grp10
# all are UD1
0: UD1
1: UD1
2: UD1
3: UD1
4: UD1
5: UD1
6: UD1
7: UD1
EndTable
# Grp11A and Grp11B are expressed as Grp11 in Intel SDM

15
tools/objtool/arch/x86/insn/x86-opcode-map.txt
View File

@ -607,7 +607,7 @@ fb: psubq Pq,Qq | vpsubq Vx,Hx,Wx (66),(v1)
fc: paddb Pq,Qq | vpaddb Vx,Hx,Wx (66),(v1)
fd: paddw Pq,Qq | vpaddw Vx,Hx,Wx (66),(v1)
fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
ff:
ff: UD0
EndTable
Table: 3-byte opcode 1 (0x0f 0x38)
@ -717,7 +717,7 @@ AVXcode: 2
7e: vpermt2d/q Vx,Hx,Wx (66),(ev)
7f: vpermt2ps/d Vx,Hx,Wx (66),(ev)
80: INVEPT Gy,Mdq (66)
81: INVPID Gy,Mdq (66)
81: INVVPID Gy,Mdq (66)
82: INVPCID Gy,Mdq (66)
83: vpmultishiftqb Vx,Hx,Wx (66),(ev)
88: vexpandps/d Vpd,Wpd (66),(ev)
@ -896,7 +896,7 @@ EndTable
GrpTable: Grp3_1
0: TEST Eb,Ib
1:
1: TEST Eb,Ib
2: NOT Eb
3: NEG Eb
4: MUL AL,Eb
@ -970,6 +970,15 @@ GrpTable: Grp9
EndTable
GrpTable: Grp10
# all are UD1
0: UD1
1: UD1
2: UD1
3: UD1
4: UD1
5: UD1
6: UD1
7: UD1
EndTable
# Grp11A and Grp11B are expressed as Grp11 in Intel SDM

15
tools/perf/util/intel-pt-decoder/x86-opcode-map.txt
View File

@ -607,7 +607,7 @@ fb: psubq Pq,Qq | vpsubq Vx,Hx,Wx (66),(v1)
fc: paddb Pq,Qq | vpaddb Vx,Hx,Wx (66),(v1)
fd: paddw Pq,Qq | vpaddw Vx,Hx,Wx (66),(v1)
fe: paddd Pq,Qq | vpaddd Vx,Hx,Wx (66),(v1)
ff:
ff: UD0
EndTable
Table: 3-byte opcode 1 (0x0f 0x38)
@ -717,7 +717,7 @@ AVXcode: 2
7e: vpermt2d/q Vx,Hx,Wx (66),(ev)
7f: vpermt2ps/d Vx,Hx,Wx (66),(ev)
80: INVEPT Gy,Mdq (66)
81: INVPID Gy,Mdq (66)
81: INVVPID Gy,Mdq (66)
82: INVPCID Gy,Mdq (66)
83: vpmultishiftqb Vx,Hx,Wx (66),(ev)
88: vexpandps/d Vpd,Wpd (66),(ev)
@ -896,7 +896,7 @@ EndTable
GrpTable: Grp3_1
0: TEST Eb,Ib
1:
1: TEST Eb,Ib
2: NOT Eb
3: NEG Eb
4: MUL AL,Eb
@ -970,6 +970,15 @@ GrpTable: Grp9
EndTable
GrpTable: Grp10
# all are UD1
0: UD1
1: UD1
2: UD1
3: UD1
4: UD1
5: UD1
6: UD1
7: UD1
EndTable
# Grp11A and Grp11B are expressed as Grp11 in Intel SDM