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ARM: imx6: add missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul
There is a missing BM_CLPCR_BYP_MMDC_CH0_LPM_HS setting for imx6ul,
without it, the "standby" mode can't work well, the system can't be
resumed.
With this commit, the "standby" mode works well.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: <stable@vger.kernel.org>
Fixes: ee4a5f838c
("ARM: imx: add suspend/resume support for i.mx6ul")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
b9700be51b
commit
f5a49057c7
@ -295,7 +295,7 @@ int imx6_set_lpm(enum mxc_cpu_pwr_mode mode)
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val &= ~BM_CLPCR_SBYOS;
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val &= ~BM_CLPCR_SBYOS;
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if (cpu_is_imx6sl())
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if (cpu_is_imx6sl())
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val |= BM_CLPCR_BYPASS_PMIC_READY;
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val |= BM_CLPCR_BYPASS_PMIC_READY;
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if (cpu_is_imx6sl() || cpu_is_imx6sx())
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if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul())
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val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
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val |= BM_CLPCR_BYP_MMDC_CH0_LPM_HS;
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else
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else
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val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
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val |= BM_CLPCR_BYP_MMDC_CH1_LPM_HS;
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