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tg3: Refactor the 2nd type of cpu pause
For completeness and consistency, add common function tg3_pause_cpu_and_set_pc(). This is only for existing fw and not used for the 57766. Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3588,12 +3588,33 @@ out:
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return err;
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}
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/* tp->lock is held. */
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static int tg3_pause_cpu_and_set_pc(struct tg3 *tp, u32 cpu_base, u32 pc)
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{
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int i;
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const int iters = 5;
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tw32(cpu_base + CPU_STATE, 0xffffffff);
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tw32_f(cpu_base + CPU_PC, pc);
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for (i = 0; i < iters; i++) {
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if (tr32(cpu_base + CPU_PC) == pc)
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break;
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tw32(cpu_base + CPU_STATE, 0xffffffff);
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tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
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tw32_f(cpu_base + CPU_PC, pc);
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udelay(1000);
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}
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return (i == iters) ? -EBUSY : 0;
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}
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/* tp->lock is held. */
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static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
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{
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struct fw_info info;
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const __be32 *fw_data;
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int err, i;
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int err;
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fw_data = (void *)tp->fw->data;
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@ -3620,18 +3641,8 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
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return err;
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/* Now startup only the RX cpu. */
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tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
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tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base);
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for (i = 0; i < 5; i++) {
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if (tr32(RX_CPU_BASE + CPU_PC) == info.fw_base)
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break;
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tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
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tw32(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT);
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tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base);
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udelay(1000);
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}
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if (i >= 5) {
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err = tg3_pause_cpu_and_set_pc(tp, RX_CPU_BASE, info.fw_base);
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if (err) {
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netdev_err(tp->dev, "%s fails to set RX CPU PC, is %08x "
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"should be %08x\n", __func__,
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tr32(RX_CPU_BASE + CPU_PC), info.fw_base);
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@ -3649,7 +3660,7 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
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struct fw_info info;
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const __be32 *fw_data;
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unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
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int err, i;
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int err;
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if (!tg3_flag(tp, FW_TSO))
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return 0;
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@ -3683,18 +3694,8 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
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return err;
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/* Now startup the cpu. */
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tw32(cpu_base + CPU_STATE, 0xffffffff);
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tw32_f(cpu_base + CPU_PC, info.fw_base);
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for (i = 0; i < 5; i++) {
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if (tr32(cpu_base + CPU_PC) == info.fw_base)
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break;
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tw32(cpu_base + CPU_STATE, 0xffffffff);
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tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
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tw32_f(cpu_base + CPU_PC, info.fw_base);
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udelay(1000);
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}
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if (i >= 5) {
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err = tg3_pause_cpu_and_set_pc(tp, cpu_base, info.fw_base);
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if (err) {
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netdev_err(tp->dev,
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"%s fails to set CPU PC, is %08x should be %08x\n",
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__func__, tr32(cpu_base + CPU_PC), info.fw_base);
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