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Merge tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux into fixes
This pull request contains the following Broadcom SoCs Device Tree changes: - Ray adds support for the Cygnus i2c Device Tree controller on Cygnus SoCs - Fixes to the BCM63138 dtsi file for the L2 cache controller properties * tag 'arm-soc/for-3.20/dts' of http://github.com/broadcom/stblinux: ARM: dts: add I2C device nodes for Broadcom Cygnus ARM: dts: BCM63xx: fix L2 cache properties
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commit
f495fe8998
@ -70,6 +70,26 @@
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};
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};
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i2c0: i2c@18008000 {
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compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
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reg = <0x18008000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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i2c1: i2c@1800b000 {
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compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
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reg = <0x1800b000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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uart0: serial@18020000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x18020000 0x100>;
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@ -66,8 +66,9 @@
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reg = <0x1d000 0x1000>;
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cache-unified;
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cache-level = <2>;
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cache-sets = <16>;
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cache-size = <0x80000>;
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cache-size = <524288>;
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cache-sets = <1024>;
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cache-line-size = <32>;
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interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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