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qed: Align CIDs according to DORQ requirement
The Doorbell HW block can be configured at a granularity
of 16 x CIDs, so we need to make sure that the actual number
of CIDs configured would be a multiplication of 16.
Today, when RoCE is enabled - given that the number is unaligned,
doorbelling the higher CIDs would fail to reach the firmware and
would eventually timeout.
Fixes: dbb799c397
("qed: Initialize hardware for new protocols")
Signed-off-by: Ram Amrani <Ram.Amrani@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
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@ -422,8 +422,9 @@ static void qed_cxt_set_proto_cid_count(struct qed_hwfn *p_hwfn,
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u32 page_sz = p_mgr->clients[ILT_CLI_CDUC].p_size.val;
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u32 cxt_size = CONN_CXT_SIZE(p_hwfn);
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u32 elems_per_page = ILT_PAGE_IN_BYTES(page_sz) / cxt_size;
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u32 align = elems_per_page * DQ_RANGE_ALIGN;
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p_conn->cid_count = roundup(p_conn->cid_count, elems_per_page);
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p_conn->cid_count = roundup(p_conn->cid_count, align);
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}
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}
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