From b9880532d0cdf54dc6cc0e028afe47d829873b20 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 8 Sep 2022 20:24:28 +0200 Subject: [PATCH 01/69] dt-bindings: remoteproc: qcom,q6v5: Move MSM8916 to schema qcom,q6v5.txt covers multiple SoCs with quite different binding requirements. Converting this into one DT schema would require several if statements, making the DT schema overall harder to read and understand. To avoid this, follow the example of SC7180/SC7280 and split "qcom,msm8916-mss-pil" (and the equivalent deprecated "qcom,q6v5-pil" compatible) into a separate DT schema. The schema is somewhat based on the one for SC7180/SC7280 but adjusted for the old platforms. Compared to the old plain text bindings, add missing documentation for the "bam-dmux" subnode and recommend one particular approach to specify the MBA/MPSS "memory-region" (the other one is marked as deprecated). Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-3-stephan.gerhold@kernkonzept.com --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 247 ++++++++++++++++++ .../bindings/remoteproc/qcom,q6v5.txt | 19 -- 2 files changed, 247 insertions(+), 19 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml new file mode 100644 index 000000000000..ce95e025b54a --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -0,0 +1,247 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar) + +maintainers: + - Stephan Gerhold + +description: + This document describes the hardware for a component that loads and boots + firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar). + +properties: + compatible: + oneOf: + - enum: + - qcom,msm8916-mss-pil + + - const: qcom,q6v5-pil + description: Deprecated, prefer using qcom,msm8916-mss-pil + deprecated: true + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: Configuration interface (AXI) clock + - description: Configuration bus (AHB) clock + - description: Boot ROM (AHB) clock + - description: XO proxy clock (control handed over after startup) + + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + + power-domains: + items: + - description: CX proxy power domain (control handed over after startup) + - description: MX proxy power domain (control handed over after startup) + + power-domain-names: + items: + - const: cx + - const: mx + + pll-supply: + description: PLL proxy supply (control handed over after startup) + + resets: + items: + - description: MSS restart control + + reset-names: + items: + - const: mss_restart + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: MPSS reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + bam-dmux: + $ref: /schemas/net/qcom,bam-dmux.yaml# + description: + Qualcomm BAM Data Multiplexer (provides network interface to the modem) + + smd-edge: + $ref: qcom,smd-edge.yaml# + description: + Qualcomm SMD subnode which represents communication edge, channels + and devices related to the DSP. + properties: + label: + enum: + - modem + - hexagon + unevaluatedProperties: false + + # Deprecated properties + cx-supply: + description: CX power domain regulator supply (prefer using power-domains) + deprecated: true + + mx-supply: + description: MX power domain regulator supply (prefer using power-domains) + deprecated: true + + mba: + type: object + description: + MBA reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + + mpss: + type: object + description: + MPSS reserved region (prefer using memory-region with two items) + properties: + memory-region: true + required: + - memory-region + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - pll-supply + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + - smd-edge + +allOf: + # Fallbacks for deprecated properties + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + - oneOf: + - required: + - power-domains + - power-domain-names + - required: + - cx-supply + - mx-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + remoteproc_mpss: remoteproc@4080000 { + compatible = "qcom,msm8916-mss-pil"; + reg = <0x04080000 0x100>, <0x04020000 0x40>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + qcom,smem-states = <&hexagon_smp2p_out 0>; + qcom,smem-state-names = "stop"; + qcom,halt-regs = <&tcsr 0x18000 0x19000 0x1a000>; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&xo_board>; + clock-names = "iface", "bus", "mem", "xo"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + pll-supply = <&pm8916_l7>; + + resets = <&scm 0>; + reset-names = "mss_restart"; + + memory-region = <&mba_mem>, <&mpss_mem>; + + smd-edge { + interrupts = ; + + qcom,smd-edge = <0>; + qcom,ipc = <&apcs 8 12>; + qcom,remote-pid = <1>; + + label = "hexagon"; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index d0ebd16ee0e1..11862b6c2339 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,10 +7,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be one of: - "qcom,q6v5-pil", "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8916-mss-pil", "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" @@ -37,10 +35,8 @@ on the Qualcomm Hexagon core. Value type: Definition: The interrupts needed depends on the compatible string: - qcom,q6v5-pil: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: @@ -72,8 +68,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: @@ -112,17 +106,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible strings below the following supplies are required: - "qcom,q6v5-pil" - "qcom,msm8916-mss-pil", -- cx-supply: (deprecated, use power domain instead) -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,msm8974-mss-pil" - cx-supply: (deprecated, use power domain instead) @@ -161,8 +144,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,q6v5-pil: - qcom,msm8916-mss-pil: qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: From ac686cbc6f8bb7810058955e3bb5b5635ca9331a Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 8 Sep 2022 20:24:29 +0200 Subject: [PATCH 02/69] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8974 The "qcom,msm8974-mss-pil" binding is still similar enough to MSM8916 to be covered by the same DT schema. The only difference is the additional "mss-supply", which can be easily handled using a single if statement. Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-4-stephan.gerhold@kernkonzept.com --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 15 +++++++++++++++ .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 16 ---------------- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index ce95e025b54a..d7d05f9ec8ae 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -18,6 +18,7 @@ properties: oneOf: - enum: - qcom,msm8916-mss-pil + - qcom,msm8974-mss-pil - const: qcom,q6v5-pil description: Deprecated, prefer using qcom,msm8916-mss-pil @@ -76,6 +77,9 @@ properties: pll-supply: description: PLL proxy supply (control handed over after startup) + mss-supply: + description: MSS power domain supply (only valid for qcom,msm8974-mss-pil) + resets: items: - description: MSS restart control @@ -181,6 +185,17 @@ required: - smd-edge allOf: + - if: + properties: + compatible: + const: qcom,msm8974-mss-pil + then: + required: + - mss-supply + else: + properties: + mss-supply: false + # Fallbacks for deprecated properties - oneOf: - required: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 11862b6c2339..5923c0447e2d 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -9,7 +9,6 @@ on the Qualcomm Hexagon core. Definition: must be one of: "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8974-mss-pil" "qcom,msm8996-mss-pil" "qcom,msm8998-mss-pil" "qcom,sdm845-mss-pil" @@ -37,7 +36,6 @@ on the Qualcomm Hexagon core. string: qcom,ipq8074-wcss-pil: qcom,qcs404-wcss-pil: - qcom,msm8974-mss-pil: must be "wdog", "fatal", "ready", "handover", "stop-ack" qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: @@ -68,8 +66,6 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,msm8974-mss-pil: - must be "iface", "bus", "mem", "xo" qcom,msm8996-mss-pil: must be "iface", "bus", "mem", "xo", "gpll0_mss", "snoc_axi", "mnoc_axi", "pnoc", "qdss" @@ -106,17 +102,6 @@ should be referenced as follows: Definition: reference to the reserved-memory for the mba region followed by the mpss region -For the compatible string below the following supplies are required: - "qcom,msm8974-mss-pil" -- cx-supply: (deprecated, use power domain instead) -- mss-supply: -- mx-supply: (deprecated, use power domain instead) -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - For the compatible string below the following supplies are required: "qcom,qcs404-wcss-pil" - cx-supply: @@ -144,7 +129,6 @@ For the compatible string below the following supplies are required: Definition: The power-domains needed depend on the compatible string: qcom,ipq8074-wcss-pil: no power-domain names required - qcom,msm8974-mss-pil: qcom,msm8996-mss-pil: qcom,msm8998-mss-pil: must be "cx", "mx" From f8fb0b3d453e8a0a3b94c18001ce8f1e86d95036 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 8 Sep 2022 20:24:30 +0200 Subject: [PATCH 03/69] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8909 Document the "qcom,msm8909-mss-pil" compatible for the modem remote processor on MSM8909. It is used pretty much exactly like the existing one for MSM8916. Signed-off-by: Stephan Gerhold Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-5-stephan.gerhold@kernkonzept.com --- .../devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index d7d05f9ec8ae..250bf4afab10 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -17,6 +17,7 @@ properties: compatible: oneOf: - enum: + - qcom,msm8909-mss-pil - qcom,msm8916-mss-pil - qcom,msm8974-mss-pil From ed71c47f0000ec17b4ce167bce0d44dff8e144e1 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 8 Sep 2022 20:24:31 +0200 Subject: [PATCH 04/69] remoteproc: qcom: q6v5-mss: Add support for MSM8909 Port the initialization sequence necessary for booting the modem remote processor on the MSM8909 SoC from Qualcomm's msm-3.10 release [1]. The sequence is actually similar to the existing one for MSM8996 and MSM8998 except that there is no separate QDSP6SS_MEM_PWR_CTL register and most of the "memories" are enabled at once instead of sequentially. To reuse the existing code just insert some if statements where needed and add a configuration similar to the one from MSM8916. [1]: https://git.codelinaro.org/clo/la/kernel/msm-3.10/-/commit/56dcedc8dac8abff6b007f76a29430b2d0a44704 Signed-off-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-6-stephan.gerhold@kernkonzept.com --- drivers/remoteproc/qcom_q6v5_mss.c | 119 +++++++++++++++++++++-------- 1 file changed, 88 insertions(+), 31 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index fddb63cffee0..2555f06dfc74 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -111,6 +111,9 @@ #define QDSS_BHS_ON BIT(21) #define QDSS_LDO_BYP BIT(22) +/* QDSP6v55 parameters */ +#define QDSP6V55_MEM_BITS GENMASK(16, 8) + /* QDSP6v56 parameters */ #define QDSP6v56_LDO_BYP BIT(25) #define QDSP6v56_BHS_ON BIT(24) @@ -234,6 +237,7 @@ struct q6v5 { }; enum { + MSS_MSM8909, MSS_MSM8916, MSS_MSM8974, MSS_MSM8996, @@ -687,13 +691,14 @@ static int q6v5proc_reset(struct q6v5 *qproc) return ret; } goto pbl_wait; - } else if (qproc->version == MSS_MSM8996 || + } else if (qproc->version == MSS_MSM8909 || + qproc->version == MSS_MSM8996 || qproc->version == MSS_MSM8998) { - int mem_pwr_ctl; - /* Override the ACC value if required */ - writel(QDSP6SS_ACC_OVERRIDE_VAL, - qproc->reg_base + QDSP6SS_STRAP_ACC); + if (qproc->version != MSS_MSM8909) + /* Override the ACC value if required */ + writel(QDSP6SS_ACC_OVERRIDE_VAL, + qproc->reg_base + QDSP6SS_STRAP_ACC); /* Assert resets, stop core */ val = readl(qproc->reg_base + QDSP6SS_RESET_REG); @@ -725,36 +730,53 @@ static int q6v5proc_reset(struct q6v5 *qproc) val |= QDSP6v56_LDO_BYP; writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - /* Deassert QDSP6 compiler memory clamp */ - val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); - val &= ~QDSP6v56_CLAMP_QMC_MEM; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + if (qproc->version != MSS_MSM8909) { + int mem_pwr_ctl; - /* Deassert memory peripheral sleep and L2 memory standby */ - val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; - writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + /* Deassert QDSP6 compiler memory clamp */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val &= ~QDSP6v56_CLAMP_QMC_MEM; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); - /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version == MSS_MSM8996) { - mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; - i = 19; + /* Deassert memory peripheral sleep and L2 memory standby */ + val |= Q6SS_L2DATA_STBY_N | Q6SS_SLP_RET_N; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L1, L2, ETB and JU memories 1 at a time */ + if (qproc->version == MSS_MSM8996) { + mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; + i = 19; + } else { + /* MSS_MSM8998 */ + mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; + i = 28; + } + val = readl(qproc->reg_base + mem_pwr_ctl); + for (; i >= 0; i--) { + val |= BIT(i); + writel(val, qproc->reg_base + mem_pwr_ctl); + /* + * Read back value to ensure the write is done then + * wait for 1us for both memory peripheral and data + * array to turn on. + */ + val |= readl(qproc->reg_base + mem_pwr_ctl); + udelay(1); + } } else { - /* MSS_MSM8998 */ - mem_pwr_ctl = QDSP6V6SS_MEM_PWR_CTL; - i = 28; - } - val = readl(qproc->reg_base + mem_pwr_ctl); - for (; i >= 0; i--) { - val |= BIT(i); - writel(val, qproc->reg_base + mem_pwr_ctl); - /* - * Read back value to ensure the write is done then - * wait for 1us for both memory peripheral and data - * array to turn on. - */ - val |= readl(qproc->reg_base + mem_pwr_ctl); - udelay(1); + /* Turn on memories */ + val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); + val |= Q6SS_SLP_RET_N | Q6SS_L2DATA_STBY_N | + Q6SS_ETB_SLP_NRET_N | QDSP6V55_MEM_BITS; + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + + /* Turn on L2 banks 1 at a time */ + for (i = 0; i <= 7; i++) { + val |= BIT(i); + writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); + } } + /* Remove word line clamp */ val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); val &= ~QDSP6v56_CLAMP_WL; @@ -2240,6 +2262,40 @@ static const struct rproc_hexagon_res msm8996_mss = { .version = MSS_MSM8996, }; +static const struct rproc_hexagon_res msm8909_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_supply = (struct qcom_mss_reg_res[]) { + { + .supply = "pll", + .uA = 100000, + }, + {} + }, + .proxy_clk_names = (char*[]){ + "xo", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names = (char*[]){ + "mx", + "cx", + NULL + }, + .need_mem_protection = false, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_MSM8909, +}; + static const struct rproc_hexagon_res msm8916_mss = { .hexagon_mba_image = "mba.mbn", .proxy_supply = (struct qcom_mss_reg_res[]) { @@ -2340,6 +2396,7 @@ static const struct rproc_hexagon_res msm8974_mss = { static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss}, + { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss}, { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, From 43baa1a2215998ecb2ba64bb6d435d07541c7184 Mon Sep 17 00:00:00 2001 From: Stephan Gerhold Date: Thu, 8 Sep 2022 20:24:32 +0200 Subject: [PATCH 05/69] dt-bindings: remoteproc: qcom,msm8916-mss-pil: Add MSM8953 Add the compatible for MSS as found on the MSM8953 platform. The situation is similar to the existing bindings for MSM8974: there is an additional "mss" power domain that must be voted for while starting up the remote processor. The difference is that on MSM8974 the power domain is represented as a regulator (firmware expects specific voltage) while on MSM8953 it is represented as power domain (firmware expects performance state instead of voltage). Handle this difference by adding the "mss" power domain as optional third item, and then restrict it (and make it required) only when using the MSM8953 compatible. Co-developed-by: Sireesh Kodali Signed-off-by: Sireesh Kodali Signed-off-by: Stephan Gerhold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-7-stephan.gerhold@kernkonzept.com --- .../remoteproc/qcom,msm8916-mss-pil.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml index 250bf4afab10..6e6e69ad9cd7 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml @@ -19,6 +19,7 @@ properties: - enum: - qcom,msm8909-mss-pil - qcom,msm8916-mss-pil + - qcom,msm8953-mss-pil - qcom,msm8974-mss-pil - const: qcom,q6v5-pil @@ -69,11 +70,16 @@ properties: items: - description: CX proxy power domain (control handed over after startup) - description: MX proxy power domain (control handed over after startup) + - description: MSS proxy power domain (control handed over after startup) + (only valid for qcom,msm8953-mss-pil) + minItems: 2 power-domain-names: items: - const: cx - const: mx + - const: mss # only valid for qcom,msm8953-mss-pil + minItems: 2 pll-supply: description: PLL proxy supply (control handed over after startup) @@ -186,6 +192,26 @@ required: - smd-edge allOf: + - if: + properties: + compatible: + const: qcom,msm8953-mss-pil + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + required: + - power-domains + - power-domain-names + else: + properties: + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + - if: properties: compatible: From 0201f759594b1248635185a92a5e39f47441ad6a Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Thu, 8 Sep 2022 20:24:33 +0200 Subject: [PATCH 06/69] remoteproc: qcom: q6v5-mss: Add modem support on MSM8953 The modem on the MSM8953 platform is similar to the modem on the MSM8996 platform in terms of set up. It differs primarily in that TZ needs to be informed of the modem start address and pas_id. Signed-off-by: Sireesh Kodali Signed-off-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220908182433.466908-8-stephan.gerhold@kernkonzept.com --- drivers/remoteproc/qcom_q6v5_mss.c | 55 ++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 2555f06dfc74..2f4027664a0e 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -40,6 +40,8 @@ #define MBA_LOG_SIZE SZ_4K +#define MPSS_PAS_ID 5 + /* RMB Status Register Values */ #define RMB_PBL_SUCCESS 0x1 @@ -239,6 +241,7 @@ struct q6v5 { enum { MSS_MSM8909, MSS_MSM8916, + MSS_MSM8953, MSS_MSM8974, MSS_MSM8996, MSS_MSM8998, @@ -692,10 +695,12 @@ static int q6v5proc_reset(struct q6v5 *qproc) } goto pbl_wait; } else if (qproc->version == MSS_MSM8909 || + qproc->version == MSS_MSM8953 || qproc->version == MSS_MSM8996 || qproc->version == MSS_MSM8998) { - if (qproc->version != MSS_MSM8909) + if (qproc->version != MSS_MSM8909 && + qproc->version != MSS_MSM8953) /* Override the ACC value if required */ writel(QDSP6SS_ACC_OVERRIDE_VAL, qproc->reg_base + QDSP6SS_STRAP_ACC); @@ -743,7 +748,8 @@ static int q6v5proc_reset(struct q6v5 *qproc) writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); /* Turn on L1, L2, ETB and JU memories 1 at a time */ - if (qproc->version == MSS_MSM8996) { + if (qproc->version == MSS_MSM8953 || + qproc->version == MSS_MSM8996) { mem_pwr_ctl = QDSP6SS_MEM_PWR_CTL; i = 19; } else { @@ -1365,6 +1371,15 @@ static int q6v5_mpss_load(struct q6v5 *qproc) max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); } + if (qproc->version == MSS_MSM8953) { + ret = qcom_scm_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mpss_size); + if (ret) { + dev_err(qproc->dev, + "setting up mpss memory failed: %d\n", ret); + goto release_firmware; + } + } + /* * In case of a modem subsystem restart on secure devices, the modem * memory can be reclaimed only after MBA is loaded. @@ -2341,6 +2356,41 @@ static const struct rproc_hexagon_res msm8916_mss = { .version = MSS_MSM8916, }; +static const struct rproc_hexagon_res msm8953_mss = { + .hexagon_mba_image = "mba.mbn", + .proxy_supply = (struct qcom_mss_reg_res[]) { + { + .supply = "pll", + .uA = 100000, + }, + {} + }, + .proxy_clk_names = (char*[]){ + "xo", + NULL + }, + .active_clk_names = (char*[]){ + "iface", + "bus", + "mem", + NULL + }, + .proxy_pd_names = (char*[]) { + "cx", + "mx", + "mss", + NULL + }, + .need_mem_protection = false, + .has_alt_reset = false, + .has_mba_logs = false, + .has_spare_reg = false, + .has_qaccept_regs = false, + .has_ext_cntl_regs = false, + .has_vq6 = false, + .version = MSS_MSM8953, +}; + static const struct rproc_hexagon_res msm8974_mss = { .hexagon_mba_image = "mba.b00", .proxy_supply = (struct qcom_mss_reg_res[]) { @@ -2398,6 +2448,7 @@ static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss}, { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss}, { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss}, + { .compatible = "qcom,msm8953-mss-pil", .data = &msm8953_mss}, { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss}, { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss}, { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss}, From 4c707cf5c7ddd43c6d574281a5591f71ed8d310c Mon Sep 17 00:00:00 2001 From: Vladimir Lypak Date: Sat, 1 Oct 2022 08:43:40 +0530 Subject: [PATCH 07/69] remoteproc: qcom: qcom_wcnss: Add support for pronto-v3 Pronto-v3 is similar to pronto-v2. It requires two power domains, one regulator, and it requires the xo clock. It is used on the MSM8953 platform. Signed-off-by: Vladimir Lypak Signed-off-by: Sireesh Kodali Reviewed-by: Stephan Gerhold Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221001031345.31293-2-sireeshkodali1@gmail.com --- drivers/remoteproc/qcom_wcnss.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/remoteproc/qcom_wcnss.c b/drivers/remoteproc/qcom_wcnss.c index 68f37296b151..f599d5d5719d 100644 --- a/drivers/remoteproc/qcom_wcnss.c +++ b/drivers/remoteproc/qcom_wcnss.c @@ -141,6 +141,17 @@ static const struct wcnss_data pronto_v2_data = { .num_vregs = 1, }; +static const struct wcnss_data pronto_v3_data = { + .pmu_offset = 0x1004, + .spare_offset = 0x1088, + + .pd_names = { "mx", "cx" }, + .vregs = (struct wcnss_vreg_info[]) { + { "vddpx", 1800000, 1800000, 0 }, + }, + .num_vregs = 1, +}; + static int wcnss_load(struct rproc *rproc, const struct firmware *fw) { struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv; @@ -675,6 +686,7 @@ static const struct of_device_id wcnss_of_match[] = { { .compatible = "qcom,riva-pil", &riva_data }, { .compatible = "qcom,pronto-v1-pil", &pronto_v1_data }, { .compatible = "qcom,pronto-v2-pil", &pronto_v2_data }, + { .compatible = "qcom,pronto-v3-pil", &pronto_v3_data }, { }, }; MODULE_DEVICE_TABLE(of, wcnss_of_match); From 9a660c7fd69ae9fff3f941140db25339937f8eee Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Sat, 1 Oct 2022 08:43:41 +0530 Subject: [PATCH 08/69] dt-bindings: remoteproc: qcom: Convert wcnss documentation to YAML This is a direct conversion of the existing txt documentation to YAML. It is in preparation for the addition of pronto-v3 to the docs. This patch doesn't document any of the existing subnodes/properties that are not documented in the existing txt file. That is done in a separate patch. Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221001031345.31293-3-sireeshkodali1@gmail.com --- .../bindings/remoteproc/qcom,wcnss-pil.txt | 177 ------------ .../bindings/remoteproc/qcom,wcnss-pil.yaml | 269 ++++++++++++++++++ 2 files changed, 269 insertions(+), 177 deletions(-) delete mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt deleted file mode 100644 index ac423f4c3f1b..000000000000 --- a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt +++ /dev/null @@ -1,177 +0,0 @@ -Qualcomm WCNSS Peripheral Image Loader - -This document defines the binding for a component that loads and boots firmware -on the Qualcomm WCNSS core. - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,riva-pil", - "qcom,pronto-v1-pil", - "qcom,pronto-v2-pil" - -- reg: - Usage: required - Value type: - Definition: must specify the base address and size of the CCU, DXE and - PMU register blocks - -- reg-names: - Usage: required - Value type: - Definition: must be "ccu", "dxe", "pmu" - -- interrupts-extended: - Usage: required - Value type: - Definition: must list the watchdog and fatal IRQs and may specify the - ready, handover and stop-ack IRQs - -- interrupt-names: - Usage: required - Value type: - Definition: should be "wdog", "fatal", optionally followed by "ready", - "handover", "stop-ack" - -- firmware-name: - Usage: optional - Value type: - Definition: must list the relative firmware image path for the - WCNSS core. Defaults to "wcnss.mdt". - -- vddmx-supply: (deprecated for qcom,pronto-v1/2-pil) -- vddcx-supply: (deprecated for qcom,pronto-v1/2-pil) -- vddpx-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the WCNSS core - -- power-domains: - Usage: required (for qcom,pronto-v1/2-pil) - Value type: - Definition: reference to the power domains to be held on behalf of the - booting of the WCNSS core - -- power-domain-names: - Usage: required (for qcom,pronto-v1/2-pil) - Value type: - Definition: must be "cx", "mx" - -- qcom,smem-states: - Usage: optional - Value type: - Definition: reference to the SMEM state used to indicate to WCNSS that - it should shut down - -- qcom,smem-state-names: - Usage: optional - Value type: - Definition: should be "stop" - -- memory-region: - Usage: required - Value type: - Definition: reference to reserved-memory node for the remote processor - see ../reserved-memory/reserved-memory.txt - -= SUBNODES -A required subnode of the WCNSS PIL is used to describe the attached rf module -and its resource dependencies. It is described by the following properties: - -- compatible: - Usage: required - Value type: - Definition: must be one of: - "qcom,wcn3620", - "qcom,wcn3660", - "qcom,wcn3660b", - "qcom,wcn3680" - -- clocks: - Usage: required - Value type: - Definition: should specify the xo clock and optionally the rf clock - -- clock-names: - Usage: required - Value type: - Definition: should be "xo", optionally followed by "rf" - -- vddxo-supply: -- vddrfa-supply: -- vddpa-supply: -- vdddig-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the WCNSS core - - -The wcnss node can also have an subnode named "smd-edge" that describes the SMD -edge, channels and devices related to the WCNSS. -See ../soc/qcom/qcom,smd.yaml for details on how to describe the SMD edge. - -= EXAMPLE -The following example describes the resources needed to boot control the WCNSS, -with attached WCN3680, as it is commonly found on MSM8974 boards. - -pronto@fb204000 { - compatible = "qcom,pronto-v2-pil"; - reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>; - reg-names = "ccu", "dxe", "pmu"; - - interrupts-extended = <&intc 0 149 1>, - <&wcnss_smp2p_slave 0 0>, - <&wcnss_smp2p_slave 1 0>, - <&wcnss_smp2p_slave 2 0>, - <&wcnss_smp2p_slave 3 0>; - interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; - - power-domains = <&rpmpd MSM8974_VDDCX>, <&rpmpd MSM8974_VDDMX>; - power-domain-names = "cx", "mx"; - - vddpx-supply = <&pm8941_s3>; - - qcom,smem-states = <&wcnss_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - memory-region = <&wcnss_region>; - - pinctrl-names = "default"; - pinctrl-0 = <&wcnss_pin_a>; - - iris { - compatible = "qcom,wcn3680"; - - clocks = <&rpmcc RPM_CXO_CLK_SRC>, <&rpmcc RPM_CXO_A2>; - clock-names = "xo", "rf"; - - vddxo-supply = <&pm8941_l6>; - vddrfa-supply = <&pm8941_l11>; - vddpa-supply = <&pm8941_l19>; - vdddig-supply = <&pm8941_s3>; - }; - - smd-edge { - interrupts = <0 142 1>; - - qcom,ipc = <&apcs 8 17>; - qcom,smd-edge = <6>; - qcom,remote-pid = <4>; - - label = "pronto"; - - wcnss { - compatible = "qcom,wcnss"; - qcom,smd-channels = "WCNSS_CTRL"; - - qcom,mmio = <&pronto>; - - bt { - compatible = "qcom,wcnss-bt"; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml new file mode 100644 index 000000000000..c22a6090220f --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml @@ -0,0 +1,269 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCNSS Peripheral Image Loader + +maintainers: + - Bjorn Andersson + +description: + This document defines the binding for a component that loads and boots + firmware on the Qualcomm WCNSS core. + +properties: + compatible: + enum: + - qcom,riva-pil + - qcom,pronto-v1-pil + - qcom,pronto-v2-pil + + reg: + maxItems: 3 + description: + The base address and size of the CCU, DXE and PMU register blocks + + reg-names: + items: + - const: ccu + - const: dxe + - const: pmu + + interrupts: + minItems: 2 + maxItems: 5 + + interrupt-names: + minItems: 2 + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: + Relative firmware image path for the WCNSS core. Defaults to + "wcnss.mdt". + + vddpx-supply: + description: + PX regulator to be held on behalf of the booting of the WCNSS core + + vddmx-supply: + description: + MX regulator to be held on behalf of the booting of the WCNSS core. + + vddcx-supply: + description: + CX regulator to be held on behalf of the booting of the WCNSS core. + + power-domains: + maxItems: 2 + + power-domain-names: + items: + - const: cx + - const: mx + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + States used by the AP to signal the WCNSS core that it should shutdown + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + items: + - const: stop + + memory-region: + maxItems: 1 + description: reserved-memory for the WCNSS core + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the ADSP. + + iris: + type: object + description: + The iris subnode of the WCNSS PIL is used to describe the attached RF module + and its resource dependencies. + + properties: + compatible: + enum: + - qcom,wcn3620 + - qcom,wcn3660 + - qcom,wcn3660b + - qcom,wcn3680 + + clocks: + minItems: 1 + items: + - description: XO clock + - description: RF clock + + clock-names: + minItems: 1 + items: + - const: xo + - const: rf + + vddxo-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vddrfa-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vddpa-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + vdddig-supply: + description: + Reference to the regulator to be held on behalf of the booting WCNSS + core + + required: + - compatible + - clocks + - clock-names + - vddxo-supply + - vddrfa-supply + - vddpa-supply + - vdddig-supply + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - iris + - vddpx-supply + - memory-region + - smd-edge + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + const: qcom,riva-pil + then: + required: + - vddcx-supply + - vddmx-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,pronto-v1-pil + - qcom,pronto-v2-pil + then: + properties: + vddmx-supply: + deprecated: true + description: Deprecated for qcom,pronto-v1/2-pil + + vddcx-supply: + deprecated: true + description: Deprecated for qcom,pronto-v1/2-pil + + required: + - power-domains + - power-domain-names + +examples: + - | + #include + #include + #include + pronto@a21b000 { + compatible = "qcom,pronto-v2-pil"; + reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>; + reg-names = "ccu", "dxe", "pmu"; + + interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; + + power-domains = <&rpmpd MSM8916_VDDCX>, <&rpmpd MSM8916_VDDMX>; + power-domain-names = "cx", "mx"; + + vddpx-supply = <&pm8916_l7>; + + qcom,smem-states = <&wcnss_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + memory-region = <&wcnss_region>; + + pinctrl-names = "default"; + pinctrl-0 = <&wcnss_pin_a>; + + iris { + compatible = "qcom,wcn3620"; + vddxo-supply = <&pm8916_l7>; + vddrfa-supply = <&pm8916_s3>; + vddpa-supply = <&pm8916_l9>; + vdddig-supply = <&pm8916_l5>; + + clocks = <&rpmcc RPM_SMD_RF_CLK2>; + clock-names = "xo"; + }; + + smd-edge { + interrupts = ; + + qcom,ipc = <&apcs 8 17>; + qcom,smd-edge = <6>; + qcom,remote-pid = <4>; + + label = "pronto"; + + wcnss_ctrl: wcnss { + compatible = "qcom,wcnss"; + qcom,smd-channels = "WCNSS_CTRL"; + + qcom,mmio = <&pronto>; + + bluetooth { + compatible = "qcom,wcnss-bt"; + }; + + wifi { + compatible = "qcom,wcnss-wlan"; + + interrupts = , + ; + interrupt-names = "tx", "rx"; + + qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>; + qcom,smem-state-names = "tx-enable", "tx-rings-empty"; + }; + }; + }; + }; From 409db7b777c81ef249688cddba882d16dbb064e0 Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Sat, 1 Oct 2022 08:43:42 +0530 Subject: [PATCH 09/69] dt-bindings: remoteproc: qcom: wcnss: Add qcom,pronto compatible This is not a fallback compatible, it must be present in addition to "qcom,pronto-v*". It is also not documented in qcom,wcnss-pil.txt. This is the reason for documenting it in a separate commit. This compatible is used in the wcn36xx driver to determine which register must be accessed. However it isn't immediately clear why the wcn36xx driver relies on this extra compatible string rather than just looking for "qcom,pronto-v*". Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221001031345.31293-4-sireeshkodali1@gmail.com --- .../bindings/remoteproc/qcom,wcnss-pil.yaml | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml index c22a6090220f..0eb2617e3482 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml @@ -15,10 +15,15 @@ description: properties: compatible: - enum: - - qcom,riva-pil - - qcom,pronto-v1-pil - - qcom,pronto-v2-pil + description: + Append "qcom,pronto" if the device is actually pronto, and not riva + oneOf: + - items: + - enum: + - qcom,pronto-v1-pil + - qcom,pronto-v2-pil + - const: qcom,pronto + - const: qcom,riva-pil reg: maxItems: 3 @@ -200,7 +205,7 @@ examples: #include #include pronto@a21b000 { - compatible = "qcom,pronto-v2-pil"; + compatible = "qcom,pronto-v2-pil", "qcom,pronto"; reg = <0x0a204000 0x2000>, <0x0a202000 0x1000>, <0x0a21b000 0x3000>; reg-names = "ccu", "dxe", "pmu"; From a890eebe42ad2c0cfe44a34a4f9e7d1a735a55d8 Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Sat, 1 Oct 2022 08:43:43 +0530 Subject: [PATCH 10/69] dt-bindings: remoteproc: qcom: wcnss: Add compatible for pronto v3 The pronto v3 remoteproc is similar to pronto v2. It is found on the MSM8953 platform, which is used by SDM450, SDM625, SDM626, APQ8053 and other SoCs. Since the configuration is same on all SoCs, a single compatible is used. Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221001031345.31293-5-sireeshkodali1@gmail.com --- .../bindings/remoteproc/qcom,wcnss-pil.yaml | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml index 0eb2617e3482..2ba2b6cf11fb 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml @@ -22,6 +22,7 @@ properties: - enum: - qcom,pronto-v1-pil - qcom,pronto-v2-pil + - qcom,pronto-v3-pil - const: qcom,pronto - const: qcom,riva-pil @@ -199,6 +200,21 @@ allOf: - power-domains - power-domain-names + - if: + properties: + compatible: + contains: + enum: + - qcom,pronto-v3-pil + then: + properties: + vddmx-supply: false + vddcx-supply: false + + required: + - power-domains + - power-domain-names + examples: - | #include From a4421a22bfd966852349e5c38278e9a6eaefb456 Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Sat, 1 Oct 2022 08:43:44 +0530 Subject: [PATCH 11/69] dt-bindings: remoteproc: wcnss-pil: Make supplies optionally required On MSM8974, power domains are not yet supported. The platform uses regulators. This patch marks either the power-domains or *-supply as required (instead of always requiring the power domains). Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221001031345.31293-6-sireeshkodali1@gmail.com --- .../devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml index 2ba2b6cf11fb..45eb42bd3c2c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml @@ -196,9 +196,13 @@ allOf: deprecated: true description: Deprecated for qcom,pronto-v1/2-pil - required: - - power-domains - - power-domain-names + oneOf: + - required: + - power-domains + - power-domain-names + - required: + - vddmx-supply + - vddcx-supply - if: properties: From c97c4b480fcba2e6ebfacb3990d8b9092916d986 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:23 +0100 Subject: [PATCH 12/69] dt-bindings: remoteproc: qcom,adsp: drop resets and qcom,halt-regs Some remote processors (e.g. QCS404 CDSP, SC7180 MPSS/MSS) can be brought to life using two different bindings: 1. PIL (Peripheral Image Loader) 2. PAS (Peripheral Authentication Service) They still describe the same hardware - firmware load for remote processor - but use different methods to communicate with that processor. For these SoCs, the qcom,adsp.yaml bindings were describing the PAS method, however for easier customization of board DTS, the bindings combined additional properties from PIL: reset lines, qcom,halt-regs and additional clocks. The devices and Linux kernel drivers, when instantiated as PAS, do not use these properties, so drop them from the bindings. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-6-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 113 +----------------- 1 file changed, 4 insertions(+), 109 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index c1d9cbc359b4..308ff0947f81 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -61,11 +61,11 @@ properties: clocks: minItems: 1 - maxItems: 8 + maxItems: 2 clock-names: minItems: 1 - maxItems: 8 + maxItems: 2 interconnects: maxItems: 1 @@ -90,14 +90,6 @@ properties: - const: stop-ack - const: shutdown-ack - resets: - minItems: 1 - maxItems: 3 - - reset-names: - minItems: 1 - maxItems: 3 - cx-supply: description: Phandle to the CX regulator @@ -135,18 +127,6 @@ properties: items: - const: stop - qcom,halt-regs: - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - - items: - - description: Phandle reference to a syscon representing TCSR - - description: offsets within syscon for q6 halt registers - - description: offsets within syscon for modem halt registers - - description: offsets within syscon for nc halt registers - description: - Phandle reference to a syscon representing TCSR followed by the - three offsets within syscon for q6, modem and nc halt registers. - smd-edge: $ref: /schemas/remoteproc/qcom,smd-edge.yaml# description: @@ -184,7 +164,9 @@ allOf: - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,qcs404-adsp-pas + - qcom,qcs404-cdsp-pas - qcom,qcs404-wcss-pas + - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas @@ -238,60 +220,6 @@ allOf: - const: xo - const: aggre2 - - if: - properties: - compatible: - contains: - enum: - - qcom,qcs404-cdsp-pas - then: - properties: - clocks: - items: - - description: XO clock - - description: SWAY clock - - description: TBU clock - - description: BIMC clock - - description: AHB AON clock - - description: Q6SS SLAVE clock - - description: Q6SS MASTER clock - - description: Q6 AXIM clock - clock-names: - items: - - const: xo - - const: sway - - const: tbu - - const: bimc - - const: ahb_aon - - const: q6ss_slave - - const: q6ss_master - - const: q6_axim - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - then: - properties: - clocks: - items: - - description: XO clock - - description: IFACE clock - - description: BUS clock - - description: NAC clock - - description: SNOC AXI clock - - description: MNOC AXI clock - clock-names: - items: - - const: xo - - const: iface - - const: bus - - const: nav - - const: snoc_axi - - const: mnoc_axi - - if: properties: compatible: @@ -520,39 +448,6 @@ allOf: items: - const: nsp - - if: - properties: - compatible: - contains: - enum: - - qcom,qcs404-cdsp-pas - then: - properties: - resets: - items: - - description: CDSP restart - reset-names: - items: - - const: restart - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - then: - properties: - resets: - items: - - description: MSS restart - - description: PDC reset - reset-names: - items: - - const: mss_restart - - const: pdc_reset - - if: properties: compatible: From ea5a10ae295425c9f52577d91b2e45290291d242 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:24 +0100 Subject: [PATCH 13/69] dt-bindings: remoteproc: qcom,adsp: split common part Split common part of Qualcomm SoC Peripheral Authentication Service bindings into a re-usable schema file. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-7-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 81 +--------------- .../bindings/remoteproc/qcom,pas-common.yaml | 97 +++++++++++++++++++ 2 files changed, 99 insertions(+), 79 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 308ff0947f81..76ecb70e0412 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -59,100 +59,23 @@ properties: reg: maxItems: 1 - clocks: - minItems: 1 - maxItems: 2 - - clock-names: - minItems: 1 - maxItems: 2 - - interconnects: - maxItems: 1 - - interrupts: - minItems: 5 - items: - - description: Watchdog interrupt - - description: Fatal interrupt - - description: Ready interrupt - - description: Handover interrupt - - description: Stop acknowledge interrupt - - description: Shutdown acknowledge interrupt - - interrupt-names: - minItems: 5 - items: - - const: wdog - - const: fatal - - const: ready - - const: handover - - const: stop-ack - - const: shutdown-ack - cx-supply: description: Phandle to the CX regulator px-supply: description: Phandle to the PX regulator - power-domains: - minItems: 1 - maxItems: 3 - - power-domain-names: - minItems: 1 - maxItems: 3 - - firmware-name: - $ref: /schemas/types.yaml#/definitions/string - description: Firmware name for the Hexagon core - - memory-region: - maxItems: 1 - description: Reference to the reserved-memory for the Hexagon core - qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. - qcom,smem-states: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: States used by the AP to signal the Hexagon core - items: - - description: Stop the modem - - qcom,smem-state-names: - description: The names of the state bits used for SMP2P output - items: - - const: stop - - smd-edge: - $ref: /schemas/remoteproc/qcom,smd-edge.yaml# - description: - Qualcomm Shared Memory subnode which represents communication edge, - channels and devices related to the ADSP. - unevaluatedProperties: false - - glink-edge: - $ref: /schemas/remoteproc/qcom,glink-edge.yaml# - description: - Qualcomm G-Link subnode which represents communication edge, channels - and devices related to the ADSP. - required: - compatible - - clocks - - clock-names - - interrupts - - interrupt-names - - memory-region - - qcom,smem-states - - qcom,smem-state-names -additionalProperties: false +unevaluatedProperties: false allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml new file mode 100644 index 000000000000..1d5e01c8d8bc --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Peripheral Authentication Service Common Properties + +maintainers: + - Manivannan Sadhasivam + +description: + Common properties of Qualcomm SoCs Peripheral Authentication Service. + +properties: + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + + interconnects: + maxItems: 1 + + interrupts: + minItems: 5 + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + minItems: 5 + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + power-domains: + minItems: 1 + maxItems: 3 + + power-domain-names: + minItems: 1 + maxItems: 3 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + items: + - const: stop + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the ADSP. + unevaluatedProperties: false + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the ADSP. + unevaluatedProperties: false + +required: + - clocks + - clock-names + - interrupts + - interrupt-names + - memory-region + - qcom,smem-states + - qcom,smem-state-names + +additionalProperties: true From 4e8b39a4d38ebb192ebff977d8a961fd97e7ce5f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:25 +0100 Subject: [PATCH 14/69] dt-bindings: remoteproc: qcom,sm8350-pas: split into separate file Split SM8350 and SM8450 remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-8-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 48 ----- .../bindings/remoteproc/qcom,sm8350-pas.yaml | 174 ++++++++++++++++++ 2 files changed, 174 insertions(+), 48 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 76ecb70e0412..86c1c274b111 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -47,14 +47,6 @@ properties: - qcom,sm8250-adsp-pas - qcom,sm8250-cdsp-pas - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-mpss-pas - - qcom,sm8450-slpi-pas reg: maxItems: 1 @@ -109,14 +101,6 @@ allOf: - qcom,sm8250-adsp-pas - qcom,sm8250-cdsp-pas - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-slpi-pas - - qcom,sm8450-mpss-pas then: properties: clocks: @@ -172,12 +156,6 @@ allOf: - qcom,sm8250-adsp-pas - qcom,sm8250-cdsp-pas - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-cdsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-cdsp-pas - - qcom,sm8450-slpi-pas then: properties: interrupts: @@ -196,8 +174,6 @@ allOf: - qcom,sdx55-mpss-pas - qcom,sm6350-mpss-pas - qcom,sm8150-mpss-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-mpss-pas then: properties: interrupts: @@ -297,8 +273,6 @@ allOf: - qcom,sdx55-mpss-pas - qcom,sm6350-mpss-pas - qcom,sm8150-mpss-pas - - qcom,sm8350-mpss-pas - - qcom,sm8450-mpss-pas then: properties: power-domains: @@ -322,10 +296,6 @@ allOf: - qcom,sm8150-slpi-pas - qcom,sm8250-adsp-pas - qcom,sm8250-slpi-pas - - qcom,sm8350-adsp-pas - - qcom,sm8350-slpi-pas - - qcom,sm8450-adsp-pas - - qcom,sm8450-slpi-pas then: properties: power-domains: @@ -337,24 +307,6 @@ allOf: - const: lcx - const: lmx - - if: - properties: - compatible: - contains: - enum: - - qcom,sm8350-cdsp-pas - - qcom,sm8450-cdsp-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MXC power domain - power-domain-names: - items: - - const: cx - - const: mxc - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml new file mode 100644 index 000000000000..853f97d6879f --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -0,0 +1,174 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8350/SM8450 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8350-mpss-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-mpss-pas + - qcom,sm8450-slpi-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-cdsp-pas + - qcom,sm8450-slpi-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm8350-mpss-pas + - qcom,sm8450-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + + - if: + properties: + compatible: + enum: + - qcom,sm8350-adsp-pas + - qcom,sm8350-slpi-pas + - qcom,sm8450-adsp-pas + - qcom,sm8450-slpi-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8350-cdsp-pas + - qcom,sm8450-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + remoteproc@30000000 { + compatible = "qcom,sm8450-adsp-pas"; + reg = <0x030000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sm8450/adsp.mbn"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>; + + power-domains = <&rpmhpd SM8450_LCX>, + <&rpmhpd SM8450_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; From db292776589f1fcbcf2fc6eaebe40a3a2abb4521 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:26 +0100 Subject: [PATCH 15/69] dt-bindings: remoteproc: qcom,sm8150-pas: split into separate file Split SM8150 and SM8250 remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-9-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 27 --- .../bindings/remoteproc/qcom,sm8150-pas.yaml | 166 ++++++++++++++++++ 2 files changed, 166 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 86c1c274b111..bed46bc4b005 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -40,13 +40,6 @@ properties: - qcom,sm6350-adsp-pas - qcom,sm6350-cdsp-pas - qcom,sm6350-mpss-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-mpss-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas reg: maxItems: 1 @@ -94,13 +87,6 @@ allOf: - qcom,sm6350-adsp-pas - qcom,sm6350-cdsp-pas - qcom,sm6350-mpss-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-mpss-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas then: properties: clocks: @@ -150,12 +136,6 @@ allOf: - qcom,sdm845-cdsp-pas - qcom,sm6350-adsp-pas - qcom,sm6350-cdsp-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-cdsp-pas - - qcom,sm8250-slpi-pas then: properties: interrupts: @@ -173,7 +153,6 @@ allOf: - qcom,sc8180x-mpss-pas - qcom,sdx55-mpss-pas - qcom,sm6350-mpss-pas - - qcom,sm8150-mpss-pas then: properties: interrupts: @@ -199,8 +178,6 @@ allOf: - qcom,msm8226-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8998-adsp-pas - - qcom,sm8150-adsp-pas - - qcom,sm8150-cdsp-pas then: properties: power-domains: @@ -272,7 +249,6 @@ allOf: - qcom,sc7280-mpss-pas - qcom,sdx55-mpss-pas - qcom,sm6350-mpss-pas - - qcom,sm8150-mpss-pas then: properties: power-domains: @@ -293,9 +269,6 @@ allOf: - qcom,sc8180x-cdsp-pas - qcom,sc8280xp-adsp-pas - qcom,sm6350-adsp-pas - - qcom,sm8150-slpi-pas - - qcom,sm8250-adsp-pas - - qcom,sm8250-slpi-pas then: properties: power-domains: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml new file mode 100644 index 000000000000..b934252cf02b --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml @@ -0,0 +1,166 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8150-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8150/SM8250 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM8150/SM8250 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-mpss-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8250-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + power-domain-names: + items: + - const: cx + + - if: + properties: + compatible: + enum: + - qcom,sm8150-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + + - if: + properties: + compatible: + enum: + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-slpi-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + remoteproc@17300000 { + compatible = "qcom,sm8150-adsp-pas"; + reg = <0x17300000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sm8150/adsp.mbn"; + + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>; + + power-domains = <&rpmhpd SM8150_CX>; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + label = "lpass"; + qcom,remote-pid = <2>; + mboxes = <&apss_shared 8>; + + /* ... */ + + }; + }; From 41729b772c13105ee126ee6fe1bf2cd93c7bd258 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:27 +0100 Subject: [PATCH 16/69] dt-bindings: remoteproc: qcom,sm6350-pas: split into separate file Split SM6350 remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-10-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 28 --- .../bindings/remoteproc/qcom,sm6350-pas.yaml | 159 ++++++++++++++++++ 2 files changed, 159 insertions(+), 28 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index bed46bc4b005..23e736d9c613 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -37,9 +37,6 @@ properties: - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - qcom,sdx55-mpss-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas - - qcom,sm6350-mpss-pas reg: maxItems: 1 @@ -84,9 +81,6 @@ allOf: - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas - - qcom,sm6350-mpss-pas then: properties: clocks: @@ -134,8 +128,6 @@ allOf: - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sm6350-adsp-pas - - qcom,sm6350-cdsp-pas then: properties: interrupts: @@ -152,7 +144,6 @@ allOf: - qcom,sc7280-mpss-pas - qcom,sc8180x-mpss-pas - qcom,sdx55-mpss-pas - - qcom,sm6350-mpss-pas then: properties: interrupts: @@ -224,23 +215,6 @@ allOf: - const: mx - const: mss - - if: - properties: - compatible: - contains: - enum: - - qcom,sm6350-cdsp-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MX power domain - power-domain-names: - items: - - const: cx - - const: mx - - if: properties: compatible: @@ -248,7 +222,6 @@ allOf: enum: - qcom,sc7280-mpss-pas - qcom,sdx55-mpss-pas - - qcom,sm6350-mpss-pas then: properties: power-domains: @@ -268,7 +241,6 @@ allOf: - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - qcom,sc8280xp-adsp-pas - - qcom,sm6350-adsp-pas then: properties: power-domains: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml new file mode 100644 index 000000000000..911529400142 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml @@ -0,0 +1,159 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6350 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + - qcom,sm6350-cdsp-pas + - qcom,sm6350-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + - qcom,sm6350-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm6350-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm6350-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MX power domain + power-domain-names: + items: + - const: cx + - const: mx + + - if: + properties: + compatible: + enum: + - qcom,sm6350-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MSS power domain + power-domain-names: + items: + - const: cx + - const: mss + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + remoteproc@3000000 { + compatible = "qcom,sm6350-adsp-pas"; + reg = <0x03000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmhpd SM6350_LCX>, + <&rpmhpd SM6350_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; From 397c619cad8109f5904466ee76d5a1533d2f1590 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:28 +0100 Subject: [PATCH 17/69] dt-bindings: remoteproc: qcom,sc8280xp-pas: split into separate file Split SC8280XP remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. While moving correctly constrain the number of interrupts per specific device. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-11-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 26 ---- .../remoteproc/qcom,sc8280xp-pas.yaml | 139 ++++++++++++++++++ 2 files changed, 139 insertions(+), 26 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 23e736d9c613..0f55d071adb5 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -30,9 +30,6 @@ properties: - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - qcom,sc8180x-mpss-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm660-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas @@ -76,9 +73,6 @@ allOf: - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - qcom,sc8180x-mpss-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -123,9 +117,6 @@ allOf: - qcom,qcs404-wcss-pas - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - - qcom,sc8280xp-adsp-pas - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -240,7 +231,6 @@ allOf: enum: - qcom,sc8180x-adsp-pas - qcom,sc8180x-cdsp-pas - - qcom,sc8280xp-adsp-pas then: properties: power-domains: @@ -252,22 +242,6 @@ allOf: - const: lcx - const: lmx - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8280xp-nsp0-pas - - qcom,sc8280xp-nsp1-pas - then: - properties: - power-domains: - items: - - description: NSP power domain - power-domain-names: - items: - - const: nsp - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml new file mode 100644 index 000000000000..c08274aaa6f8 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8280XP Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SC8280XP SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc8280xp-adsp-pas + - qcom,sc8280xp-nsp0-pas + - qcom,sc8280xp-nsp1-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc8280xp-nsp0-pas + - qcom,sc8280xp-nsp1-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sc8280xp-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + else: + properties: + power-domains: + items: + - description: NSP power domain + power-domain-names: + items: + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + remoteproc@3000000 { + compatible = "qcom,sc8280xp-adsp-pas"; + reg = <0x03000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + firmware-name = "qcom/sc8280xp/qcadsp8280.mbn"; + + interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", "shutdown-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmhpd SC8280XP_LCX>, + <&rpmhpd SC8280XP_LMX>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; From 4b4157518f1ab1276cd08dfab0e51b1409c22e40 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:29 +0100 Subject: [PATCH 18/69] dt-bindings: remoteproc: qcom,sc8180x-pas: split into separate file Split SC8180x remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. The binding is incomplete due to lack of upstreamed DTS - no example and not all power domains defined. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-12-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 27 ------ .../bindings/remoteproc/qcom,sc8180x-pas.yaml | 87 +++++++++++++++++++ 2 files changed, 87 insertions(+), 27 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 0f55d071adb5..c0478f84812c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -27,9 +27,6 @@ properties: - qcom,qcs404-wcss-pas - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8180x-mpss-pas - qcom,sdm660-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas @@ -70,9 +67,6 @@ allOf: - qcom,qcs404-wcss-pas - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - - qcom,sc8180x-mpss-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -115,8 +109,6 @@ allOf: - qcom,qcs404-adsp-pas - qcom,qcs404-cdsp-pas - qcom,qcs404-wcss-pas - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -133,7 +125,6 @@ allOf: enum: - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - - qcom,sc8180x-mpss-pas - qcom,sdx55-mpss-pas then: properties: @@ -224,24 +215,6 @@ allOf: - const: cx - const: mss - - if: - properties: - compatible: - contains: - enum: - - qcom,sc8180x-adsp-pas - - qcom,sc8180x-cdsp-pas - then: - properties: - power-domains: - items: - - description: LCX power domain - - description: LMX power domain - power-domain-names: - items: - - const: lcx - - const: lmx - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml new file mode 100644 index 000000000000..3026cfde5582 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc8180x-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC8180X Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + - qcom,sc8180x-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + else: + properties: + # TODO: incomplete + power-domains: false + power-domain-names: false + +unevaluatedProperties: false From b6f8410eab9270000b8b13b88bc038e9f27c2c45 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:30 +0100 Subject: [PATCH 19/69] dt-bindings: remoteproc: qcom,sdx55-pas: split into separate file Split SDX55 remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-13-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 4 - .../bindings/remoteproc/qcom,sdx55-pas.yaml | 101 ++++++++++++++++++ 2 files changed, 101 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index c0478f84812c..73edfe24a32f 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -30,7 +30,6 @@ properties: - qcom,sdm660-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas - - qcom,sdx55-mpss-pas reg: maxItems: 1 @@ -125,7 +124,6 @@ allOf: enum: - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - - qcom,sdx55-mpss-pas then: properties: interrupts: @@ -203,7 +201,6 @@ allOf: contains: enum: - qcom,sc7280-mpss-pas - - qcom,sdx55-mpss-pas then: properties: power-domains: @@ -230,7 +227,6 @@ allOf: - qcom,qcs404-cdsp-pas - qcom,qcs404-wcss-pas - qcom,sdm660-adsp-pas - - qcom,sdx55-mpss-pas then: properties: qcom,qmp: false diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml new file mode 100644 index 000000000000..cbeaa00ca4d4 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SDX55 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SDX55 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sdx55-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + power-domains: + items: + - description: CX power domain + - description: MSS power domain + + power-domain-names: + items: + - const: cx + - const: mss + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + remoteproc@4080000 { + compatible = "qcom,sdx55-mpss-pas"; + reg = <0x04080000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_adsp_mem>; + + power-domains = <&rpmhpd SDX55_CX>, <&rpmhpd SDX55_MSS>; + power-domain-names = "cx", "mss"; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + label = "mpss"; + mboxes = <&apcs 15>; + qcom,remote-pid = <1>; + + /* ... */ + }; + }; From 255d7a9581ed4506dddf993aad9dc27bff8296d1 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:31 +0100 Subject: [PATCH 20/69] dt-bindings: remoteproc: qcom,qcs404-pas: split into separate file Split QCS404 remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-14-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 12 --- .../bindings/remoteproc/qcom,qcs404-pas.yaml | 86 +++++++++++++++++++ 2 files changed, 86 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 73edfe24a32f..35b381d02cef 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -22,9 +22,6 @@ properties: - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - qcom,sdm660-adsp-pas @@ -61,9 +58,6 @@ allOf: - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - qcom,sc7180-mpss-pas - qcom,sc7280-mpss-pas - qcom,sdm845-adsp-pas @@ -105,9 +99,6 @@ allOf: - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -223,9 +214,6 @@ allOf: - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,qcs404-adsp-pas - - qcom,qcs404-cdsp-pas - - qcom,qcs404-wcss-pas - qcom,sdm660-adsp-pas then: properties: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml new file mode 100644 index 000000000000..007349ef51ed --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QCS404 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,qcs404-adsp-pas + - qcom,qcs404-cdsp-pas + - qcom,qcs404-wcss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + maxItems: 5 + + interrupt-names: + maxItems: 5 + + power-domains: false + power-domain-names: false + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + + remoteproc@c700000 { + compatible = "qcom,qcs404-adsp-pas"; + reg = <0x0c700000 0x4040>; + + clocks = <&xo_board>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_fw_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + + qcom,remote-pid = <2>; + mboxes = <&apcs_glb 8>; + + label = "adsp"; + }; + }; From 8bb92d6fd0b3788b4270eff547cb42cb64db1bff Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:32 +0100 Subject: [PATCH 21/69] dt-bindings: remoteproc: qcom,sc7180-pas: split into separate file Split SC7180 and SC7280remote processor Peripheral Authentication Service bindings into their own file to reduce complexity and make maintenance easier. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-15-krzysztof.kozlowski@linaro.org --- .../bindings/remoteproc/qcom,adsp.yaml | 54 -------- .../bindings/remoteproc/qcom,sc7180-pas.yaml | 125 ++++++++++++++++++ 2 files changed, 125 insertions(+), 54 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 35b381d02cef..1068aa3a4be6 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -22,8 +22,6 @@ properties: - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,msm8998-slpi-pas - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - qcom,sdm660-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas @@ -58,8 +56,6 @@ allOf: - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas then: @@ -108,20 +104,6 @@ allOf: interrupt-names: maxItems: 5 - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - - qcom,sc7280-mpss-pas - then: - properties: - interrupts: - minItems: 6 - interrupt-names: - minItems: 6 - - if: properties: compatible: @@ -167,42 +149,6 @@ allOf: required: - px-supply - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7180-mpss-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MX power domain - - description: MSS power domain - power-domain-names: - items: - - const: cx - - const: mx - - const: mss - - - if: - properties: - compatible: - contains: - enum: - - qcom,sc7280-mpss-pas - then: - properties: - power-domains: - items: - - description: CX power domain - - description: MSS power domain - power-domain-names: - items: - - const: cx - - const: mss - - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml new file mode 100644 index 000000000000..6fd768609a66 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7180/SC7280 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SC7180/SC7280 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sc7180-mpss-pas + - qcom,sc7280-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + interrupts: + minItems: 6 + + interrupt-names: + minItems: 6 + + power-domains: + minItems: 2 + items: + - description: CX power domain + - description: MX power domain + - description: MSS power domain + + power-domain-names: + minItems: 2 + items: + - const: cx + - const: mx + - const: mss + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sc7180-mpss-pas + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + else: + properties: + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + remoteproc@4080000 { + compatible = "qcom,sc7180-mpss-pas"; + reg = <0x04080000 0x4040>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_mem>; + + power-domains = <&rpmhpd SC7180_CX>, + <&rpmhpd SC7180_MX>, + <&rpmhpd SC7180_MSS>; + power-domain-names = "cx", "mx", "mss"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + label = "modem"; + qcom,remote-pid = <1>; + mboxes = <&apss_shared 12>; + }; + }; From 569d3a7580bcbc463920b0d84ca5caf23e808f90 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Nov 2022 19:43:33 +0100 Subject: [PATCH 22/69] dt-bindings: remoteproc: qcom,adsp: correct msm8996-slpi-pil clocks According to DTS and Linux driver, the MSM8996 SLPI PIL takes two clocks - xo and aggre2: qcom/msm8996-oneplus3t.dtb: remoteproc@1c00000: clocks: [[20], [3, 64]] is too long qcom/msm8996-oneplus3t.dtb: remoteproc@1c00000: clock-names: ['xo', 'aggre2'] is too long Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221124184333.133911-16-krzysztof.kozlowski@linaro.org --- Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index 1068aa3a4be6..d9bac3c6dc62 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -54,7 +54,6 @@ allOf: - qcom,msm8226-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - - qcom,msm8996-slpi-pil - qcom,msm8998-adsp-pas - qcom,sdm845-adsp-pas - qcom,sdm845-cdsp-pas @@ -72,6 +71,7 @@ allOf: compatible: contains: enum: + - qcom,msm8996-slpi-pil - qcom,msm8998-slpi-pas then: properties: From 6d967a5a49e8d08d8e4430aadba8d3c903b794a5 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Mon, 18 Jul 2022 15:15:14 +0300 Subject: [PATCH 23/69] remoteproc: qcom: q6v5: Use _clk_get_optional for aggre2_clk Only msm8996 and msm8998 SLPIs need the RPM_SMD_AGGR2_NOC_CLK (as aggre2 clock). None of the other platforms do. Back when the support for the mentioned platforms was added to the q6v5 pass driver, the devm_clk_get_optional was not available, so the has_aggre2_clk was necessary in order to differentiate between plaforms that need this clock and those which do not. Now that devm_clk_get_optional is available, we can drop the has_aggre2_clk. This makes the adsp_data more cleaner and removes the check within adsp_init_clocks. Signed-off-by: Abel Vesa Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220718121514.2451590-1-abel.vesa@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 42 +++++------------------------- 1 file changed, 7 insertions(+), 35 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index dc6f07ca8341..533cee25b18e 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -37,7 +37,6 @@ struct adsp_data { const char *firmware_name; int pas_id; unsigned int minidump_id; - bool has_aggre2_clk; bool auto_boot; bool decrypt_shutdown; @@ -68,7 +67,6 @@ struct qcom_adsp { int pas_id; unsigned int minidump_id; int crash_reason_smem; - bool has_aggre2_clk; bool decrypt_shutdown; const char *info_name; @@ -345,15 +343,13 @@ static int adsp_init_clock(struct qcom_adsp *adsp) return ret; } - if (adsp->has_aggre2_clk) { - adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2"); - if (IS_ERR(adsp->aggre2_clk)) { - ret = PTR_ERR(adsp->aggre2_clk); - if (ret != -EPROBE_DEFER) - dev_err(adsp->dev, - "failed to get aggre2 clock"); - return ret; - } + adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2"); + if (IS_ERR(adsp->aggre2_clk)) { + ret = PTR_ERR(adsp->aggre2_clk); + if (ret != -EPROBE_DEFER) + dev_err(adsp->dev, + "failed to get aggre2 clock"); + return ret; } return 0; @@ -505,7 +501,6 @@ static int adsp_probe(struct platform_device *pdev) adsp->rproc = rproc; adsp->minidump_id = desc->minidump_id; adsp->pas_id = desc->pas_id; - adsp->has_aggre2_clk = desc->has_aggre2_clk; adsp->info_name = desc->sysmon_name; adsp->decrypt_shutdown = desc->decrypt_shutdown; platform_set_drvdata(pdev, adsp); @@ -585,7 +580,6 @@ static const struct adsp_data adsp_resource_init = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .ssr_name = "lpass", .sysmon_name = "adsp", @@ -596,7 +590,6 @@ static const struct adsp_data sdm845_adsp_resource_init = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .load_state = "adsp", .ssr_name = "lpass", @@ -608,7 +601,6 @@ static const struct adsp_data sm6350_adsp_resource = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -625,7 +617,6 @@ static const struct adsp_data sm8150_adsp_resource = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -641,7 +632,6 @@ static const struct adsp_data sm8250_adsp_resource = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -658,7 +648,6 @@ static const struct adsp_data sm8350_adsp_resource = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -675,7 +664,6 @@ static const struct adsp_data msm8996_adsp_resource = { .crash_reason_smem = 423, .firmware_name = "adsp.mdt", .pas_id = 1, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -690,7 +678,6 @@ static const struct adsp_data cdsp_resource_init = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .ssr_name = "cdsp", .sysmon_name = "cdsp", @@ -701,7 +688,6 @@ static const struct adsp_data sdm845_cdsp_resource_init = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .load_state = "cdsp", .ssr_name = "cdsp", @@ -713,7 +699,6 @@ static const struct adsp_data sm6350_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -730,7 +715,6 @@ static const struct adsp_data sm8150_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -746,7 +730,6 @@ static const struct adsp_data sm8250_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -762,7 +745,6 @@ static const struct adsp_data sc8280xp_nsp0_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "nsp", @@ -777,7 +759,6 @@ static const struct adsp_data sc8280xp_nsp1_resource = { .crash_reason_smem = 633, .firmware_name = "cdsp.mdt", .pas_id = 30, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "nsp", @@ -792,7 +773,6 @@ static const struct adsp_data sm8350_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", .pas_id = 18, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -810,7 +790,6 @@ static const struct adsp_data mpss_resource_init = { .firmware_name = "modem.mdt", .pas_id = 4, .minidump_id = 3, - .has_aggre2_clk = false, .auto_boot = false, .proxy_pd_names = (char*[]){ "cx", @@ -827,7 +806,6 @@ static const struct adsp_data sc8180x_mpss_resource = { .crash_reason_smem = 421, .firmware_name = "modem.mdt", .pas_id = 4, - .has_aggre2_clk = false, .auto_boot = false, .proxy_pd_names = (char*[]){ "cx", @@ -843,7 +821,6 @@ static const struct adsp_data slpi_resource_init = { .crash_reason_smem = 424, .firmware_name = "slpi.mdt", .pas_id = 12, - .has_aggre2_clk = true, .auto_boot = true, .proxy_pd_names = (char*[]){ "ssc_cx", @@ -858,7 +835,6 @@ static const struct adsp_data sm8150_slpi_resource = { .crash_reason_smem = 424, .firmware_name = "slpi.mdt", .pas_id = 12, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -875,7 +851,6 @@ static const struct adsp_data sm8250_slpi_resource = { .crash_reason_smem = 424, .firmware_name = "slpi.mdt", .pas_id = 12, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -892,7 +867,6 @@ static const struct adsp_data sm8350_slpi_resource = { .crash_reason_smem = 424, .firmware_name = "slpi.mdt", .pas_id = 12, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", @@ -919,7 +893,6 @@ static const struct adsp_data sdx55_mpss_resource = { .crash_reason_smem = 421, .firmware_name = "modem.mdt", .pas_id = 4, - .has_aggre2_clk = false, .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", @@ -936,7 +909,6 @@ static const struct adsp_data sm8450_mpss_resource = { .firmware_name = "modem.mdt", .pas_id = 4, .minidump_id = 3, - .has_aggre2_clk = false, .auto_boot = false, .decrypt_shutdown = true, .proxy_pd_names = (char*[]){ From 1b0f00d3b1fc25525e1fcd8c5845e362f5688849 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Thu, 18 Aug 2022 23:00:59 +0200 Subject: [PATCH 24/69] remoteproc: move from strlcpy with unused retval to strscpy Follow the advice of the below link and prefer 'strscpy' in this subsystem. Conversion is 1:1 because the return value is not used. Generated by a coccinelle script. Link: https://lore.kernel.org/r/CAHk-=wgfRnXz0W3D37d01q3JFkr_i_uTL=V6A6G1oUZcprmknw@mail.gmail.com/ Signed-off-by: Wolfram Sang Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220818210059.7253-1-wsa+renesas@sang-engineering.com --- drivers/remoteproc/qcom_sysmon.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_sysmon.c b/drivers/remoteproc/qcom_sysmon.c index 85393d5eb005..746f56b4bafb 100644 --- a/drivers/remoteproc/qcom_sysmon.c +++ b/drivers/remoteproc/qcom_sysmon.c @@ -388,7 +388,7 @@ static void ssctl_send_event(struct qcom_sysmon *sysmon, } memset(&req, 0, sizeof(req)); - strlcpy(req.subsys_name, event->subsys_name, sizeof(req.subsys_name)); + strscpy(req.subsys_name, event->subsys_name, sizeof(req.subsys_name)); req.subsys_name_len = strlen(req.subsys_name); req.event = event->ssr_event; req.evt_driven_valid = true; From b27aa4d87809b3d7ac5b792dd059108283044e3b Mon Sep 17 00:00:00 2001 From: Gaosheng Cui Date: Sun, 11 Sep 2022 17:06:37 +0800 Subject: [PATCH 25/69] remoteproc: qcom: wcnss: remove unused qcom_iris_driver declaration qcom_iris_driver has been removed since commit 1fcef985c8bd ("remoteproc: qcom: wcnss: Fix race with iris probe"), so remove it. Signed-off-by: Gaosheng Cui Reviewed-by: Mukesh Ojha Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220911090637.3208939-1-cuigaosheng1@huawei.com --- drivers/remoteproc/qcom_wcnss.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/remoteproc/qcom_wcnss.h b/drivers/remoteproc/qcom_wcnss.h index 6d01ee6afa7f..cb4ce543e68f 100644 --- a/drivers/remoteproc/qcom_wcnss.h +++ b/drivers/remoteproc/qcom_wcnss.h @@ -5,8 +5,6 @@ struct qcom_iris; struct qcom_wcnss; -extern struct platform_driver qcom_iris_driver; - struct wcnss_vreg_info { const char * const name; int min_voltage; From 3cc889eb83f59b5a6a869a685da11f79ffbb4e4d Mon Sep 17 00:00:00 2001 From: Gokul krishna Krishnakumar Date: Mon, 19 Sep 2022 09:00:40 -0700 Subject: [PATCH 26/69] remoteproc: qcom: q6v5: Avoid setting smem bit in case of crash shutdown Avoid setting smem bit in case of crash shutdown, as remote processor is not able to send the ack back. Signed-off-by: Gokul krishna Krishnakumar [bjorn: Rewrote the comment] Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/9e549a54e2a6ede3e413de933fd1725c660993c3.1662995608.git.quic_gokukris@quicinc.com --- drivers/remoteproc/qcom_q6v5.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c index 497acfb33f8f..192c7aa0e39e 100644 --- a/drivers/remoteproc/qcom_q6v5.c +++ b/drivers/remoteproc/qcom_q6v5.c @@ -205,8 +205,8 @@ int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon) q6v5->running = false; - /* Don't perform SMP2P dance if sysmon already shut down the remote */ - if (qcom_sysmon_shutdown_acked(sysmon)) + /* Don't perform SMP2P dance if remote isn't running */ + if (q6v5->rproc->state != RPROC_RUNNING || qcom_sysmon_shutdown_acked(sysmon)) return 0; qcom_smem_state_update_bits(q6v5->state, From 8490a99586abd480d7139893f78c019790a58979 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:47 +0530 Subject: [PATCH 27/69] dt-bindings: remoteproc: qcom: Add SC7280 ADSP support Add ADSP PIL loading support for SC7280 SoCs. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Rob Herring Reviewed-by: Stephen Boyd Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-2-git-send-email-quic_srivasam@quicinc.com --- .../remoteproc/qcom,sc7280-adsp-pil.yaml | 195 ++++++++++++++++++ 1 file changed, 195 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml new file mode 100644 index 000000000000..94ca7a0cc203 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml @@ -0,0 +1,195 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SC7280 ADSP Peripheral Image Loader + +maintainers: + - Srinivasa Rao Mandadapu + +description: + This document describes the hardware for a component that loads and boots firmware + on the Qualcomm Technology Inc. ADSP. + +properties: + compatible: + enum: + - qcom,sc7280-adsp-pil + + reg: + items: + - description: qdsp6ss register + - description: efuse q6ss register + + iommus: + items: + - description: Phandle to apps_smmu node with sid mask + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + clocks: + items: + - description: XO clock + - description: GCC CFG NOC LPASS clock + + clock-names: + items: + - const: xo + - const: gcc_cfg_noc_lpass + + power-domains: + items: + - description: LCX power domain + + resets: + items: + - description: PDC AUDIO SYNC RESET + - description: CC LPASS restart + + reset-names: + items: + - const: pdc_sync + - const: cc_lpass + + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle reference to a syscon representing TCSR followed by the + four offsets within syscon for q6, modem, nc and qv6 halt registers. + items: + - items: + - description: phandle to TCSR_MUTEX registers + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + - description: offset to the vq6 halt register + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop the modem + + qcom,smem-state-names: + description: The names of the state bits used for SMP2P output + const: stop + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + glink-edge: + $ref: qcom,glink-edge.yaml# + type: object + unevaluatedProperties: false + description: | + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the ADSP. + + properties: + label: + const: lpass + + gpr: true + apr: false + fastrpc: false + + required: + - label + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + - reset-names + - qcom,halt-regs + - memory-region + - qcom,smem-states + - qcom,smem-state-names + - qcom,qmp + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + #include + #include + + remoteproc@3000000 { + compatible = "qcom,sc7280-adsp-pil"; + reg = <0x03000000 0x5000>, + <0x0355b000 0x10>; + + interrupts-extended = <&pdc 162 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack", "shutdown-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CFG_NOC_LPASS_CLK>; + clock-names = "xo", "gcc_cfg_noc_lpass"; + + power-domains = <&rpmhpd SC7280_LCX>; + + resets = <&pdc_reset PDC_AUDIO_SYNC_RESET>, + <&aoss_reset AOSS_CC_LPASS_RESTART>; + reset-names = "pdc_sync", "cc_lpass"; + + qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; + + memory-region = <&adsp_mem>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + qcom,qmp = <&aoss_qmp>; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + }; + }; From 272dca8d14c46d03c633756d150b1c48c1dcb594 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:48 +0530 Subject: [PATCH 28/69] remoteproc: qcom: Add flag in adsp private data structure Add flag in qcom_adsp private data structure and initialize it to distinguish ADSP modules, which has iommu requirement, for using iommu selectively. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-3-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 4c9a1b99cd51..fe385e8ef6d8 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -62,6 +62,7 @@ struct adsp_pil_data { const char *sysmon_name; int ssctl_id; bool is_wpss; + bool has_iommu; bool auto_boot; const char **clk_ids; @@ -99,6 +100,7 @@ struct qcom_adsp { phys_addr_t mem_reloc; void *mem_region; size_t mem_size; + bool has_iommu; struct device *proxy_pds[QCOM_Q6V5_RPROC_PROXY_PD_MAX]; size_t proxy_pd_count; @@ -595,12 +597,15 @@ static int adsp_probe(struct platform_device *pdev) } rproc->auto_boot = desc->auto_boot; + rproc->has_iommu = desc->has_iommu; rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE); adsp = (struct qcom_adsp *)rproc->priv; adsp->dev = &pdev->dev; adsp->rproc = rproc; adsp->info_name = desc->sysmon_name; + adsp->has_iommu = desc->has_iommu; + platform_set_drvdata(pdev, adsp); if (desc->is_wpss) From 66cab0c5c3f9dae0213b9d02af03791b75565986 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:49 +0530 Subject: [PATCH 29/69] remoteproc: qcom: Add compatible name for SC7280 ADSP Update adsp pil data and compatible name for loading ADSP binary on SC7280 based platforms. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-4-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index fe385e8ef6d8..14a38649be71 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -701,6 +701,21 @@ static const struct adsp_pil_data adsp_resource_init = { }, }; +static const struct adsp_pil_data adsp_sc7280_resource_init = { + .crash_reason_smem = 423, + .firmware_name = "adsp.pbn", + .load_state = "adsp", + .ssr_name = "lpass", + .sysmon_name = "adsp", + .ssctl_id = 0x14, + .has_iommu = true, + .auto_boot = true, + .clk_ids = (const char*[]) { + "gcc_cfg_noc_lpass", NULL + }, + .num_clks = 1, +}; + static const struct adsp_pil_data cdsp_resource_init = { .crash_reason_smem = 601, .firmware_name = "cdsp.mdt", @@ -739,6 +754,7 @@ static const struct adsp_pil_data wpss_resource_init = { static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,qcs404-cdsp-pil", .data = &cdsp_resource_init }, + { .compatible = "qcom,sc7280-adsp-pil", .data = &adsp_sc7280_resource_init }, { .compatible = "qcom,sc7280-wpss-pil", .data = &wpss_resource_init }, { .compatible = "qcom,sdm845-adsp-pil", .data = &adsp_resource_init }, { }, From 48ab209c6f5f84a5adcd68e150dc0f614c8bfba7 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:50 +0530 Subject: [PATCH 30/69] remoteproc: qcom: Update rproc parse firmware callback Change parse_fw callback in rproc ops from qcom_register_dump_segments to local function such that, it can perform coredump segments registration and it can parse section header in memory sandboxing required platforms. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-5-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 14a38649be71..b8cbbf7370c0 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -439,6 +439,27 @@ static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iom return adsp->mem_region + offset; } +static int adsp_parse_firmware(struct rproc *rproc, const struct firmware *fw) +{ + struct qcom_adsp *adsp = rproc->priv; + int ret; + + ret = qcom_register_dump_segments(rproc, fw); + if (ret) { + dev_err(&rproc->dev, "Error in registering dump segments\n"); + return ret; + } + + if (adsp->has_iommu) { + ret = rproc_elf_load_rsc_table(rproc, fw); + if (ret) { + dev_err(&rproc->dev, "Error in loading resource table\n"); + return ret; + } + } + return 0; +} + static unsigned long adsp_panic(struct rproc *rproc) { struct qcom_adsp *adsp = rproc->priv; @@ -450,7 +471,7 @@ static const struct rproc_ops adsp_ops = { .start = adsp_start, .stop = adsp_stop, .da_to_va = adsp_da_to_va, - .parse_fw = qcom_register_dump_segments, + .parse_fw = adsp_parse_firmware, .load = adsp_load, .panic = adsp_panic, }; From c36d6aa67932788ec04820ba65693ccd41b1042f Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:51 +0530 Subject: [PATCH 31/69] remoteproc: qcom: Replace hard coded values with macros Replace hard coded values of QDSP6 boot control reg params with appropriate macro names. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-6-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index b8cbbf7370c0..14c94af761d2 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -54,6 +54,9 @@ #define QCOM_Q6V5_RPROC_PROXY_PD_MAX 3 +#define LPASS_BOOT_CORE_START BIT(0) +#define LPASS_BOOT_CMD_START BIT(0) + struct adsp_pil_data { int crash_reason_smem; const char *firmware_name; @@ -365,10 +368,10 @@ static int adsp_start(struct rproc *rproc) writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ - writel(0x1, adsp->qdsp6ss_base + CORE_START_REG); + writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); /* Trigger boot FSM to start QDSP6 */ - writel(0x1, adsp->qdsp6ss_base + BOOT_CMD_REG); + writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); /* Wait for core to come out of reset */ ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, From 9ece961916631aab81b9d9f8d9c2770d05548662 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:52 +0530 Subject: [PATCH 32/69] remoteproc: qcom: Add efuse evb selection control Add efuse evb selection control and enable it for starting ADSP. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd Reviewed-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-7-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 14c94af761d2..4e70e769ad8d 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -56,6 +56,7 @@ #define LPASS_BOOT_CORE_START BIT(0) #define LPASS_BOOT_CMD_START BIT(0) +#define LPASS_EFUSE_Q6SS_EVB_SEL 0x0 struct adsp_pil_data { int crash_reason_smem; @@ -86,6 +87,7 @@ struct qcom_adsp { struct clk_bulk_data *clks; void __iomem *qdsp6ss_base; + void __iomem *lpass_efuse; struct reset_control *pdc_sync_reset; struct reset_control *restart; @@ -367,6 +369,9 @@ static int adsp_start(struct rproc *rproc) /* Program boot address */ writel(adsp->mem_phys >> 4, adsp->qdsp6ss_base + RST_EVB_REG); + if (adsp->lpass_efuse) + writel(LPASS_EFUSE_Q6SS_EVB_SEL, adsp->lpass_efuse); + /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); @@ -533,6 +538,7 @@ static int adsp_init_reset(struct qcom_adsp *adsp) static int adsp_init_mmio(struct qcom_adsp *adsp, struct platform_device *pdev) { + struct resource *efuse_region; struct device_node *syscon; int ret; @@ -542,6 +548,17 @@ static int adsp_init_mmio(struct qcom_adsp *adsp, return PTR_ERR(adsp->qdsp6ss_base); } + efuse_region = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!efuse_region) { + adsp->lpass_efuse = NULL; + dev_dbg(adsp->dev, "failed to get efuse memory region\n"); + } else { + adsp->lpass_efuse = devm_ioremap_resource(&pdev->dev, efuse_region); + if (IS_ERR(adsp->lpass_efuse)) { + dev_err(adsp->dev, "failed to map efuse registers\n"); + return PTR_ERR(adsp->lpass_efuse); + } + } syscon = of_parse_phandle(pdev->dev.of_node, "qcom,halt-regs", 0); if (!syscon) { dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); From f22eedff28aff912bde7f8deabebd121cb64fae3 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Wed, 28 Sep 2022 17:57:53 +0530 Subject: [PATCH 33/69] remoteproc: qcom: Add support for memory sandbox Update pil driver with SMMU mapping for allowing authorised memory access to ADSP firmware, by carveout reserved adsp memory region from device tree file. Signed-off-by: Srinivasa Rao Mandadapu Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1664368073-13659-8-git-send-email-quic_srivasam@quicinc.com --- drivers/remoteproc/qcom_q6v5_adsp.c | 56 ++++++++++++++++++++++++++++- 1 file changed, 55 insertions(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 4e70e769ad8d..2dc850f48f00 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,8 @@ #define LPASS_PWR_ON_REG 0x10 #define LPASS_HALTREQ_REG 0x0 +#define SID_MASK_DEFAULT 0xF + #define QDSP6SS_XO_CBCR 0x38 #define QDSP6SS_CORE_CBCR 0x20 #define QDSP6SS_SLEEP_CBCR 0x3c @@ -332,6 +335,47 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) return 0; } +static void adsp_unmap_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp = rproc->priv; + + if (adsp->has_iommu) + iommu_unmap(rproc->domain, adsp->mem_phys, adsp->mem_size); +} + +static int adsp_map_carveout(struct rproc *rproc) +{ + struct qcom_adsp *adsp = rproc->priv; + struct of_phandle_args args; + long long sid; + unsigned long iova; + int ret; + + if (!adsp->has_iommu) + return 0; + + if (!rproc->domain) + return -EINVAL; + + ret = of_parse_phandle_with_args(adsp->dev->of_node, "iommus", "#iommu-cells", 0, &args); + if (ret < 0) + return ret; + + sid = args.args[0] & SID_MASK_DEFAULT; + + /* Add SID configuration for ADSP Firmware to SMMU */ + iova = adsp->mem_phys | (sid << 32); + + ret = iommu_map(rproc->domain, iova, adsp->mem_phys, + adsp->mem_size, IOMMU_READ | IOMMU_WRITE); + if (ret) { + dev_err(adsp->dev, "Unable to map ADSP Physical Memory\n"); + return ret; + } + + return 0; +} + static int adsp_start(struct rproc *rproc) { struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; @@ -342,9 +386,15 @@ static int adsp_start(struct rproc *rproc) if (ret) return ret; + ret = adsp_map_carveout(rproc); + if (ret) { + dev_err(adsp->dev, "ADSP smmu mapping failed\n"); + goto disable_irqs; + } + ret = clk_prepare_enable(adsp->xo); if (ret) - goto disable_irqs; + goto adsp_smmu_unmap; ret = qcom_rproc_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); @@ -400,6 +450,8 @@ disable_power_domain: qcom_rproc_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); disable_xo_clk: clk_disable_unprepare(adsp->xo); +adsp_smmu_unmap: + adsp_unmap_carveout(rproc); disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); @@ -428,6 +480,8 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); + adsp_unmap_carveout(rproc); + handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_adsp_pil_handover(&adsp->q6v5); From 1cfaa13b82c73977e8ddaca63c791203addc39c1 Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Thu, 13 Oct 2022 09:57:48 +0530 Subject: [PATCH 34/69] remoteproc: qcom: pas: Add MSM8953 ADSP PIL support Add support for the Audio DSP PIL found on the Qualcomm MSM8953 platform. The same configuration is used on all SoCs based on the MSM8953 platform (SDM450, SDA450, SDM625, SDM632, APQ8053). Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Reviewed-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013042749.104668-2-sireeshkodali1@gmail.com --- drivers/remoteproc/qcom_q6v5_pas.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 533cee25b18e..6cebe8ae550e 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -924,6 +924,7 @@ static const struct adsp_data sm8450_mpss_resource = { static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init}, + { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource}, { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, { .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource}, { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init}, From 4a0510a46c4447ad3e807a1e4d6cf195fd604c1d Mon Sep 17 00:00:00 2001 From: Sireesh Kodali Date: Thu, 13 Oct 2022 09:57:49 +0530 Subject: [PATCH 35/69] dt-bindings: remoteproc: qcom: adsp: Add ADSP on MSM8953 Add support for booting the Audio DSP on the MSM8953 platform. This is used by SoCs like SDM450, SDM625, SDM626, APQ8053, etc. Since the configuration is the same on all SoCs, a single compatible string is used. Signed-off-by: Sireesh Kodali Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221013042749.104668-3-sireeshkodali1@gmail.com --- Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index d9bac3c6dc62..d3bfc0f472a9 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -17,6 +17,7 @@ properties: compatible: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil @@ -52,6 +53,7 @@ allOf: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8998-adsp-pas @@ -90,6 +92,7 @@ allOf: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil @@ -120,6 +123,7 @@ allOf: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8998-adsp-pas then: @@ -155,6 +159,7 @@ allOf: contains: enum: - qcom,msm8226-adsp-pil + - qcom,msm8953-adsp-pil - qcom,msm8974-adsp-pil - qcom,msm8996-adsp-pil - qcom,msm8996-slpi-pil From cf5865e72236c239317d6c5829ab170419b400a4 Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Wed, 14 Dec 2022 19:06:23 +0530 Subject: [PATCH 36/69] remoteproc: qcom: pas: Fix subdevice add order Currently, the notification like QCOM_SSR_BEFORE_SHUTDOWN is not exactly sent before starting shutdown activity on remote subsystem but it is getting sent after sysmon shutdown request to remote. On getting QCOM_SSR_BEFORE_SHUTDOWN, some client want remote subsystem to be alive to communicate but as sysmon shutdown request is getting sent to remote before QCOM_SSR_BEFORE_SHUTDOWN notification sent to kernel client due to which remote is not in a condition to communicate with kernel clients. Fixing the subdevice ordering will fix this as ssr subdevice will be first one to get triggered in shutdown/stop path. Signed-off-by: Mukesh Ojha Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1671024983-22634-1-git-send-email-quic_mojha@quicinc.com --- drivers/remoteproc/qcom_q6v5_pas.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 6cebe8ae550e..f95e0229a6c1 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -534,7 +534,6 @@ static int adsp_probe(struct platform_device *pdev) qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name); qcom_add_smd_subdev(rproc, &adsp->smd_subdev); - qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); adsp->sysmon = qcom_add_sysmon_subdev(rproc, desc->sysmon_name, desc->ssctl_id); @@ -543,6 +542,7 @@ static int adsp_probe(struct platform_device *pdev) goto detach_proxy_pds; } + qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); ret = rproc_add(rproc); if (ret) goto detach_proxy_pds; From e46ceea3148163166ef9b7bcac578e72dd30c064 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 4 Jan 2023 16:31:10 +0800 Subject: [PATCH 37/69] remoteproc/mtk_scp: Move clk ops outside send_lock Clocks are properly reference counted and do not need to be inside the lock range. Right now this triggers a false-positive lockdep warning on MT8192 based Chromebooks, through a combination of mtk-scp that has a cros-ec-rpmsg sub-device, the (actual) cros-ec I2C adapter registration, I2C client (not on cros-ec) probe doing i2c transfers and enabling clocks. This is a false positive because the cros-ec-rpmsg under mtk-scp does not have an I2C adapter, and also each I2C adapter and cros-ec instance have their own mutex. Move the clk operations outside of the send_lock range. Fixes: 63c13d61eafe ("remoteproc/mediatek: add SCP support for mt8183") Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20230104083110.736377-1-wenst@chromium.org [Fixed "Fixes:" tag line] Signed-off-by: Mathieu Poirier --- drivers/remoteproc/mtk_scp_ipi.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/mtk_scp_ipi.c b/drivers/remoteproc/mtk_scp_ipi.c index 00f041ebcde6..4c0d121c2f54 100644 --- a/drivers/remoteproc/mtk_scp_ipi.c +++ b/drivers/remoteproc/mtk_scp_ipi.c @@ -164,21 +164,21 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, WARN_ON(len > sizeof(send_obj->share_buf)) || WARN_ON(!buf)) return -EINVAL; - mutex_lock(&scp->send_lock); - ret = clk_prepare_enable(scp->clk); if (ret) { dev_err(scp->dev, "failed to enable clock\n"); - goto unlock_mutex; + return ret; } + mutex_lock(&scp->send_lock); + /* Wait until SCP receives the last command */ timeout = jiffies + msecs_to_jiffies(2000); do { if (time_after(jiffies, timeout)) { dev_err(scp->dev, "%s: IPI timeout!\n", __func__); ret = -ETIMEDOUT; - goto clock_disable; + goto unlock_mutex; } } while (readl(scp->reg_base + scp->data->host_to_scp_reg)); @@ -205,10 +205,9 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, ret = 0; } -clock_disable: - clk_disable_unprepare(scp->clk); unlock_mutex: mutex_unlock(&scp->send_lock); + clk_disable_unprepare(scp->clk); return ret; } From fad151d52ba4075f19573a91ada0c636eb96a349 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 4 Jan 2023 12:53:40 +0100 Subject: [PATCH 38/69] remoteproc/mtk_scp: Use readl_poll_timeout_atomic() for polling Convert the usage of an open-coded custom tight poll while loop with the provided readl_poll_timeout_atomic() macro. This cleanup brings no functional change. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230104115341.320951-2-angelogioacchino.delregno@collabora.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/mtk_scp_ipi.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/remoteproc/mtk_scp_ipi.c b/drivers/remoteproc/mtk_scp_ipi.c index 4c0d121c2f54..af47504bdb61 100644 --- a/drivers/remoteproc/mtk_scp_ipi.c +++ b/drivers/remoteproc/mtk_scp_ipi.c @@ -6,13 +6,17 @@ #include #include #include +#include #include #include #include +#include #include #include "mtk_common.h" +#define SCP_TIMEOUT_US (2000 * USEC_PER_MSEC) + /** * scp_ipi_register() - register an ipi function * @@ -157,6 +161,7 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, { struct mtk_share_obj __iomem *send_obj = scp->send_buf; unsigned long timeout; + u32 val; int ret; if (WARN_ON(id <= SCP_IPI_INIT) || WARN_ON(id >= SCP_IPI_MAX) || @@ -173,14 +178,12 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, mutex_lock(&scp->send_lock); /* Wait until SCP receives the last command */ - timeout = jiffies + msecs_to_jiffies(2000); - do { - if (time_after(jiffies, timeout)) { - dev_err(scp->dev, "%s: IPI timeout!\n", __func__); - ret = -ETIMEDOUT; - goto unlock_mutex; - } - } while (readl(scp->reg_base + scp->data->host_to_scp_reg)); + ret = readl_poll_timeout_atomic(scp->reg_base + scp->data->host_to_scp_reg, + val, !val, 0, SCP_TIMEOUT_US); + if (ret) { + dev_err(scp->dev, "%s: IPI timeout!\n", __func__); + goto unlock_mutex; + } scp_memcpy_aligned(send_obj->share_buf, buf, len); From ac8723e888805345e11785846304373277aec532 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Wed, 4 Jan 2023 12:53:41 +0100 Subject: [PATCH 39/69] remoteproc/mtk_scp: Remove timeout variable from scp_ipi_send() That variable was used twice, but now it's just used once to store msecs_to_jiffies(wait), fed to wait_event_timeout(): we might as well remove it for the sake of cleaning up. This brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230104115341.320951-3-angelogioacchino.delregno@collabora.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/mtk_scp_ipi.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/remoteproc/mtk_scp_ipi.c b/drivers/remoteproc/mtk_scp_ipi.c index af47504bdb61..fc55df649b40 100644 --- a/drivers/remoteproc/mtk_scp_ipi.c +++ b/drivers/remoteproc/mtk_scp_ipi.c @@ -160,7 +160,6 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, unsigned int wait) { struct mtk_share_obj __iomem *send_obj = scp->send_buf; - unsigned long timeout; u32 val; int ret; @@ -197,10 +196,9 @@ int scp_ipi_send(struct mtk_scp *scp, u32 id, void *buf, unsigned int len, if (wait) { /* wait for SCP's ACK */ - timeout = msecs_to_jiffies(wait); ret = wait_event_timeout(scp->ack_wq, scp->ipi_id_ack[id], - timeout); + msecs_to_jiffies(wait)); scp->ipi_id_ack[id] = false; if (WARN(!ret, "scp ipi %d ack time out !", id)) ret = -EIO; From d6e21ef31e7fa43554f9c7666b7b4c54651c256f Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 6 Jan 2023 17:40:41 +0530 Subject: [PATCH 40/69] dt-bindings: remoteproc: Add PRU consumer bindings Add DT schema binding for PRU consumers. The binding includes all the common properties that can be used by different PRU consumer or application nodes and supported by the PRU remoteproc driver. These are used to configure the PRU hardware for specific user applications. The application nodes themselves should define their own bindings. Signed-off-by: Tero Kristo Signed-off-by: Suman Anna Signed-off-by: Grzegorz Jaszczyk Signed-off-by: MD Danish Anwar Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230106121046.886863-2-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- .../bindings/remoteproc/ti,pru-consumer.yaml | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml new file mode 100644 index 000000000000..c6d86964b72a --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common TI PRU Consumer Binding + +maintainers: + - Suman Anna + +description: | + A PRU application/consumer/user node typically uses one or more PRU device + nodes to implement a PRU application/functionality. Each application/client + node would need a reference to at least a PRU node, and optionally define + some properties needed for hardware/firmware configuration. The below + properties are a list of common properties supported by the PRU remoteproc + infrastructure. + + The application nodes shall define their own bindings like regular platform + devices, so below are in addition to each node's bindings. + +properties: + ti,prus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: phandles to the PRU, RTU or Tx_PRU nodes used + minItems: 1 + maxItems: 6 + items: + maxItems: 1 + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + minItems: 1 + maxItems: 6 + description: | + firmwares for the PRU cores, the default firmware for the core from + the PRU node will be used if not provided. The firmware names should + correspond to the PRU cores listed in the 'ti,prus' property + + ti,pruss-gp-mux-sel: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 6 + items: + enum: [0, 1, 2, 3, 4] + description: | + array of values for the GP_MUX_SEL under PRUSS_GPCFG register for a PRU. + This selects the internal muxing scheme for the PRU instance. Values + should correspond to the PRU cores listed in the 'ti,prus' property. The + GP_MUX_SEL setting is a per-slice setting (one setting for PRU0, RTU0, + and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the + same slice in the associative array. If the array size is smaller than + the size of 'ti,prus' property, the default out-of-reset value (0) for the + PRU core is used. + +required: + - ti,prus + +additionalProperties: true From 9b9ad70f28675c45ef93cfb6e4af9403cb7bd34c Mon Sep 17 00:00:00 2001 From: MD Danish Anwar Date: Fri, 6 Jan 2023 17:40:42 +0530 Subject: [PATCH 41/69] remoteproc: pru: Add enum for PRU Core Identifiers. Introducing enum pruss_pru_id for PRU Core Identifiers. PRUSS_PRU0 indicates PRU Core 0. PRUSS_PRU1 indicates PRU Core 1. PRUSS_NUM_PRUS indicates the total number of PRU Cores. Signed-off-by: MD Danish Anwar Reviewed-by: Roger Quadros Link: https://lore.kernel.org/r/20230106121046.886863-3-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/pru_rproc.c | 7 ++++--- include/linux/remoteproc/pruss.h | 31 +++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+), 3 deletions(-) create mode 100644 include/linux/remoteproc/pruss.h diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index 128bf9912f2c..f8b196a2b72a 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -438,7 +439,7 @@ static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len) dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0]; dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1]; /* PRU1 has its local RAM addresses reversed */ - if (pru->id == 1) + if (pru->id == PRUSS_PRU1) swap(dram0, dram1); shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2]; @@ -747,14 +748,14 @@ static int pru_rproc_set_id(struct pru_rproc *pru) case RTU0_IRAM_ADDR_MASK: fallthrough; case PRU0_IRAM_ADDR_MASK: - pru->id = 0; + pru->id = PRUSS_PRU0; break; case TX_PRU1_IRAM_ADDR_MASK: fallthrough; case RTU1_IRAM_ADDR_MASK: fallthrough; case PRU1_IRAM_ADDR_MASK: - pru->id = 1; + pru->id = PRUSS_PRU1; break; default: ret = -EINVAL; diff --git a/include/linux/remoteproc/pruss.h b/include/linux/remoteproc/pruss.h new file mode 100644 index 000000000000..fbadfcfacb34 --- /dev/null +++ b/include/linux/remoteproc/pruss.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * PRU-ICSS Subsystem user interfaces + * + * Copyright (C) 2015-2022 Texas Instruments Incorporated - http://www.ti.com + * Suman Anna + */ + +#ifndef __LINUX_PRUSS_H +#define __LINUX_PRUSS_H + +#include +#include + +#define PRU_RPROC_DRVNAME "pru-rproc" + +/** + * enum pruss_pru_id - PRU core identifiers + * @PRUSS_PRU0: PRU Core 0. + * @PRUSS_PRU1: PRU Core 1. + * @PRUSS_NUM_PRUS: Total number of PRU Cores available. + * + */ + +enum pruss_pru_id { + PRUSS_PRU0 = 0, + PRUSS_PRU1, + PRUSS_NUM_PRUS, +}; + +#endif /* __LINUX_PRUSS_H */ From 919e8942548aa878d374b1b51aa68fdf751f18b8 Mon Sep 17 00:00:00 2001 From: MD Danish Anwar Date: Fri, 6 Jan 2023 17:40:43 +0530 Subject: [PATCH 42/69] remoteproc: pru: Add APIs to get and put the PRU cores Add two new APIs, pru_rproc_get() and pru_rproc_put(), to the PRU driver to allow client drivers to acquire and release the remoteproc device associated with a PRU core. The PRU cores are treated as resources with only one client owning it at a time. The pru_rproc_get() function returns the rproc handle corresponding to a PRU core identified by the device tree "ti,prus" property under the client node. The pru_rproc_put() is the complementary function to pru_rproc_get(). Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Signed-off-by: Grzegorz Jaszczyk Signed-off-by: MD Danish Anwar Reviewed-by: Roger Quadros Link: https://lore.kernel.org/r/20230106121046.886863-4-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/pru_rproc.c | 128 ++++++++++++++++++++++++++++++- include/linux/remoteproc/pruss.h | 30 ++++++++ 2 files changed, 156 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index f8b196a2b72a..1036bfd446b6 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -2,12 +2,14 @@ /* * PRU-ICSS remoteproc driver for various TI SoCs * - * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/ + * Copyright (C) 2014-2022 Texas Instruments Incorporated - https://www.ti.com/ * * Author(s): * Suman Anna * Andrew F. Davis * Grzegorz Jaszczyk for Texas Instruments + * Puranjay Mohan + * Md Danish Anwar */ #include @@ -112,6 +114,8 @@ struct pru_private_data { * @rproc: remoteproc pointer for this PRU core * @data: PRU core specific data * @mem_regions: data for each of the PRU memory regions + * @client_np: client device node + * @lock: mutex to protect client usage * @fw_name: name of firmware image used during loading * @mapped_irq: virtual interrupt numbers of created fw specific mapping * @pru_interrupt_map: pointer to interrupt mapping description (firmware) @@ -127,6 +131,8 @@ struct pru_rproc { struct rproc *rproc; const struct pru_private_data *data; struct pruss_mem_region mem_regions[PRU_IOMEM_MAX]; + struct device_node *client_np; + struct mutex lock; const char *fw_name; unsigned int *mapped_irq; struct pru_irq_rsc *pru_interrupt_map; @@ -147,6 +153,120 @@ void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val) writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg); } +static struct rproc *__pru_rproc_get(struct device_node *np, int index) +{ + struct rproc *rproc; + phandle rproc_phandle; + int ret; + + ret = of_property_read_u32_index(np, "ti,prus", index, &rproc_phandle); + if (ret) + return ERR_PTR(ret); + + rproc = rproc_get_by_phandle(rproc_phandle); + if (!rproc) { + ret = -EPROBE_DEFER; + return ERR_PTR(ret); + } + + /* make sure it is PRU rproc */ + if (!is_pru_rproc(rproc->dev.parent)) { + rproc_put(rproc); + return ERR_PTR(-ENODEV); + } + + return rproc; +} + +/** + * pru_rproc_get() - get the PRU rproc instance from a device node + * @np: the user/client device node + * @index: index to use for the ti,prus property + * @pru_id: optional pointer to return the PRU remoteproc processor id + * + * This function looks through a client device node's "ti,prus" property at + * index @index and returns the rproc handle for a valid PRU remote processor if + * found. The function allows only one user to own the PRU rproc resource at a + * time. Caller must call pru_rproc_put() when done with using the rproc, not + * required if the function returns a failure. + * + * When optional @pru_id pointer is passed the PRU remoteproc processor id is + * returned. + * + * Return: rproc handle on success, and an ERR_PTR on failure using one + * of the following error values + * -ENODEV if device is not found + * -EBUSY if PRU is already acquired by anyone + * -EPROBE_DEFER is PRU device is not probed yet + */ +struct rproc *pru_rproc_get(struct device_node *np, int index, + enum pruss_pru_id *pru_id) +{ + struct rproc *rproc; + struct pru_rproc *pru; + struct device *dev; + int ret; + + rproc = __pru_rproc_get(np, index); + if (IS_ERR(rproc)) + return rproc; + + pru = rproc->priv; + dev = &rproc->dev; + + mutex_lock(&pru->lock); + + if (pru->client_np) { + mutex_unlock(&pru->lock); + ret = -EBUSY; + goto err_no_rproc_handle; + } + + pru->client_np = np; + + mutex_unlock(&pru->lock); + + if (pru_id) + *pru_id = pru->id; + + return rproc; + +err_no_rproc_handle: + rproc_put(rproc); + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(pru_rproc_get); + +/** + * pru_rproc_put() - release the PRU rproc resource + * @rproc: the rproc resource to release + * + * Releases the PRU rproc resource and makes it available to other + * users. + */ +void pru_rproc_put(struct rproc *rproc) +{ + struct pru_rproc *pru; + + if (IS_ERR_OR_NULL(rproc) || !is_pru_rproc(rproc->dev.parent)) + return; + + pru = rproc->priv; + + mutex_lock(&pru->lock); + + if (!pru->client_np) { + mutex_unlock(&pru->lock); + return; + } + + pru->client_np = NULL; + mutex_unlock(&pru->lock); + + rproc_put(rproc); +} +EXPORT_SYMBOL_GPL(pru_rproc_put); + static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg) { return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg); @@ -817,6 +937,8 @@ static int pru_rproc_probe(struct platform_device *pdev) pru->pruss = platform_get_drvdata(ppdev); pru->rproc = rproc; pru->fw_name = fw_name; + pru->client_np = NULL; + mutex_init(&pru->lock); for (i = 0; i < ARRAY_SIZE(mem_names); i++) { res = platform_get_resource_byname(pdev, IORESOURCE_MEM, @@ -905,7 +1027,7 @@ MODULE_DEVICE_TABLE(of, pru_rproc_match); static struct platform_driver pru_rproc_driver = { .driver = { - .name = "pru-rproc", + .name = PRU_RPROC_DRVNAME, .of_match_table = pru_rproc_match, .suppress_bind_attrs = true, }, @@ -917,5 +1039,7 @@ module_platform_driver(pru_rproc_driver); MODULE_AUTHOR("Suman Anna "); MODULE_AUTHOR("Andrew F. Davis "); MODULE_AUTHOR("Grzegorz Jaszczyk "); +MODULE_AUTHOR("Puranjay Mohan "); +MODULE_AUTHOR("Md Danish Anwar "); MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver"); MODULE_LICENSE("GPL v2"); diff --git a/include/linux/remoteproc/pruss.h b/include/linux/remoteproc/pruss.h index fbadfcfacb34..579dafbbaccf 100644 --- a/include/linux/remoteproc/pruss.h +++ b/include/linux/remoteproc/pruss.h @@ -28,4 +28,34 @@ enum pruss_pru_id { PRUSS_NUM_PRUS, }; +struct device_node; + +#if IS_ENABLED(CONFIG_PRU_REMOTEPROC) + +struct rproc *pru_rproc_get(struct device_node *np, int index, + enum pruss_pru_id *pru_id); +void pru_rproc_put(struct rproc *rproc); + +#else + +static inline struct rproc * +pru_rproc_get(struct device_node *np, int index, enum pruss_pru_id *pru_id) +{ + return ERR_PTR(-EOPNOTSUPP); +} + +static inline void pru_rproc_put(struct rproc *rproc) { } + +#endif /* CONFIG_PRU_REMOTEPROC */ + +static inline bool is_pru_rproc(struct device *dev) +{ + const char *drv_name = dev_driver_string(dev); + + if (strncmp(drv_name, PRU_RPROC_DRVNAME, sizeof(PRU_RPROC_DRVNAME))) + return false; + + return true; +} + #endif /* __LINUX_PRUSS_H */ From 2da812ffcd11c31ef897615798a8a66041a5b73b Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 6 Jan 2023 17:40:44 +0530 Subject: [PATCH 43/69] remoteproc: pru: Make sysfs entries read-only for PRU client driven boots The PRU remoteproc driver is not configured for 'auto-boot' by default, and allows to be booted either by in-kernel PRU client drivers or by userspace using the generic remoteproc sysfs interfaces. The sysfs interfaces should not be permitted to change the remoteproc firmwares or states when a PRU is being managed by an in-kernel client driver. Use the newly introduced remoteproc generic 'sysfs_read_only' flag to provide these restrictions by setting and clearing it appropriately during the PRU acquire and release steps. Signed-off-by: Suman Anna Signed-off-by: Grzegorz Jaszczyk Signed-off-by: MD Danish Anwar Reviewed-by: Roger Quadros Link: https://lore.kernel.org/r/20230106121046.886863-5-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/pru_rproc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index 1036bfd446b6..c16242e2d435 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -223,6 +223,7 @@ struct rproc *pru_rproc_get(struct device_node *np, int index, } pru->client_np = np; + rproc->sysfs_read_only = true; mutex_unlock(&pru->lock); @@ -261,6 +262,7 @@ void pru_rproc_put(struct rproc *rproc) } pru->client_np = NULL; + rproc->sysfs_read_only = false; mutex_unlock(&pru->lock); rproc_put(rproc); From 102853400321baea2527917e6e89be33508c3e18 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Fri, 6 Jan 2023 17:40:45 +0530 Subject: [PATCH 44/69] remoteproc: pru: Add pru_rproc_set_ctable() function Some firmwares expect the OS drivers to configure the CTABLE entries publishing dynamically allocated memory regions. For example, the PRU Ethernet firmwares use the C28 and C30 entries for retrieving the Shared RAM and System SRAM (OCMC) areas allocated by the PRU Ethernet client driver. Provide a way for users to do that through a new API, pru_rproc_set_ctable(). The API returns 0 on success and a negative value on error. NOTE: The programmable CTABLE entries are typically re-programmed by the PRU firmwares when dealing with a certain block of memory during block processing. This API provides an interface to the PRU client drivers to publish a dynamically allocated memory block with the PRU firmware using a CTABLE entry instead of a negotiated address in shared memory. Additional synchronization may be needed between the PRU client drivers and firmwares if different addresses needs to be published at run-time reusing the same CTABLE entry. CTABLE for stands for "constant table". Each CTable entry just holds the upper address bits so PRU can reference to external memory with larger address bits. For use case please see prueth_sw_emac_config() in "drivers/net/ethernet/ti/prueth_switch.c" /* Set in constant table C28 of PRUn to ICSS Shared memory */ pru_rproc_set_ctable(prueth->pru0, PRU_C28, sharedramaddr); pru_rproc_set_ctable(prueth->pru1, PRU_C28, sharedramaddr); /* Set in constant table C30 of PRUn to OCMC memory */ pru_rproc_set_ctable(prueth->pru0, PRU_C30, ocmcaddr); pru_rproc_set_ctable(prueth->pru1, PRU_C30, ocmcaddr); Signed-off-by: Andrew F. Davis Signed-off-by: Suman Anna Signed-off-by: Roger Quadros Signed-off-by: Grzegorz Jaszczyk Signed-off-by: MD Danish Anwar Link: https://lore.kernel.org/r/20230106121046.886863-6-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/pru_rproc.c | 59 ++++++++++++++++++++++++++++++++ include/linux/remoteproc/pruss.h | 22 ++++++++++++ 2 files changed, 81 insertions(+) diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index c16242e2d435..f6ea445d2fa2 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -120,6 +120,7 @@ struct pru_private_data { * @mapped_irq: virtual interrupt numbers of created fw specific mapping * @pru_interrupt_map: pointer to interrupt mapping description (firmware) * @pru_interrupt_map_sz: pru_interrupt_map size + * @rmw_lock: lock for read, modify, write operations on registers * @dbg_single_step: debug state variable to set PRU into single step mode * @dbg_continuous: debug state variable to restore PRU execution mode * @evt_count: number of mapped events @@ -137,6 +138,7 @@ struct pru_rproc { unsigned int *mapped_irq; struct pru_irq_rsc *pru_interrupt_map; size_t pru_interrupt_map_sz; + spinlock_t rmw_lock; u32 dbg_single_step; u32 dbg_continuous; u8 evt_count; @@ -153,6 +155,23 @@ void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val) writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg); } +static inline +void pru_control_set_reg(struct pru_rproc *pru, unsigned int reg, + u32 mask, u32 set) +{ + u32 val; + unsigned long flags; + + spin_lock_irqsave(&pru->rmw_lock, flags); + + val = pru_control_read_reg(pru, reg); + val &= ~mask; + val |= (set & mask); + pru_control_write_reg(pru, reg, val); + + spin_unlock_irqrestore(&pru->rmw_lock, flags); +} + static struct rproc *__pru_rproc_get(struct device_node *np, int index) { struct rproc *rproc; @@ -269,6 +288,45 @@ void pru_rproc_put(struct rproc *rproc) } EXPORT_SYMBOL_GPL(pru_rproc_put); +/** + * pru_rproc_set_ctable() - set the constant table index for the PRU + * @rproc: the rproc instance of the PRU + * @c: constant table index to set + * @addr: physical address to set it to + * + * Return: 0 on success, or errno in error case. + */ +int pru_rproc_set_ctable(struct rproc *rproc, enum pru_ctable_idx c, u32 addr) +{ + struct pru_rproc *pru = rproc->priv; + unsigned int reg; + u32 mask, set; + u16 idx; + u16 idx_mask; + + if (IS_ERR_OR_NULL(rproc)) + return -EINVAL; + + if (!rproc->dev.parent || !is_pru_rproc(rproc->dev.parent)) + return -ENODEV; + + /* pointer is 16 bit and index is 8-bit so mask out the rest */ + idx_mask = (c >= PRU_C28) ? 0xFFFF : 0xFF; + + /* ctable uses bit 8 and upwards only */ + idx = (addr >> 8) & idx_mask; + + /* configurable ctable (i.e. C24) starts at PRU_CTRL_CTBIR0 */ + reg = PRU_CTRL_CTBIR0 + 4 * (c >> 1); + mask = idx_mask << (16 * (c & 1)); + set = idx << (16 * (c & 1)); + + pru_control_set_reg(pru, reg, mask, set); + + return 0; +} +EXPORT_SYMBOL_GPL(pru_rproc_set_ctable); + static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg) { return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg); @@ -940,6 +998,7 @@ static int pru_rproc_probe(struct platform_device *pdev) pru->rproc = rproc; pru->fw_name = fw_name; pru->client_np = NULL; + spin_lock_init(&pru->rmw_lock); mutex_init(&pru->lock); for (i = 0; i < ARRAY_SIZE(mem_names); i++) { diff --git a/include/linux/remoteproc/pruss.h b/include/linux/remoteproc/pruss.h index 579dafbbaccf..039b50d58df2 100644 --- a/include/linux/remoteproc/pruss.h +++ b/include/linux/remoteproc/pruss.h @@ -28,13 +28,29 @@ enum pruss_pru_id { PRUSS_NUM_PRUS, }; +/* + * enum pru_ctable_idx - Configurable Constant table index identifiers + */ +enum pru_ctable_idx { + PRU_C24 = 0, + PRU_C25, + PRU_C26, + PRU_C27, + PRU_C28, + PRU_C29, + PRU_C30, + PRU_C31, +}; + struct device_node; +struct rproc; #if IS_ENABLED(CONFIG_PRU_REMOTEPROC) struct rproc *pru_rproc_get(struct device_node *np, int index, enum pruss_pru_id *pru_id); void pru_rproc_put(struct rproc *rproc); +int pru_rproc_set_ctable(struct rproc *rproc, enum pru_ctable_idx c, u32 addr); #else @@ -46,6 +62,12 @@ pru_rproc_get(struct device_node *np, int index, enum pruss_pru_id *pru_id) static inline void pru_rproc_put(struct rproc *rproc) { } +static inline int pru_rproc_set_ctable(struct rproc *rproc, + enum pru_ctable_idx c, u32 addr) +{ + return -EOPNOTSUPP; +} + #endif /* CONFIG_PRU_REMOTEPROC */ static inline bool is_pru_rproc(struct device *dev) From 133f30d3a8e1dd89d3c29324263d7065da1d39d0 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Fri, 6 Jan 2023 17:40:46 +0530 Subject: [PATCH 45/69] remoteproc: pru: Configure firmware based on client setup Client device node property firmware-name is now used to configure firmware for the PRU instances. The default firmware is also restored once releasing the PRU resource. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Signed-off-by: Grzegorz Jaszczyk Signed-off-by: MD Danish Anwar Reviewed-by: Roger Quadros Link: https://lore.kernel.org/r/20230106121046.886863-7-danishanwar@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/pru_rproc.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c index f6ea445d2fa2..b76db7fa693d 100644 --- a/drivers/remoteproc/pru_rproc.c +++ b/drivers/remoteproc/pru_rproc.c @@ -172,6 +172,23 @@ void pru_control_set_reg(struct pru_rproc *pru, unsigned int reg, spin_unlock_irqrestore(&pru->rmw_lock, flags); } +/** + * pru_rproc_set_firmware() - set firmware for a PRU core + * @rproc: the rproc instance of the PRU + * @fw_name: the new firmware name, or NULL if default is desired + * + * Return: 0 on success, or errno in error case. + */ +static int pru_rproc_set_firmware(struct rproc *rproc, const char *fw_name) +{ + struct pru_rproc *pru = rproc->priv; + + if (!fw_name) + fw_name = pru->fw_name; + + return rproc_set_firmware(rproc, fw_name); +} + static struct rproc *__pru_rproc_get(struct device_node *np, int index) { struct rproc *rproc; @@ -224,6 +241,7 @@ struct rproc *pru_rproc_get(struct device_node *np, int index, struct rproc *rproc; struct pru_rproc *pru; struct device *dev; + const char *fw_name; int ret; rproc = __pru_rproc_get(np, index); @@ -249,11 +267,25 @@ struct rproc *pru_rproc_get(struct device_node *np, int index, if (pru_id) *pru_id = pru->id; + ret = of_property_read_string_index(np, "firmware-name", index, + &fw_name); + if (!ret) { + ret = pru_rproc_set_firmware(rproc, fw_name); + if (ret) { + dev_err(dev, "failed to set firmware: %d\n", ret); + goto err; + } + } + return rproc; err_no_rproc_handle: rproc_put(rproc); return ERR_PTR(ret); + +err: + pru_rproc_put(rproc); + return ERR_PTR(ret); } EXPORT_SYMBOL_GPL(pru_rproc_get); @@ -273,6 +305,8 @@ void pru_rproc_put(struct rproc *rproc) pru = rproc->priv; + pru_rproc_set_firmware(rproc, NULL); + mutex_lock(&pru->lock); if (!pru->client_np) { From 44d9083394305965006f64bfdaa94d3c9002564e Mon Sep 17 00:00:00 2001 From: Hari Nagalla Date: Fri, 30 Dec 2022 07:24:52 -0600 Subject: [PATCH 46/69] dt-bindings: remoteproc: k3-dsp: Update bindings for AM62A SoCs The TI AM62A SoCs have a C7xv DSP and Analytics engine for deep learning purposes. The DSP part is similar to the C71x DSP found on K3 J7 SoCs, but additional hardware accelerators and IP are added to the subsystem for deep learning. Compatible info is updated to match AM62A SoCs. Signed-off-by: Hari Nagalla Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221230132453.32022-2-hnagalla@ti.com Signed-off-by: Mathieu Poirier --- .../devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml index cedbc5efdc56..f16e90380df1 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml @@ -31,10 +31,12 @@ allOf: properties: compatible: enum: + - ti,am62a-c7xv-dsp - ti,j721e-c66-dsp - ti,j721e-c71-dsp - ti,j721s2-c71-dsp description: + Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs @@ -109,6 +111,7 @@ else: properties: compatible: enum: + - ti,am62a-c7xv-dsp - ti,j721e-c71-dsp - ti,j721s2-c71-dsp then: From 41909ba6d82483791db47add5e2baac0458550d2 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Fri, 30 Dec 2022 07:24:53 -0600 Subject: [PATCH 47/69] remoteproc: k3-c7x: Add support for C7xv DSP on AM62A SoC Add support to the K3 DSP remoteproc driver to configure the C7xv subsystem core on AM62A SoCs. The C7xv susbsytem is based on C71 DSP with anlytics engine for deep learning purposes. The remoteproc handling for device management is similar to the C66/C71 DSPs on K3 J7 family SoCs, even though there are additional hardware accelerators and IP updates to C7xv subsystem. Signed-off-by: Jai Luthra Signed-off-by: Hari Nagalla Link: https://lore.kernel.org/r/20221230132453.32022-3-hnagalla@ti.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/ti_k3_dsp_remoteproc.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/remoteproc/ti_k3_dsp_remoteproc.c b/drivers/remoteproc/ti_k3_dsp_remoteproc.c index eb9c64f7b9b4..ec626a37fef6 100644 --- a/drivers/remoteproc/ti_k3_dsp_remoteproc.c +++ b/drivers/remoteproc/ti_k3_dsp_remoteproc.c @@ -870,6 +870,10 @@ static const struct k3_dsp_mem_data c71_mems[] = { { .name = "l1dram", .dev_addr = 0xe00000 }, }; +static const struct k3_dsp_mem_data c7xv_mems[] = { + { .name = "l2sram", .dev_addr = 0x800000 }, +}; + static const struct k3_dsp_dev_data c66_data = { .mems = c66_mems, .num_mems = ARRAY_SIZE(c66_mems), @@ -884,10 +888,18 @@ static const struct k3_dsp_dev_data c71_data = { .uses_lreset = false, }; +static const struct k3_dsp_dev_data c7xv_data = { + .mems = c7xv_mems, + .num_mems = ARRAY_SIZE(c7xv_mems), + .boot_align_addr = SZ_2M, + .uses_lreset = false, +}; + static const struct of_device_id k3_dsp_of_match[] = { { .compatible = "ti,j721e-c66-dsp", .data = &c66_data, }, { .compatible = "ti,j721e-c71-dsp", .data = &c71_data, }, { .compatible = "ti,j721s2-c71-dsp", .data = &c71_data, }, + { .compatible = "ti,am62a-c7xv-dsp", .data = &c7xv_data, }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, k3_dsp_of_match); From cee616c6884616aea3be72a9debafd0614332682 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:39 +0100 Subject: [PATCH 48/69] dt-bindings: remoteproc: qcom: adsp: move memory-region and firmware-name out of pas-common Move memory-region and firmware-name definitions out of qcom,pas-common.yaml since they will be redefined differently for SM8550 PAS bindings documentation. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-remoteproc-v4-1-54154c08c0b7@linaro.org --- .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 4 ++++ .../devicetree/bindings/remoteproc/qcom,pas-common.yaml | 8 -------- .../devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml | 8 ++++++++ .../devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml | 8 ++++++++ 10 files changed, 68 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index d3bfc0f472a9..643ee787a81f 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -40,6 +40,10 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. + memory-region: + maxItems: 1 + description: Reference to the reserved-memory for the Hexagon core + required: - compatible diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml index 1d5e01c8d8bc..171ef85de193 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml @@ -52,14 +52,6 @@ properties: minItems: 1 maxItems: 3 - firmware-name: - $ref: /schemas/types.yaml#/definitions/string - description: Firmware name for the Hexagon core - - memory-region: - maxItems: 1 - description: Reference to the reserved-memory for the Hexagon core - qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array description: States used by the AP to signal the Hexagon core diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml index 007349ef51ed..5efa0e5c0439 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml @@ -41,6 +41,14 @@ properties: power-domain-names: false smd-edge: false + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml index 6fd768609a66..5cefd2c58593 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml @@ -50,12 +50,20 @@ properties: - const: mx - const: mss + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. smd-edge: false + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml index 3026cfde5582..c1f8dd8d0e4c 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml @@ -37,6 +37,14 @@ properties: smd-edge: false + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml index c08274aaa6f8..f6fbc531dc28 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml @@ -37,6 +37,14 @@ properties: smd-edge: false + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml index cbeaa00ca4d4..c66e298462c7 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml @@ -45,12 +45,20 @@ properties: - const: cx - const: mss + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. smd-edge: false + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml index 911529400142..fee02fa800b5 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml @@ -35,8 +35,16 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + smd-edge: false + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml index b934252cf02b..2c085ac2c3fb 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml @@ -39,8 +39,16 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle description: Reference to the AOSS side-channel message RAM. + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + smd-edge: false + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml index 853f97d6879f..af24f9a3cdf1 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml @@ -42,6 +42,14 @@ properties: smd-edge: false + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + required: - compatible - reg From 084258d607128a7486311daf5e67ca414ee07cc9 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:40 +0100 Subject: [PATCH 49/69] dt-bindings: remoteproc: qcom: adsp: document sm8550 adsp, cdsp & mpss compatible This documents the compatible for the component used to boot the aDSP, cDSP and MPSS on the SM8550 SoC. The SM8550 boot process on SM8550 now requires a secondary "Devicetree" firmware to be passed along the main Firmware, and the cDSP a new power domain named "NSP". A third memory domain for the DSM memory zone is also needed for the MPSS PAS bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-remoteproc-v4-2-54154c08c0b7@linaro.org --- .../bindings/remoteproc/qcom,sm8550-pas.yaml | 178 ++++++++++++++++++ 1 file changed, 178 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml new file mode 100644 index 000000000000..ae612809e260 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8550 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + minItems: 2 + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + memory-region: + maxItems: 2 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + memory-region: + minItems: 3 + + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + - if: + properties: + compatible: + enum: + - qcom,sm8550-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + remoteproc@30000000 { + compatible = "qcom,sm8550-adsp-pas"; + reg = <0x030000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>, <&dtb_adsp_mem>; + + firmware-name = "qcom/sm8550/adsp.mbn", + "qcom/sm8550/adsp_dtb.mbn"; + + power-domains = <&rpmhpd_sm8550_lcx>, + <&rpmhpd_sm8550_lmx>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + }; From 29814986b82e820ae9d3eb7474cdcf66605bd114 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:41 +0100 Subject: [PATCH 50/69] remoteproc: qcom_q6v5_pas: add support for dtb co-firmware loading Starting from the SM8550 SoC, starting the aDSP, cDSP and MPSS will require loading a separate "Devicetree" firmware. In order to satisfy the load & authentication order required by the SM8550 SoC, the following is implemented: - "Devicetree" firmware request & load in dedicated memory - Q6V5 prepare - Power Domain & Clocks enable - "Devicetree" firmware authentication - Main firmware load in dedicated memory - Main firmware authentication - Q6V5 startup - "Devicetree" firmware metadata release - Main metadata release When booting older platforms, the "Devicetree" steps would be bypassed and the load & authentication order would still be valid. Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-remoteproc-v4-3-54154c08c0b7@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 134 ++++++++++++++++++++++++++--- 1 file changed, 121 insertions(+), 13 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index f95e0229a6c1..cdd8a1a3ca59 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -35,7 +35,9 @@ struct adsp_data { int crash_reason_smem; const char *firmware_name; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; bool auto_boot; bool decrypt_shutdown; @@ -64,19 +66,28 @@ struct qcom_adsp { int proxy_pd_count; + const char *dtb_firmware_name; int pas_id; + int dtb_pas_id; unsigned int minidump_id; int crash_reason_smem; bool decrypt_shutdown; const char *info_name; + const struct firmware *firmware; + const struct firmware *dtb_firmware; + struct completion start_done; struct completion stop_done; phys_addr_t mem_phys; + phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; + phys_addr_t dtb_mem_reloc; void *mem_region; + void *dtb_mem_region; size_t mem_size; + size_t dtb_mem_size; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -84,6 +95,7 @@ struct qcom_adsp { struct qcom_sysmon *sysmon; struct qcom_scm_pas_metadata pas_metadata; + struct qcom_scm_pas_metadata dtb_pas_metadata; }; static void adsp_minidump(struct rproc *rproc) @@ -158,6 +170,8 @@ static int adsp_unprepare(struct rproc *rproc) * here. */ qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); return 0; } @@ -167,20 +181,40 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - ret = qcom_mdt_pas_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_phys, &adsp->pas_metadata); - if (ret) - return ret; + /* Store firmware handle to be used in adsp_start() */ + adsp->firmware = fw; - ret = qcom_mdt_load_no_init(adsp->dev, fw, rproc->firmware, adsp->pas_id, - adsp->mem_region, adsp->mem_phys, adsp->mem_size, - &adsp->mem_reloc); - if (ret) - return ret; + if (adsp->dtb_pas_id) { + ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev); + if (ret) { + dev_err(adsp->dev, "request_firmware failed for %s: %d\n", + adsp->dtb_firmware_name, ret); + return ret; + } - qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_phys, + &adsp->dtb_pas_metadata); + if (ret) + goto release_dtb_firmware; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, + adsp->dtb_pas_id, adsp->dtb_mem_region, + adsp->dtb_mem_phys, adsp->dtb_mem_size, + &adsp->dtb_mem_reloc); + if (ret) + goto release_dtb_metadata; + } return 0; + +release_dtb_metadata: + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + +release_dtb_firmware: + release_firmware(adsp->dtb_firmware); + + return ret; } static int adsp_start(struct rproc *rproc) @@ -216,24 +250,55 @@ static int adsp_start(struct rproc *rproc) goto disable_cx_supply; } + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); + if (ret) { + dev_err(adsp->dev, + "failed to authenticate dtb image and release reset\n"); + goto disable_px_supply; + } + } + + ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_phys, &adsp->pas_metadata); + if (ret) + goto disable_px_supply; + + ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, + adsp->mem_region, adsp->mem_phys, adsp->mem_size, + &adsp->mem_reloc); + if (ret) + goto release_pas_metadata; + + qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); + ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); if (ret) { dev_err(adsp->dev, "failed to authenticate image and release reset\n"); - goto disable_px_supply; + goto release_pas_metadata; } ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); if (ret == -ETIMEDOUT) { dev_err(adsp->dev, "start timed out\n"); qcom_scm_pas_shutdown(adsp->pas_id); - goto disable_px_supply; + goto release_pas_metadata; } qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); + + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; return 0; +release_pas_metadata: + qcom_scm_pas_metadata_release(&adsp->pas_metadata); + if (adsp->dtb_pas_id) + qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); disable_px_supply: if (adsp->px_supply) regulator_disable(adsp->px_supply); @@ -249,6 +314,9 @@ disable_proxy_pds: disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; + return ret; } @@ -282,6 +350,12 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); + if (adsp->dtb_pas_id) { + ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id); + if (ret) + dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); + } + handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -458,6 +532,28 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp) return -EBUSY; } + if (!adsp->dtb_pas_id) + return 0; + + node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1); + if (!node) { + dev_err(adsp->dev, "no dtb memory-region specified\n"); + return -EINVAL; + } + + ret = of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + adsp->dtb_mem_phys = adsp->dtb_mem_reloc = r.start; + adsp->dtb_mem_size = resource_size(&r); + adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); + if (!adsp->dtb_mem_region) { + dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", + &r.start, adsp->dtb_mem_size); + return -EBUSY; + } + return 0; } @@ -466,7 +562,7 @@ static int adsp_probe(struct platform_device *pdev) const struct adsp_data *desc; struct qcom_adsp *adsp; struct rproc *rproc; - const char *fw_name; + const char *fw_name, *dtb_fw_name = NULL; const struct rproc_ops *ops = &adsp_ops; int ret; @@ -483,6 +579,14 @@ static int adsp_probe(struct platform_device *pdev) if (ret < 0 && ret != -EINVAL) return ret; + if (desc->dtb_firmware_name) { + dtb_fw_name = desc->dtb_firmware_name; + ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1, + &dtb_fw_name); + if (ret < 0 && ret != -EINVAL) + return ret; + } + if (desc->minidump_id) ops = &adsp_minidump_ops; @@ -503,6 +607,10 @@ static int adsp_probe(struct platform_device *pdev) adsp->pas_id = desc->pas_id; adsp->info_name = desc->sysmon_name; adsp->decrypt_shutdown = desc->decrypt_shutdown; + if (dtb_fw_name) { + adsp->dtb_firmware_name = dtb_fw_name; + adsp->dtb_pas_id = desc->dtb_pas_id; + } platform_set_drvdata(pdev, adsp); ret = device_init_wakeup(adsp->dev, true); From c63c0a7cab91b930a6ee78c28b481b84bfa98b7f Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:42 +0100 Subject: [PATCH 51/69] remoteproc: qcom_q6v5_pas: add support for assigning memory to firmware Starting with SM8550, the DSM memory must now be shared to the firmware by the APPS process instead of being defined in the carveout memory reserved for MPSS. In order to handle that, add a region_assign_idx in adsp_data to specify with index of memory-region must be assigned to the MPSS via the qcom_scm_assign_mem() call at probe time. Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-remoteproc-v4-4-54154c08c0b7@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 71 ++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index cdd8a1a3ca59..ed05593c0adf 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -48,6 +48,8 @@ struct adsp_data { const char *ssr_name; const char *sysmon_name; int ssctl_id; + + int region_assign_idx; }; struct qcom_adsp { @@ -84,10 +86,15 @@ struct qcom_adsp { phys_addr_t dtb_mem_phys; phys_addr_t mem_reloc; phys_addr_t dtb_mem_reloc; + phys_addr_t region_assign_phys; void *mem_region; void *dtb_mem_region; size_t mem_size; size_t dtb_mem_size; + size_t region_assign_size; + + int region_assign_idx; + int region_assign_perms; struct qcom_rproc_glink glink_subdev; struct qcom_rproc_subdev smd_subdev; @@ -557,6 +564,64 @@ static int adsp_alloc_memory_region(struct qcom_adsp *adsp) return 0; } +static int adsp_assign_memory_region(struct qcom_adsp *adsp) +{ + struct qcom_scm_vmperm perm; + struct device_node *node; + struct resource r; + int ret; + + if (!adsp->region_assign_idx) + return 0; + + node = of_parse_phandle(adsp->dev->of_node, "memory-region", adsp->region_assign_idx); + if (!node) { + dev_err(adsp->dev, "missing shareable memory-region\n"); + return -EINVAL; + } + + ret = of_address_to_resource(node, 0, &r); + if (ret) + return ret; + + perm.vmid = QCOM_SCM_VMID_MSS_MSA; + perm.perm = QCOM_SCM_PERM_RW; + + adsp->region_assign_phys = r.start; + adsp->region_assign_size = resource_size(&r); + adsp->region_assign_perms = BIT(QCOM_SCM_VMID_HLOS); + + ret = qcom_scm_assign_mem(adsp->region_assign_phys, + adsp->region_assign_size, + &adsp->region_assign_perms, + &perm, 1); + if (ret < 0) { + dev_err(adsp->dev, "assign memory failed\n"); + return ret; + } + + return 0; +} + +static void adsp_unassign_memory_region(struct qcom_adsp *adsp) +{ + struct qcom_scm_vmperm perm; + int ret; + + if (!adsp->region_assign_idx) + return; + + perm.vmid = QCOM_SCM_VMID_HLOS; + perm.perm = QCOM_SCM_PERM_RW; + + ret = qcom_scm_assign_mem(adsp->region_assign_phys, + adsp->region_assign_size, + &adsp->region_assign_perms, + &perm, 1); + if (ret < 0) + dev_err(adsp->dev, "unassign memory failed\n"); +} + static int adsp_probe(struct platform_device *pdev) { const struct adsp_data *desc; @@ -607,6 +672,7 @@ static int adsp_probe(struct platform_device *pdev) adsp->pas_id = desc->pas_id; adsp->info_name = desc->sysmon_name; adsp->decrypt_shutdown = desc->decrypt_shutdown; + adsp->region_assign_idx = desc->region_assign_idx; if (dtb_fw_name) { adsp->dtb_firmware_name = dtb_fw_name; adsp->dtb_pas_id = desc->dtb_pas_id; @@ -621,6 +687,10 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; + ret = adsp_assign_memory_region(adsp); + if (ret) + goto free_rproc; + ret = adsp_init_clock(adsp); if (ret) goto free_rproc; @@ -673,6 +743,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); qcom_q6v5_deinit(&adsp->q6v5); + adsp_unassign_memory_region(adsp); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); From 7eddedc975638f9bf427e7964c74276450a3021d Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:43 +0100 Subject: [PATCH 52/69] remoteproc: qcom_q6v5_pas: add sm8550 adsp, cdsp & mpss compatible & data This adds the compatible & data for the aDSP, cDSP and MPSS found in the SM8550 SoC. This platform requires the "Devicetree" firmware to be loaded along the main firmware. The MPSS DSM memory to be assigned to the MPSS subsystem is the third memory-region entry as defined in the bindings. Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221114-narmstrong-sm8550-upstream-remoteproc-v4-5-54154c08c0b7@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 63 ++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index ed05593c0adf..4e1d9b08def4 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1101,6 +1101,66 @@ static const struct adsp_data sm8450_mpss_resource = { .ssctl_id = 0x12, }; +static const struct adsp_data sm8550_adsp_resource = { + .crash_reason_smem = 423, + .firmware_name = "adsp.mdt", + .dtb_firmware_name = "adsp_dtb.mdt", + .pas_id = 1, + .dtb_pas_id = 0x24, + .minidump_id = 5, + .auto_boot = false, + .proxy_pd_names = (char*[]){ + "lcx", + "lmx", + NULL + }, + .load_state = "adsp", + .ssr_name = "lpass", + .sysmon_name = "adsp", + .ssctl_id = 0x14, +}; + +static const struct adsp_data sm8550_cdsp_resource = { + .crash_reason_smem = 601, + .firmware_name = "cdsp.mdt", + .dtb_firmware_name = "cdsp_dtb.mdt", + .pas_id = 18, + .dtb_pas_id = 0x25, + .minidump_id = 7, + .auto_boot = false, + .proxy_pd_names = (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .load_state = "cdsp", + .ssr_name = "cdsp", + .sysmon_name = "cdsp", + .ssctl_id = 0x17, +}; + +static const struct adsp_data sm8550_mpss_resource = { + .crash_reason_smem = 421, + .firmware_name = "modem.mdt", + .dtb_firmware_name = "modem_dtb.mdt", + .pas_id = 4, + .dtb_pas_id = 0x26, + .minidump_id = 3, + .auto_boot = false, + .decrypt_shutdown = true, + .proxy_pd_names = (char*[]){ + "cx", + "mss", + NULL + }, + .load_state = "modem", + .ssr_name = "mpss", + .sysmon_name = "modem", + .ssctl_id = 0x12, + .region_assign_idx = 2, +}; + static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init}, { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource}, @@ -1142,6 +1202,9 @@ static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource}, { .compatible = "qcom,sm8450-slpi-pas", .data = &sm8350_slpi_resource}, { .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource}, + { .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource}, + { .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource}, + { .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource}, { }, }; MODULE_DEVICE_TABLE(of, adsp_of_match); From bdea142295ffd76aaec2a90a36ba09ad19660686 Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Tue, 17 Jan 2023 14:28:30 +0530 Subject: [PATCH 53/69] dt-bindings: remoteproc: qcom,q6v5: Move MSM8996 to schema Convert MSM8996 and similar (MSM8998/SDM845) MSS PIL bindings to schema. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-2-quic_sibis@quicinc.com --- .../remoteproc/qcom,msm8996-mss-pil.yaml | 377 ++++++++++++++++++ .../bindings/remoteproc/qcom,q6v5.txt | 137 +------ 2 files changed, 382 insertions(+), 132 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml new file mode 100644 index 000000000000..1aa5e5c7c2bd --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml @@ -0,0 +1,377 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar) + +maintainers: + - Bjorn Andersson + - Sibi Sankar + +description: + MSS Peripheral Image Loader loads and boots firmware on the + Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar). + +properties: + compatible: + enum: + - qcom,msm8996-mss-pil + - qcom,msm8998-mss-pil + - qcom,sdm845-mss-pil + + reg: + items: + - description: MSS QDSP6 registers + - description: RMB registers + + reg-names: + items: + - const: qdsp6 + - const: rmb + + iommus: + items: + - description: MSA Stream 1 + - description: MSA Stream 2 + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + - description: Shutdown acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + - const: shutdown-ack + + clocks: + minItems: 8 + maxItems: 9 + + clock-names: + minItems: 8 + maxItems: 9 + + power-domains: + items: + - description: CX power domain + - description: MX power domain + - description: MSS power domain (only valid for qcom,sdm845-mss-pil) + minItems: 2 + + power-domain-names: + items: + - const: cx + - const: mx + - const: mss # only valid for qcom,sdm845-mss-pil + minItems: 2 + + pll-supply: + description: PLL supply + + resets: + items: + - description: AOSS restart + - description: PDC reset (only valid for qcom,sdm845-mss-pil) + minItems: 1 + + reset-names: + items: + - const: mss_restart + - const: pdc_reset # only valid for qcom,sdm845-mss-pil + minItems: 1 + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the Hexagon core + items: + - description: Stop modem + + qcom,smem-state-names: + description: Names of the states used by the AP to signal the Hexagon core + items: + - const: stop + + qcom,halt-regs: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Halt registers are used to halt transactions of various sub-components + within MSS. + items: + - items: + - description: phandle to TCSR syscon region + - description: offset to the Q6 halt register + - description: offset to the modem halt register + - description: offset to the nc halt register + + memory-region: + items: + - description: MBA reserved region + - description: Modem reserved region + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Name of MBA firmware + - description: Name of modem firmware + + smd-edge: + $ref: /schemas/remoteproc/qcom,smd-edge.yaml# + description: + Qualcomm Shared Memory subnode which represents communication edge, + channels and devices related to the Modem. + unevaluatedProperties: false + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the Modem. + unevaluatedProperties: false + + # Deprecated properties + mba: + type: object + description: + MBA reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + + mpss: + type: object + description: + MPSS reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - power-domain-names + - resets + - reset-names + - qcom,halt-regs + - qcom,smem-states + - qcom,smem-state-names + +allOf: + - if: + properties: + compatible: + const: qcom,msm8996-mss-pil + then: + properties: + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: RPMH XO clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: RPMH PNOC clock + - description: GCC MSS PRNG clock + - description: RPMH QDSS clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: xo + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: pnoc + - const: qdss + glink-edge: false + required: + - pll-supply + - smd-edge + else: + properties: + pll-supply: false + smd-edge: false + + - if: + properties: + compatible: + const: qcom,msm8998-mss-pil + then: + properties: + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: RPMH QDSS clock + - description: RPMH XO clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: qdss + - const: xo + required: + - glink-edge + + - if: + properties: + compatible: + const: qcom,sdm845-mss-pil + then: + properties: + power-domains: + minItems: 3 + power-domain-names: + minItems: 3 + resets: + minItems: 2 + reset-names: + minItems: 2 + clocks: + items: + - description: GCC MSS IFACE clock + - description: GCC MSS BUS clock + - description: GCC MSS MEM clock + - description: GCC MSS GPLL0 clock + - description: GCC MSS SNOC_AXI clock + - description: GCC MSS MNOC_AXI clock + - description: GCC MSS PRNG clock + - description: RPMH XO clock + clock-names: + items: + - const: iface + - const: bus + - const: mem + - const: gpll0_mss + - const: snoc_axi + - const: mnoc_axi + - const: prng + - const: xo + required: + - qcom,qmp + - glink-edge + else: + properties: + iommus: false + power-domains: + maxItems: 2 + power-domain-names: + maxItems: 2 + resets: + maxItems: 1 + reset-names: + maxItems: 1 + qcom,qmp: false + + # Fallbacks for deprecated properties + - oneOf: + - required: + - memory-region + - required: + - mba + - mpss + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + remoteproc@4080000 { + compatible = "qcom,sdm845-mss-pil"; + reg = <0x04080000 0x408>, <0x04180000 0x48>; + reg-names = "qdsp6", "rmb"; + + interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, + <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack", + "shutdown-ack"; + + clocks = <&gcc GCC_MSS_CFG_AHB_CLK>, + <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, + <&gcc GCC_BOOT_ROM_AHB_CLK>, + <&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, + <&gcc GCC_MSS_SNOC_AXI_CLK>, + <&gcc GCC_MSS_MFAB_AXIS_CLK>, + <&gcc GCC_PRNG_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bus", "mem", "gpll0_mss", + "snoc_axi", "mnoc_axi", "prng", "xo"; + + power-domains = <&rpmhpd SDM845_CX>, + <&rpmhpd SDM845_MX>, + <&rpmhpd SDM845_MSS>; + power-domain-names = "cx", "mx", "mss"; + + memory-region = <&mba_mem>, <&mpss_mem>; + + resets = <&aoss_reset AOSS_CC_MSS_RESTART>, + <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "mss_restart", "pdc_reset"; + + qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&modem_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + label = "modem"; + qcom,remote-pid = <1>; + mboxes = <&apss_shared 12>; + }; + }; diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 5923c0447e2d..573a88b60677 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -9,9 +9,6 @@ on the Qualcomm Hexagon core. Definition: must be one of: "qcom,ipq8074-wcss-pil" "qcom,qcs404-wcss-pil" - "qcom,msm8996-mss-pil" - "qcom,msm8998-mss-pil" - "qcom,sdm845-mss-pil" - reg: Usage: required @@ -32,23 +29,7 @@ on the Qualcomm Hexagon core. - interrupt-names: Usage: required Value type: - Definition: The interrupts needed depends on the compatible - string: - qcom,ipq8074-wcss-pil: - qcom,qcs404-wcss-pil: - must be "wdog", "fatal", "ready", "handover", "stop-ack" - qcom,msm8996-mss-pil: - qcom,msm8998-mss-pil: - qcom,sdm845-mss-pil: - must be "wdog", "fatal", "ready", "handover", "stop-ack", - "shutdown-ack" - -- firmware-name: - Usage: optional - Value type: - Definition: must list the relative firmware image paths for mba and - modem. They are used for booting and authenticating the - Hexagon core. + Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack" - clocks: Usage: required @@ -66,41 +47,23 @@ on the Qualcomm Hexagon core. "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc", "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc", "lcc_axim_cbc", "lcc_bcr_sleep" - qcom,msm8996-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "pnoc", "qdss" - qcom,msm8998-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "qdss" - qcom,sdm845-mss-pil: - must be "iface", "bus", "mem", "xo", "gpll0_mss", - "snoc_axi", "mnoc_axi", "prng" - resets: Usage: required Value type: - Definition: reference to the reset-controller for the modem sub-system - reference to the list of 3 reset-controllers for the + Definition: reference to the list of 3 reset-controllers for the wcss sub-system - reference to the list of 2 reset-controllers for the modem - sub-system on SDM845 SoCs - reset-names: Usage: required Value type: - Definition: must be "mss_restart" for the modem sub-system - must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" + Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" for the wcss sub-system - must be "mss_restart", "pdc_reset" for the modem - sub-system on SDM845 SoCs -For devices where the mba and mpss sub-nodes are not specified, mba/mpss region -should be referenced as follows: - memory-region: Usage: required Value type: - Definition: reference to the reserved-memory for the mba region followed - by the mpss region + Definition: reference to wcss reserved-memory region. For the compatible string below the following supplies are required: "qcom,qcs404-wcss-pil" @@ -110,36 +73,6 @@ For the compatible string below the following supplies are required: Definition: reference to the regulators to be held on behalf of the booting of the Hexagon core -For the compatible string below the following supplies are required: - "qcom,msm8996-mss-pil" -- pll-supply: - Usage: required - Value type: - Definition: reference to the regulators to be held on behalf of the - booting of the Hexagon core - -- power-domains: - Usage: required - Value type: - Definition: reference to power-domains that match power-domain-names - -- power-domain-names: - Usage: required - Value type: - Definition: The power-domains needed depend on the compatible string: - qcom,ipq8074-wcss-pil: - no power-domain names required - qcom,msm8996-mss-pil: - qcom,msm8998-mss-pil: - must be "cx", "mx" - qcom,sdm845-mss-pil: - must be "cx", "mx", "mss" - -- qcom,qmp: - Usage: optional - Value type: - Definition: reference to the AOSS side-channel message RAM. - - qcom,smem-states: Usage: required Value type: @@ -155,16 +88,9 @@ For the compatible string below the following supplies are required: Usage: required Value type: Definition: a phandle reference to a syscon representing TCSR followed - by the three offsets within syscon for q6, modem and nc + by the three offsets within syscon for q6, wcss and nc halt registers. -The Hexagon node must contain iommus property as described in ../iommu/iommu.txt -on platforms which do not have TrustZone. - -= SUBNODES: -The Hexagon node must contain two subnodes, named "mba" and "mpss" representing -the memory regions used by the Hexagon firmware. Each sub-node must contain: - - memory-region: Usage: required Value type: @@ -174,56 +100,3 @@ The Hexagon node may also have an subnode named either "smd-edge" or "glink-edge" that describes the communication edge, channels and devices related to the Hexagon. See ../soc/qcom/qcom,smd.yaml and ../soc/qcom/qcom,glink.txt for details on how to describe these. - -= EXAMPLE -The following example describes the resources needed to boot control the -Hexagon, as it is found on MSM8974 boards. - - remoteproc@fc880000 { - compatible = "qcom,msm8974-mss-pil"; - reg = <0xfc880000 0x100>, <0xfc820000 0x020>; - reg-names = "qdsp6", "rmb"; - - interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, - <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; - - clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>, - <&gcc GCC_MSS_CFG_AHB_CLK>, - <&gcc GCC_BOOT_ROM_AHB_CLK>, - <&xo_board>; - clock-names = "iface", "bus", "mem", "xo"; - - resets = <&gcc GCC_MSS_RESTART>; - reset-names = "mss_restart"; - - cx-supply = <&pm8841_s2>; - mss-supply = <&pm8841_s3>; - mx-supply = <&pm8841_s1>; - pll-supply = <&pm8941_l12>; - - qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>; - - qcom,smem-states = <&modem_smp2p_out 0>; - qcom,smem-state-names = "stop"; - - mba { - memory-region = <&mba_region>; - }; - - mpss { - memory-region = <&mpss_region>; - }; - - smd-edge { - interrupts = ; - - qcom,ipc = <&apcs 8 12>; - qcom,smd-edge = <0>; - - label = "modem"; - }; - }; From 9b3024247b2ddea6880fa77b638c870ddbdb6bba Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Tue, 17 Jan 2023 14:28:31 +0530 Subject: [PATCH 54/69] dt-bindings: remoteproc: qcom,msm8996-mss-pil: Update memory region The dynamic memory region used for metadata authentication would still be a part of the kernel mapping and any access to this region by the application processor after assigning it to the remote Q6 will result in a XPU violation. This is fixed by using a no-map carveout instead. Update the bindings to reflect the addition of the new modem metadata carveout on MSM8996 (and similar) SoCs. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-3-quic_sibis@quicinc.com --- .../remoteproc/qcom,msm8996-mss-pil.yaml | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml index 1aa5e5c7c2bd..c1ac6ca1e759 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml @@ -122,6 +122,7 @@ properties: items: - description: MBA reserved region - description: Modem reserved region + - description: Metadata reserved region firmware-name: $ref: /schemas/types.yaml#/definitions/string-array @@ -172,6 +173,20 @@ properties: additionalProperties: false deprecated: true + metadata: + type: object + description: + Metadata reserved region + + properties: + memory-region: true + + required: + - memory-region + + additionalProperties: false + deprecated: true + required: - compatible - reg @@ -313,6 +328,7 @@ allOf: - required: - mba - mpss + - metadata additionalProperties: false @@ -355,7 +371,7 @@ examples: <&rpmhpd SDM845_MSS>; power-domain-names = "cx", "mx", "mss"; - memory-region = <&mba_mem>, <&mpss_mem>; + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; resets = <&aoss_reset AOSS_CC_MSS_RESTART>, <&pdc_reset PDC_MODEM_SYNC_RESET>; From 95864f27330674c970c84b81ae791182de150b0f Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Tue, 17 Jan 2023 14:28:32 +0530 Subject: [PATCH 55/69] dt-bindings: remoteproc: qcom,sc7180-mss-pil: Update memory-region The dynamic memory region used for metadata authentication would still be a part of the kernel mapping and any access to this region by the application processor after assigning it to the remote Q6 will result in a XPU violation. This is fixed by using a no-map carveout instead. Update the bindings to reflect the addition of the new modem metadata carveout on SC7180 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-4-quic_sibis@quicinc.com --- .../devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml index e4a7da8020f4..b1402bef0ebe 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml @@ -95,6 +95,7 @@ properties: items: - description: MBA reserved region - description: modem reserved region + - description: metadata reserved region firmware-name: $ref: /schemas/types.yaml#/definitions/string-array @@ -223,7 +224,7 @@ examples: <&rpmhpd SC7180_MSS>; power-domain-names = "cx", "mx", "mss"; - memory-region = <&mba_mem>, <&mpss_mem>; + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; qcom,qmp = <&aoss_qmp>; From eb48137d783b4c845c7b081e32a73666326dcbb3 Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Tue, 17 Jan 2023 14:28:33 +0530 Subject: [PATCH 56/69] dt-bindings: remoteproc: qcom,sc7280-mss-pil: Update memory-region The dynamic memory region used for metadata authentication would still be a part of the kernel mapping and any access to this region by the application processor after assigning it to the remote Q6 will result in a XPU violation. This is fixed by using a no-map carveout instead. Update the bindings to reflect the addition of the new modem metadata carveout on SC7280 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-5-quic_sibis@quicinc.com --- .../devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml index b4de0521a89d..005cb21732af 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml @@ -95,6 +95,7 @@ properties: items: - description: MBA reserved region - description: modem reserved region + - description: metadata reserved region firmware-name: $ref: /schemas/types.yaml#/definitions/string-array @@ -240,7 +241,7 @@ examples: <&rpmhpd SC7280_MSS>; power-domain-names = "cx", "mss"; - memory-region = <&mba_mem>, <&mpss_mem>; + memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>; qcom,qmp = <&aoss_qmp>; From a899d542b687c9b04ccbd9eefabc829ba5fef791 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 17 Jan 2023 14:28:34 +0530 Subject: [PATCH 57/69] Revert "remoteproc: qcom_q6v5_mss: map/unmap metadata region before/after use" This reverts commit fc156629b23a21181e473e60341e3a78af25a1d4. This commit manages to do three API violations at once: - dereference the return value of dma_alloc_attrs with the DMA_ATTR_NO_KERNEL_MAPPING mapping, which is clearly forbidden and will do the wrong thing on various dma mapping implementations. The fact that dma-direct uses a struct page as a cookie is an undocumented implementation detail - include dma-map-ops.h and use pgprot_dmacoherent despite a clear comment documenting that this is not acceptable - use of the VM_DMA_COHERENT for something that is not the dma-mapping code - use of VM_FLUSH_RESET_PERMS for vmap, while it is only supported for vmalloc Acked-by: Manivannan Sadhasivam Signed-off-by: Christoph Hellwig Signed-off-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-6-quic_sibis@quicinc.com --- drivers/remoteproc/qcom_q6v5_mss.c | 38 +++++------------------------- 1 file changed, 6 insertions(+), 32 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 2f4027664a0e..e2f765f87ec9 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -961,52 +960,27 @@ static void q6v5proc_halt_axi_port(struct q6v5 *qproc, static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, const char *fw_name) { - unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS | DMA_ATTR_NO_KERNEL_MAPPING; - unsigned long flags = VM_DMA_COHERENT | VM_FLUSH_RESET_PERMS; - struct page **pages; - struct page *page; + unsigned long dma_attrs = DMA_ATTR_FORCE_CONTIGUOUS; dma_addr_t phys; void *metadata; int mdata_perm; int xferop_ret; size_t size; - void *vaddr; - int count; + void *ptr; int ret; - int i; metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev); if (IS_ERR(metadata)) return PTR_ERR(metadata); - page = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); - if (!page) { + ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); + if (!ptr) { kfree(metadata); dev_err(qproc->dev, "failed to allocate mdt buffer\n"); return -ENOMEM; } - count = PAGE_ALIGN(size) >> PAGE_SHIFT; - pages = kmalloc_array(count, sizeof(struct page *), GFP_KERNEL); - if (!pages) { - ret = -ENOMEM; - goto free_dma_attrs; - } - - for (i = 0; i < count; i++) - pages[i] = nth_page(page, i); - - vaddr = vmap(pages, count, flags, pgprot_dmacoherent(PAGE_KERNEL)); - kfree(pages); - if (!vaddr) { - dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", &phys, size); - ret = -EBUSY; - goto free_dma_attrs; - } - - memcpy(vaddr, metadata, size); - - vunmap(vaddr); + memcpy(ptr, metadata, size); /* Hypervisor mapping to access metadata by modem */ mdata_perm = BIT(QCOM_SCM_VMID_HLOS); @@ -1036,7 +1010,7 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, "mdt buffer not reclaimed system may become unstable\n"); free_dma_attrs: - dma_free_attrs(qproc->dev, size, page, phys, dma_attrs); + dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); kfree(metadata); return ret < 0 ? ret : 0; From 57f72170a2b2a362c35bb9407fc844eac5afdec1 Mon Sep 17 00:00:00 2001 From: Sibi Sankar Date: Tue, 17 Jan 2023 14:28:35 +0530 Subject: [PATCH 58/69] remoteproc: qcom_q6v5_mss: Use a carveout to authenticate modem headers Any access to the dynamically allocated metadata region by the application processor after assigning it to the remote Q6 will result in a XPU violation. Fix this by replacing the dynamically allocated memory region with a no-map carveout and unmap the modem metadata memory region before passing control to the remote Q6. Reported-and-tested-by: Amit Pundir Fixes: 6c5a9dc2481b ("remoteproc: qcom: Make secure world call for mem ownership switch") Signed-off-by: Sibi Sankar Reviewed-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230117085840.32356-7-quic_sibis@quicinc.com --- drivers/remoteproc/qcom_q6v5_mss.c | 59 +++++++++++++++++++++++++++--- 1 file changed, 53 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index e2f765f87ec9..292e22f58df3 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -215,6 +216,9 @@ struct q6v5 { size_t mba_size; size_t dp_size; + phys_addr_t mdata_phys; + size_t mdata_size; + phys_addr_t mpss_phys; phys_addr_t mpss_reloc; size_t mpss_size; @@ -973,15 +977,35 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, if (IS_ERR(metadata)) return PTR_ERR(metadata); - ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); - if (!ptr) { - kfree(metadata); - dev_err(qproc->dev, "failed to allocate mdt buffer\n"); - return -ENOMEM; + if (qproc->mdata_phys) { + if (size > qproc->mdata_size) { + ret = -EINVAL; + dev_err(qproc->dev, "metadata size outside memory range\n"); + goto free_metadata; + } + + phys = qproc->mdata_phys; + ptr = memremap(qproc->mdata_phys, size, MEMREMAP_WC); + if (!ptr) { + ret = -EBUSY; + dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", + &qproc->mdata_phys, size); + goto free_metadata; + } + } else { + ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); + if (!ptr) { + ret = -ENOMEM; + dev_err(qproc->dev, "failed to allocate mdt buffer\n"); + goto free_metadata; + } } memcpy(ptr, metadata, size); + if (qproc->mdata_phys) + memunmap(ptr); + /* Hypervisor mapping to access metadata by modem */ mdata_perm = BIT(QCOM_SCM_VMID_HLOS); ret = q6v5_xfer_mem_ownership(qproc, &mdata_perm, false, true, @@ -1010,7 +1034,9 @@ static int q6v5_mpss_init_image(struct q6v5 *qproc, const struct firmware *fw, "mdt buffer not reclaimed system may become unstable\n"); free_dma_attrs: - dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); + if (!qproc->mdata_phys) + dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); +free_metadata: kfree(metadata); return ret < 0 ? ret : 0; @@ -1847,6 +1873,7 @@ static int q6v5_init_reset(struct q6v5 *qproc) static int q6v5_alloc_memory_region(struct q6v5 *qproc) { struct device_node *child; + struct reserved_mem *rmem; struct device_node *node; struct resource r; int ret; @@ -1893,6 +1920,26 @@ static int q6v5_alloc_memory_region(struct q6v5 *qproc) qproc->mpss_phys = qproc->mpss_reloc = r.start; qproc->mpss_size = resource_size(&r); + if (!child) { + node = of_parse_phandle(qproc->dev->of_node, "memory-region", 2); + } else { + child = of_get_child_by_name(qproc->dev->of_node, "metadata"); + node = of_parse_phandle(child, "memory-region", 0); + of_node_put(child); + } + + if (!node) + return 0; + + rmem = of_reserved_mem_lookup(node); + if (!rmem) { + dev_err(qproc->dev, "unable to resolve metadata region\n"); + return -EINVAL; + } + + qproc->mdata_phys = rmem->base; + qproc->mdata_size = rmem->size; + return 0; } From 640587182066f75d3e8b62522685041f00ffbbbb Mon Sep 17 00:00:00 2001 From: Tinghan Shen Date: Fri, 10 Feb 2023 11:13:54 +0800 Subject: [PATCH 59/69] remoteproc: mediatek: Check the SCP image format Do a sanity check on the SCP image before loading it to avoid driver crashes. Signed-off-by: Tinghan Shen Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230210031354.1335-1-tinghan.shen@mediatek.com Signed-off-by: Mathieu Poirier --- drivers/remoteproc/mtk_scp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c index d421a2ccaa1e..0861b76f185f 100644 --- a/drivers/remoteproc/mtk_scp.c +++ b/drivers/remoteproc/mtk_scp.c @@ -649,6 +649,7 @@ static const struct rproc_ops scp_ops = { .load = scp_load, .da_to_va = scp_da_to_va, .parse_fw = scp_parse_fw, + .sanity_check = rproc_elf_sanity_check, }; /** From 9d5b9ad97f83b2390a6006eeb5ae5e48ec4298ce Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Tue, 14 Feb 2023 19:38:11 +0530 Subject: [PATCH 60/69] remoteproc: qcom: replace kstrdup with kstrndup Since, there is no guarantee that region.name will be 0-terminated from the firmware side, replace kstrdup with kstrndup. Suggested-by: Dmitry Baryshkov Signed-off-by: Mukesh Ojha Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1676383691-29738-1-git-send-email-quic_mojha@quicinc.com --- drivers/remoteproc/qcom_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index 020349f8979d..7810f91d3080 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -124,7 +124,7 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy for (i = 0; i < seg_cnt; i++) { memcpy_fromio(®ion, ptr + i, sizeof(region)); if (region.valid == MD_REGION_VALID) { - name = kstrdup(region.name, GFP_KERNEL); + name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); if (!name) { iounmap(ptr); return -ENOMEM; From 2554dd0ac362738f588ba073d8333eb9b14f9587 Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Tue, 31 Jan 2023 21:31:06 +0530 Subject: [PATCH 61/69] remoteproc: qcom: fix sparse warnings This patch try to address below sparse warnings. drivers/remoteproc/qcom_common.c:126:27: warning: restricted __le32 degrades to integer drivers/remoteproc/qcom_common.c:133:32: warning: cast to restricted __le32 drivers/remoteproc/qcom_common.c:133:32: warning: cast from restricted __le64 Signed-off-by: Mukesh Ojha Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1675180866-16695-1-git-send-email-quic_mojha@quicinc.com --- drivers/remoteproc/qcom_common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index 7810f91d3080..abf66c6876df 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -123,14 +123,14 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy for (i = 0; i < seg_cnt; i++) { memcpy_fromio(®ion, ptr + i, sizeof(region)); - if (region.valid == MD_REGION_VALID) { + if (le32_to_cpu(region.valid) == MD_REGION_VALID) { name = kstrndup(region.name, MAX_REGION_NAME_LENGTH - 1, GFP_KERNEL); if (!name) { iounmap(ptr); return -ENOMEM; } da = le64_to_cpu(region.address); - size = le32_to_cpu(region.size); + size = le64_to_cpu(region.size); rproc_coredump_add_custom_segment(rproc, da, size, NULL, name); } } From a376c10d45a8e6ee5ea55791193f90625b35e156 Mon Sep 17 00:00:00 2001 From: Yogesh Lal Date: Wed, 2 Nov 2022 22:42:09 +0530 Subject: [PATCH 62/69] remoteproc: qcom: pas: Adjust the phys addr wrt the mem region The minidump table in the toc contains physical addresses that may lie before the physical address of the first elf segment in relocatable images. This change adds a custom dump function for minidumps which calculates the offset into the carveout region using the start of the physical address instead of the start of the first elf segment. Signed-off-by: Yogesh Lal Reviewed-by: Sibi Sankar Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1667409129-6254-1-git-send-email-quic_ylal@quicinc.com --- drivers/remoteproc/qcom_common.c | 13 +++++++++---- drivers/remoteproc/qcom_common.h | 5 ++++- drivers/remoteproc/qcom_q6v5_pas.c | 20 +++++++++++++++++++- 3 files changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/qcom_common.c b/drivers/remoteproc/qcom_common.c index abf66c6876df..a0d4238492e9 100644 --- a/drivers/remoteproc/qcom_common.c +++ b/drivers/remoteproc/qcom_common.c @@ -101,7 +101,9 @@ static void qcom_minidump_cleanup(struct rproc *rproc) } } -static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsystem *subsystem) +static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsystem *subsystem, + void (*rproc_dumpfn_t)(struct rproc *rproc, struct rproc_dump_segment *segment, + void *dest, size_t offset, size_t size)) { struct minidump_region __iomem *ptr; struct minidump_region region; @@ -131,7 +133,7 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy } da = le64_to_cpu(region.address); size = le64_to_cpu(region.size); - rproc_coredump_add_custom_segment(rproc, da, size, NULL, name); + rproc_coredump_add_custom_segment(rproc, da, size, rproc_dumpfn_t, name); } } @@ -139,7 +141,10 @@ static int qcom_add_minidump_segments(struct rproc *rproc, struct minidump_subsy return 0; } -void qcom_minidump(struct rproc *rproc, unsigned int minidump_id) +void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, + void (*rproc_dumpfn_t)(struct rproc *rproc, + struct rproc_dump_segment *segment, void *dest, size_t offset, + size_t size)) { int ret; struct minidump_subsystem *subsystem; @@ -169,7 +174,7 @@ void qcom_minidump(struct rproc *rproc, unsigned int minidump_id) return; } - ret = qcom_add_minidump_segments(rproc, subsystem); + ret = qcom_add_minidump_segments(rproc, subsystem, rproc_dumpfn_t); if (ret) { dev_err(&rproc->dev, "Failed with error: %d while adding minidump entries\n", ret); goto clean_minidump; diff --git a/drivers/remoteproc/qcom_common.h b/drivers/remoteproc/qcom_common.h index c35adf730be0..c3cc6194e483 100644 --- a/drivers/remoteproc/qcom_common.h +++ b/drivers/remoteproc/qcom_common.h @@ -33,7 +33,10 @@ struct qcom_rproc_ssr { struct qcom_ssr_subsystem *info; }; -void qcom_minidump(struct rproc *rproc, unsigned int minidump_id); +void qcom_minidump(struct rproc *rproc, unsigned int minidump_id, + void (*rproc_dumpfn_t)(struct rproc *rproc, + struct rproc_dump_segment *segment, void *dest, size_t offset, + size_t size)); void qcom_add_glink_subdev(struct rproc *rproc, struct qcom_rproc_glink *glink, const char *ssr_name); diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 4e1d9b08def4..7418f0e61943 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -105,6 +105,24 @@ struct qcom_adsp { struct qcom_scm_pas_metadata dtb_pas_metadata; }; +void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment, + void *dest, size_t offset, size_t size) +{ + struct qcom_adsp *adsp = rproc->priv; + int total_offset; + + total_offset = segment->da + segment->offset + offset - adsp->mem_phys; + if (total_offset < 0 || total_offset + size > adsp->mem_size) { + dev_err(adsp->dev, + "invalid copy request for segment %pad with offset %zu and size %zu)\n", + &segment->da, offset, size); + memset(dest, 0xff, size); + return; + } + + memcpy_fromio(dest, adsp->mem_region + total_offset, size); +} + static void adsp_minidump(struct rproc *rproc) { struct qcom_adsp *adsp = rproc->priv; @@ -112,7 +130,7 @@ static void adsp_minidump(struct rproc *rproc) if (rproc->dump_conf == RPROC_COREDUMP_DISABLED) return; - qcom_minidump(rproc, adsp->minidump_id); + qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump); } static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds, From 3c7306589dddbcc0ac53ec6b2c3a14875879e20c Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Sat, 28 Jan 2023 11:05:03 +0530 Subject: [PATCH 63/69] remoteproc: qcom: pas: Add sm6115 remoteprocs Among the subsystems in the Qualcomm sm6115 platform we find audio, compute and modem DSPs. Add support for controlling these using the peripheral authentication service (PAS) remoteproc driver. Signed-off-by: Bhupesh Sharma Reviewed-by: Mukesh Ojha Acked-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230128053504.2099620-1-bhupesh.sharma@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 7418f0e61943..3b735ff6713b 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1202,6 +1202,9 @@ static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init}, { .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init}, { .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource}, + { .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init}, + { .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init}, + { .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource}, { .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource}, { .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource}, { .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init}, From 838c558bb8bc3a9a4de840fd25c6ad0ebc4d1ed7 Mon Sep 17 00:00:00 2001 From: Bhupesh Sharma Date: Sat, 28 Jan 2023 11:05:04 +0530 Subject: [PATCH 64/69] dt-bindings: remoteproc: qcom: Add sm6115 pas yaml file This documents the aDSP, cDSP and MPSS DSPs present on the SM6115 SoC. Signed-off-by: Bhupesh Sharma Reviewed-by: Krzysztof Kozlowski Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230128053504.2099620-2-bhupesh.sharma@linaro.org --- .../bindings/remoteproc/qcom,sm6115-pas.yaml | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml new file mode 100644 index 000000000000..f5d1fa9f45f1 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml @@ -0,0 +1,143 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM6115 Peripheral Authentication Service + +maintainers: + - Bhupesh Sharma + +description: + Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots + firmware on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + - qcom,sm6115-cdsp-pas + - qcom,sm6115-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + memory-region: + minItems: 1 + description: Reference to the reserved-memory for the Hexagon core + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string + description: Firmware name for the Hexagon core + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + - qcom,sm6115-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + + - if: + properties: + compatible: + enum: + - qcom,sm6115-cdsp-pas + - qcom,sm6115-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + power-domain-names: + items: + - const: cx + + - if: + properties: + compatible: + enum: + - qcom,sm6115-adsp-pas + then: + properties: + power-domains: + items: + - description: LPI CX power domain + - description: LPI MX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + + remoteproc@ab00000 { + compatible = "qcom,sm6115-adsp-pas"; + reg = <0x0ab00000 0x100>; + + clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; + clock-names = "xo"; + + firmware-name = "qcom/sm6115/adsp.mdt"; + + interrupts-extended = <&intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&pil_adsp_mem>; + + power-domains = <&rpmpd SM6115_VDD_LPI_CX>, + <&rpmpd SM6115_VDD_LPI_MX>; + + qcom,smem-states = <&adsp_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts = ; + label = "lpass"; + qcom,remote-pid = <2>; + mboxes = <&apcs_glb 8>; + + /* ... */ + + }; + }; From a8086bd9723ac8f1f795ab64f1de7dd0b9be889a Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Mon, 6 Feb 2023 14:53:31 +0100 Subject: [PATCH 65/69] remoteproc: qcom_q6v5_pas: enable sm8550 adsp & cdsp autoboot Set the SM8550 adsp & cdsp auto_boot to true to match the behavior of the previous platforms. Fixes: 7eddedc97563 ("remoteproc: qcom_q6v5_pas: add sm8550 adsp, cdsp & mpss compatible & data") Signed-off-by: Neil Armstrong Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230206-topic-sm8550-upstream-fix-remoteproc-autoboot-v1-1-11445a0c27c6@linaro.org --- drivers/remoteproc/qcom_q6v5_pas.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 3b735ff6713b..6cc4e13c5d36 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1126,7 +1126,7 @@ static const struct adsp_data sm8550_adsp_resource = { .pas_id = 1, .dtb_pas_id = 0x24, .minidump_id = 5, - .auto_boot = false, + .auto_boot = true, .proxy_pd_names = (char*[]){ "lcx", "lmx", @@ -1145,7 +1145,7 @@ static const struct adsp_data sm8550_cdsp_resource = { .pas_id = 18, .dtb_pas_id = 0x25, .minidump_id = 7, - .auto_boot = false, + .auto_boot = true, .proxy_pd_names = (char*[]){ "cx", "mxc", From 6f998eb2fd02a7a7a529abb4c7d8bbf44fc3ff13 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Feb 2023 20:33:13 +0100 Subject: [PATCH 66/69] dt-bindings: remoteproc: qcom,sm8550-pas: correct power domains Correct CDSP and MPSS power domains to match what is used in DTS and the Linux driver: sm8550-mtp.dtb: remoteproc@32300000: power-domain-names: ['cx', 'mxc', 'nsp'] is too long Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Acked-by: Neil Armstrong Fixes: 084258d60712 ("dt-bindings: remoteproc: qcom: adsp: document sm8550 adsp, cdsp & mpss compatible") Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230206193313.30667-1-krzysztof.kozlowski@linaro.org --- .../devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml index ae612809e260..fe216aa531ed 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -99,22 +99,22 @@ allOf: properties: compatible: enum: - - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas then: properties: power-domains: items: - description: CX power domain - - description: MXC power domain + - description: MSS power domain power-domain-names: items: - const: cx - - const: mxc + - const: mss - if: properties: compatible: enum: - - qcom,sm8550-mpss-pas + - qcom,sm8550-cdsp-pas then: properties: power-domains: From fdafdddf7b2f5cab8d233ef97f1fad8ec7d2e7a0 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Feb 2023 11:15:44 +0100 Subject: [PATCH 67/69] dt-bindings: remoteproc: qcom,glink-rpm-edge: convert to DT schema Convert Qualcomm G-Link RPM edge binding to DT schema. Move it to remoteproc as it better suits the purpose - communication channel with remote processor. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230208101545.45711-6-krzysztof.kozlowski@linaro.org --- .../remoteproc/qcom,glink-rpm-edge.yaml | 99 +++++++++++++++++++ .../bindings/soc/qcom/qcom,glink.txt | 94 ------------------ 2 files changed, 99 insertions(+), 94 deletions(-) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml new file mode 100644 index 000000000000..f5a044e20c4e --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm G-Link RPM edge + +description: | + Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource + Power Manager (RPM) on various Qualcomm platforms. + +maintainers: + - Bjorn Andersson + +properties: + compatible: + const: qcom,glink-rpm + + label: + $ref: /schemas/types.yaml#/definitions/string + description: + Name of the edge, used for debugging and identification purposes. The + node name will be used if this is not present. + + interrupts: + maxItems: 1 + + mboxes: + items: + - description: rpm_hlos mailbox in APCS + + qcom,remote-pid: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The identifier for the remote processor as known by the rest of the + system. + + qcom,rpm-msg-ram: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + RPM message memory resource (compatible: qcom,rpm-msg-ram). + + rpm-requests: + type: object + $ref: /schemas/soc/qcom/qcom,smd-rpm.yaml# + unevaluatedProperties: false + description: + Qualcomm Resource Power Manager (RPM) over G-Link + + properties: + qcom,intents: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 32 + items: + items: + - description: size of each intent to preallocate + - description: amount of intents to preallocate + minimum: 1 + description: + List of (size, amount) pairs describing what intents should be + preallocated for this virtual channel. This can be used to tweak the + default intents available for the channel to meet expectations of the + remote. + + required: + - qcom,glink-channels + +required: + - compatible + - interrupts + - mboxes + +anyOf: + - required: + - qcom,remote-pid + - required: + - qcom,rpm-msg-ram + +additionalProperties: false + +examples: + - | + #include + + rpm-glink { + compatible = "qcom,glink-rpm"; + interrupts = ; + mboxes = <&apcs_glb 0>; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + + rpm-requests { + compatible = "qcom,rpm-msm8996"; + qcom,glink-channels = "rpm_requests"; + + /* ... */ + }; + }; diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt deleted file mode 100644 index 1214192847ac..000000000000 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt +++ /dev/null @@ -1,94 +0,0 @@ -Qualcomm GLINK edge binding - -This binding describes a Qualcomm GLINK edge, a fifo based mechanism for -communication between subsystem-pairs on various Qualcomm platforms. Two types -of edges can be described by the binding; the GLINK RPM edge and a SMEM based -edge. - -- compatible: - Usage: required for glink-rpm - Value type: - Definition: must be "qcom,glink-rpm" - -- label: - Usage: optional - Value type: - Definition: should specify the subsystem name this edge corresponds to. - -- interrupts: - Usage: required - Value type: - Definition: should specify the IRQ used by the remote processor to - signal this processor about communication related events - -- qcom,remote-pid: - Usage: required for glink-smem - Value type: - Definition: specifies the identifier of the remote endpoint of this edge - -- qcom,rpm-msg-ram: - Usage: required for glink-rpm - Value type: - Definition: handle to RPM message memory resource - -- mboxes: - Usage: required - Value type: - Definition: reference to the "rpm_hlos" mailbox in APCS, as described - in mailbox/mailbox.txt - -= GLINK DEVICES -Each subnode of the GLINK node represent function tied to a virtual -communication channel. The name of the nodes are not important. The properties -of these nodes are defined by the individual bindings for the specific function -- but must contain the following property: - -- qcom,glink-channels: - Usage: required - Value type: - Definition: a list of channels tied to this function, used for matching - the function to a set of virtual channels - -- qcom,intents: - Usage: optional - Value type: - Definition: a list of size,amount pairs describing what intents should - be preallocated for this virtual channel. This can be used - to tweak the default intents available for the channel to - meet expectations of the remote. - -= EXAMPLE -The following example represents the GLINK RPM node on a MSM8996 device, with -the function for the "rpm_request" channel defined, which is used for -regulators and root clocks. - - apcs_glb: mailbox@9820000 { - compatible = "qcom,msm8996-apcs-hmss-global"; - reg = <0x9820000 0x1000>; - - #mbox-cells = <1>; - }; - - rpm_msg_ram: memory@68000 { - compatible = "qcom,rpm-msg-ram"; - reg = <0x68000 0x6000>; - }; - - rpm-glink { - compatible = "qcom,glink-rpm"; - - interrupts = ; - - qcom,rpm-msg-ram = <&rpm_msg_ram>; - - mboxes = <&apcs_glb 0>; - - rpm-requests { - compatible = "qcom,rpm-msm8996"; - qcom,glink-channels = "rpm_requests"; - - qcom,intents = <0x400 5 - 0x800 1>; - ... - }; - }; From 6f9c2f19a8743c880903a031c7f3f3c534d4b813 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Feb 2023 11:15:45 +0100 Subject: [PATCH 68/69] dt-bindings: remoteproc: qcom,glink-edge: correct label description Correct the description of 'label' property. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230208101545.45711-7-krzysztof.kozlowski@linaro.org --- .../devicetree/bindings/remoteproc/qcom,glink-edge.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml index 25c27464ef25..69794e7475e6 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml @@ -35,7 +35,9 @@ properties: maxItems: 1 label: - description: The names of the state bits used for SMP2P output + description: + Name of the edge, used for debugging and identification purposes. The + node name will be used if this is not present. mboxes: maxItems: 1 From 7c855ef7137a67bcff0e039691b969428dd8ef6a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 8 Feb 2023 11:15:42 +0100 Subject: [PATCH 69/69] dt-bindings: mailbox: qcom,apcs-kpss-global: drop mbox-names from example Qualcomm G-Link RPM edge bindings do not allow and do not use mbox-names property. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230208101545.45711-4-krzysztof.kozlowski@linaro.org --- .../devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 943f9472ae10..56b386b688b3 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -155,7 +155,6 @@ examples: interrupts = ; qcom,rpm-msg-ram = <&rpm_msg_ram>; mboxes = <&apcs_glb 0>; - mbox-names = "rpm_hlos"; }; # Example apcs with qcs404