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irqchip/gic-v3: Add GICv4.1 VPEID size discovery
While GICv4.0 mandates 16 bit worth of VPEIDs, GICv4.1 allows smaller implementations to be built. Add the required glue to dynamically compute the limit. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20191224111055.11836-3-maz@kernel.org
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@ -121,7 +121,16 @@ struct its_node {
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#define ITS_ITT_ALIGN SZ_256
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/* The maximum number of VPEID bits supported by VLPI commands */
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#define ITS_MAX_VPEID_BITS (16)
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#define ITS_MAX_VPEID_BITS \
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({ \
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int nvpeid = 16; \
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if (gic_rdists->has_rvpeid && \
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gic_rdists->gicd_typer2 & GICD_TYPER2_VIL) \
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nvpeid = 1 + (gic_rdists->gicd_typer2 & \
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GICD_TYPER2_VID); \
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\
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nvpeid; \
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})
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#define ITS_MAX_VPEID (1 << (ITS_MAX_VPEID_BITS))
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/* Convert page order to size in bytes */
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@ -1576,6 +1576,9 @@ static int __init gic_init_bases(void __iomem *dist_base,
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pr_info("%d SPIs implemented\n", GIC_LINE_NR - 32);
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pr_info("%d Extended SPIs implemented\n", GIC_ESPI_NR);
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gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base + GICD_TYPER2);
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gic_data.domain = irq_domain_create_tree(handle, &gic_irq_domain_ops,
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&gic_data);
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irq_domain_update_bus_token(gic_data.domain, DOMAIN_BUS_WIRED);
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@ -13,6 +13,7 @@
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#define GICD_CTLR 0x0000
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#define GICD_TYPER 0x0004
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#define GICD_IIDR 0x0008
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#define GICD_TYPER2 0x000C
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#define GICD_STATUSR 0x0010
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#define GICD_SETSPI_NSR 0x0040
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#define GICD_CLRSPI_NSR 0x0048
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@ -89,6 +90,9 @@
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#define GICD_TYPER_ESPIS(typer) \
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(((typer) & GICD_TYPER_ESPI) ? GICD_TYPER_SPIS((typer) >> 27) : 0)
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#define GICD_TYPER2_VIL (1U << 7)
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#define GICD_TYPER2_VID GENMASK(4, 0)
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#define GICD_IROUTER_SPI_MODE_ONE (0U << 31)
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#define GICD_IROUTER_SPI_MODE_ANY (1U << 31)
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@ -615,6 +619,7 @@ struct rdists {
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void *prop_table_va;
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u64 flags;
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u32 gicd_typer;
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u32 gicd_typer2;
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bool has_vlpis;
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bool has_rvpeid;
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bool has_direct_lpi;
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