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arm: Xilinx Zynq cleanup patches for v3.11

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This branch contains two fixes:
 - Fix zynq smp code
 - Do not specify init_irq ptr
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Merge tag 'zynq-cleanup-for-3.11' of git://git.xilinx.com/linux-xlnx into next/cleanup

From Michal Simek:

arm: Xilinx Zynq cleanup patches for v3.11

This branch contains two fixes:
- Fix zynq smp code
- Do not specify init_irq ptr

* tag 'zynq-cleanup-for-3.11' of git://git.xilinx.com/linux-xlnx:
  ARM: zynq: Not to rewrite jump code when starting address is 0x0
  ARM: zynq: Remove init_irq declaration in machine description

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2013-06-20 01:39:35 +02:00
commit f25ac0a2da
2 changed files with 26 additions and 28 deletions
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2
arch/arm/mach-zynq/common.c
View File

@ -25,7 +25,6 @@
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/of.h> #include <linux/of.h>
#include <linux/irqchip.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
@ -106,7 +105,6 @@ static const char * const zynq_dt_match[] = {
MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform") MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
.smp = smp_ops(zynq_smp_ops), .smp = smp_ops(zynq_smp_ops),
.map_io = zynq_map_io, .map_io = zynq_map_io,
.init_irq = irqchip_init,
.init_machine = zynq_init_machine, .init_machine = zynq_init_machine,
.init_time = zynq_timer_init, .init_time = zynq_timer_init,
.dt_compat = zynq_dt_match, .dt_compat = zynq_dt_match,

52
arch/arm/mach-zynq/platsmp.c
View File

@ -53,34 +53,34 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
&zynq_secondary_trampoline; &zynq_secondary_trampoline;
zynq_slcr_cpu_stop(cpu); zynq_slcr_cpu_stop(cpu);
if (address) {
if (__pa(PAGE_OFFSET)) { if (__pa(PAGE_OFFSET)) {
zero = ioremap(0, trampoline_code_size); zero = ioremap(0, trampoline_code_size);
if (!zero) { if (!zero) {
pr_warn("BOOTUP jump vectors not accessible\n"); pr_warn("BOOTUP jump vectors not accessible\n");
return -1; return -1;
}
} else {
zero = (__force u8 __iomem *)PAGE_OFFSET;
} }
} else {
zero = (__force u8 __iomem *)PAGE_OFFSET; /*
* This is elegant way how to jump to any address
* 0x0: Load address at 0x8 to r0
* 0x4: Jump by mov instruction
* 0x8: Jumping address
*/
memcpy((__force void *)zero, &zynq_secondary_trampoline,
trampoline_size);
writel(address, zero + trampoline_size);
flush_cache_all();
outer_flush_range(0, trampoline_code_size);
smp_wmb();
if (__pa(PAGE_OFFSET))
iounmap(zero);
} }
/*
* This is elegant way how to jump to any address
* 0x0: Load address at 0x8 to r0
* 0x4: Jump by mov instruction
* 0x8: Jumping address
*/
memcpy((__force void *)zero, &zynq_secondary_trampoline,
trampoline_size);
writel(address, zero + trampoline_size);
flush_cache_all();
outer_flush_range(0, trampoline_code_size);
smp_wmb();
if (__pa(PAGE_OFFSET))
iounmap(zero);
zynq_slcr_cpu_start(cpu); zynq_slcr_cpu_start(cpu);
return 0; return 0;