mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-22 20:23:57 +08:00
mtd: rawnand: Pass a nand_chip object to chip->waitfunc()
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->waitfunc() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
parent
5295cf2e04
commit
f1d46942e8
@ -945,7 +945,7 @@ static int atmel_hsmc_nand_pmecc_write_pg(struct nand_chip *chip,
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dev_err(nc->base.dev, "Failed to program NAND page (err = %d)\n",
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ret);
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status = chip->waitfunc(mtd, chip);
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status = chip->waitfunc(chip);
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if (status & NAND_STATUS_FAIL)
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return -EIO;
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@ -1237,9 +1237,8 @@ static void brcmnand_cmd_ctrl(struct nand_chip *chip, int dat,
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/* intentionally left blank */
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}
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static int brcmnand_waitfunc(struct mtd_info *mtd, struct nand_chip *this)
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static int brcmnand_waitfunc(struct nand_chip *chip)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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struct brcmnand_host *host = nand_get_controller_data(chip);
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struct brcmnand_controller *ctrl = host->ctrl;
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unsigned long timeo = msecs_to_jiffies(100);
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@ -1274,7 +1273,6 @@ static int brcmnand_low_level_op(struct brcmnand_host *host,
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enum brcmnand_llop_type type, u32 data,
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bool last_op)
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{
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struct mtd_info *mtd = nand_to_mtd(&host->chip);
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struct nand_chip *chip = &host->chip;
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struct brcmnand_controller *ctrl = host->ctrl;
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u32 tmp;
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@ -1307,7 +1305,7 @@ static int brcmnand_low_level_op(struct brcmnand_host *host,
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(void)brcmnand_read_reg(ctrl, BRCMNAND_LL_OP);
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brcmnand_send_cmd(host, CMD_LOW_LEVEL_OP);
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return brcmnand_waitfunc(mtd, chip);
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return brcmnand_waitfunc(chip);
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}
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static void brcmnand_cmdfunc(struct nand_chip *chip, unsigned command,
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@ -1383,7 +1381,7 @@ static void brcmnand_cmdfunc(struct nand_chip *chip, unsigned command,
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(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
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brcmnand_send_cmd(host, native_cmd);
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brcmnand_waitfunc(mtd, chip);
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brcmnand_waitfunc(chip);
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if (native_cmd == CMD_PARAMETER_READ ||
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native_cmd == CMD_PARAMETER_CHANGE_COL) {
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@ -1615,7 +1613,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
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(void)brcmnand_read_reg(ctrl, BRCMNAND_CMD_ADDRESS);
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/* SPARE_AREA_READ does not use ECC, so just use PAGE_READ */
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brcmnand_send_cmd(host, CMD_PAGE_READ);
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brcmnand_waitfunc(mtd, chip);
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brcmnand_waitfunc(chip);
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if (likely(buf)) {
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brcmnand_soc_data_bus_prepare(ctrl->soc, false);
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@ -1893,7 +1891,7 @@ static int brcmnand_write(struct mtd_info *mtd, struct nand_chip *chip,
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/* we cannot use SPARE_AREA_PROGRAM when PARTIAL_PAGE_EN=0 */
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brcmnand_send_cmd(host, CMD_PROGRAM_PAGE);
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status = brcmnand_waitfunc(mtd, chip);
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status = brcmnand_waitfunc(chip);
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if (status & NAND_STATUS_FAIL) {
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dev_info(ctrl->dev, "program failed at %llx\n",
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@ -904,9 +904,9 @@ static void denali_select_chip(struct nand_chip *chip, int cs)
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denali->active_bank = cs;
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}
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static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
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static int denali_waitfunc(struct nand_chip *chip)
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{
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struct denali_nand_info *denali = mtd_to_denali(mtd);
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struct denali_nand_info *denali = mtd_to_denali(nand_to_mtd(chip));
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uint32_t irq_status;
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/* R/B# pin transitioned from low to high? */
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@ -433,7 +433,7 @@ static void __init doc2000_count_chips(struct mtd_info *mtd)
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pr_debug("Detected %d chips per floor.\n", i);
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}
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static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this)
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static int doc200x_wait(struct nand_chip *this)
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{
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struct doc_priv *doc = nand_get_controller_data(this);
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@ -315,7 +315,7 @@ static int poll_status(struct docg4_priv *doc)
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}
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static int docg4_wait(struct mtd_info *mtd, struct nand_chip *nand)
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static int docg4_wait(struct nand_chip *nand)
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{
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struct docg4_priv *doc = nand_get_controller_data(nand);
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@ -938,7 +938,7 @@ static int docg4_erase_block(struct mtd_info *mtd, int page)
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poll_status(doc);
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write_nop(docptr);
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status = nand->waitfunc(mtd, nand);
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status = nand->waitfunc(nand);
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if (status < 0)
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return status;
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@ -621,7 +621,7 @@ static void fsl_elbc_read_buf(struct nand_chip *chip, u8 *buf, int len)
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/* This function is called after Program and Erase Operations to
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* check for success or failure.
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*/
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static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
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static int fsl_elbc_wait(struct nand_chip *chip)
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{
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struct fsl_elbc_mtd *priv = nand_get_controller_data(chip);
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struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = priv->ctrl->nand;
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@ -720,7 +720,7 @@ static int fsl_elbc_read_page(struct nand_chip *chip, uint8_t *buf,
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if (oob_required)
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fsl_elbc_read_buf(chip, chip->oob_poi, mtd->oobsize);
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if (fsl_elbc_wait(mtd, chip) & NAND_STATUS_FAIL)
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if (fsl_elbc_wait(chip) & NAND_STATUS_FAIL)
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mtd->ecc_stats.failed++;
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return elbc_fcm_ctrl->max_bitflips;
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@ -614,8 +614,9 @@ static void fsl_ifc_read_buf(struct nand_chip *chip, u8 *buf, int len)
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* This function is called after Program and Erase Operations to
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* check for success or failure.
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*/
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static int fsl_ifc_wait(struct mtd_info *mtd, struct nand_chip *chip)
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static int fsl_ifc_wait(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct fsl_ifc_mtd *priv = nand_get_controller_data(chip);
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struct fsl_ifc_ctrl *ctrl = priv->ctrl;
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struct fsl_ifc_runtime __iomem *ifc = ctrl->rregs;
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@ -328,8 +328,9 @@ static irqreturn_t lpc3xxx_nand_irq(int irq, struct lpc32xx_nand_host *host)
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return IRQ_HANDLED;
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}
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static int lpc32xx_waitfunc_nand(struct mtd_info *mtd, struct nand_chip *chip)
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static int lpc32xx_waitfunc_nand(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
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if (readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY)
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@ -347,9 +348,9 @@ exit:
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return NAND_STATUS_READY;
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}
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static int lpc32xx_waitfunc_controller(struct mtd_info *mtd,
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struct nand_chip *chip)
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static int lpc32xx_waitfunc_controller(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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struct lpc32xx_nand_host *host = nand_get_controller_data(chip);
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if (readb(MLC_ISR(host->io_base)) & MLCISR_CONTROLLER_READY)
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@ -367,10 +368,10 @@ exit:
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return NAND_STATUS_READY;
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}
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static int lpc32xx_waitfunc(struct mtd_info *mtd, struct nand_chip *chip)
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static int lpc32xx_waitfunc(struct nand_chip *chip)
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{
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lpc32xx_waitfunc_nand(mtd, chip);
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lpc32xx_waitfunc_controller(mtd, chip);
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lpc32xx_waitfunc_nand(chip);
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lpc32xx_waitfunc_controller(chip);
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return NAND_STATUS_READY;
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}
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@ -469,7 +470,7 @@ static int lpc32xx_read_page(struct nand_chip *chip, uint8_t *buf,
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writeb(0x00, MLC_ECC_AUTO_DEC_REG(host->io_base));
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/* Wait for Controller Ready */
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lpc32xx_waitfunc_controller(mtd, chip);
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lpc32xx_waitfunc_controller(chip);
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/* Check ECC Error status */
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mlc_isr = readl(MLC_ISR(host->io_base));
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@ -550,7 +551,7 @@ static int lpc32xx_write_page_lowlevel(struct nand_chip *chip,
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writeb(0x00, MLC_ECC_AUTO_ENC_REG(host->io_base));
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/* Wait for Controller Ready */
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lpc32xx_waitfunc_controller(mtd, chip);
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lpc32xx_waitfunc_controller(chip);
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}
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return nand_prog_page_end_op(chip);
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@ -1062,8 +1062,7 @@ retry:
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* we are in interrupt context. May happen when in panic and trying to write
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* an oops through mtdoops.
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*/
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static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
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unsigned long timeo)
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static void panic_nand_wait(struct nand_chip *chip, unsigned long timeo)
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{
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int i;
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for (i = 0; i < timeo; i++) {
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@ -1093,7 +1092,7 @@ static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip,
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*
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* Wait for command done. This applies to erase and program only.
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*/
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static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
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static int nand_wait(struct nand_chip *chip)
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{
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unsigned long timeo = 400;
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@ -1111,7 +1110,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
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return ret;
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if (in_interrupt() || oops_in_progress)
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panic_nand_wait(mtd, chip, timeo);
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panic_nand_wait(chip, timeo);
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else {
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timeo = jiffies + msecs_to_jiffies(timeo);
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do {
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@ -1553,7 +1552,6 @@ EXPORT_SYMBOL_GPL(nand_read_page_op);
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static int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
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unsigned int len)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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unsigned int i;
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u8 *p = buf;
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@ -1811,7 +1809,6 @@ EXPORT_SYMBOL_GPL(nand_prog_page_begin_op);
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*/
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int nand_prog_page_end_op(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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int ret;
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u8 status;
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@ -1834,7 +1831,7 @@ int nand_prog_page_end_op(struct nand_chip *chip)
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return ret;
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} else {
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chip->cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);
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ret = chip->waitfunc(mtd, chip);
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ret = chip->waitfunc(chip);
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if (ret < 0)
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return ret;
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@ -1881,7 +1878,7 @@ int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
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chip->cmdfunc(chip, NAND_CMD_SEQIN, offset_in_page, page);
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chip->write_buf(chip, buf, len);
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chip->cmdfunc(chip, NAND_CMD_PAGEPROG, -1, -1);
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status = chip->waitfunc(mtd, chip);
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status = chip->waitfunc(chip);
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}
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if (status & NAND_STATUS_FAIL)
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@ -1970,7 +1967,6 @@ EXPORT_SYMBOL_GPL(nand_change_write_column_op);
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int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
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unsigned int len)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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unsigned int i;
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u8 *id = buf;
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@ -2016,8 +2012,6 @@ EXPORT_SYMBOL_GPL(nand_readid_op);
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*/
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int nand_status_op(struct nand_chip *chip, u8 *status)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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if (chip->exec_op) {
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const struct nand_sdr_timings *sdr =
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nand_get_sdr_timings(&chip->data_interface);
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@ -2055,8 +2049,6 @@ EXPORT_SYMBOL_GPL(nand_status_op);
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*/
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int nand_exit_status_op(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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if (chip->exec_op) {
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struct nand_op_instr instrs[] = {
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NAND_OP_CMD(NAND_CMD_READ0, 0),
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@ -2085,7 +2077,6 @@ EXPORT_SYMBOL_GPL(nand_exit_status_op);
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*/
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int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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unsigned int page = eraseblock <<
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(chip->phys_erase_shift - chip->page_shift);
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int ret;
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@ -2118,7 +2109,7 @@ int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock)
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chip->cmdfunc(chip, NAND_CMD_ERASE1, -1, page);
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chip->cmdfunc(chip, NAND_CMD_ERASE2, -1, -1);
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ret = chip->waitfunc(mtd, chip);
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ret = chip->waitfunc(chip);
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if (ret < 0)
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return ret;
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@ -2147,7 +2138,6 @@ EXPORT_SYMBOL_GPL(nand_erase_op);
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static int nand_set_features_op(struct nand_chip *chip, u8 feature,
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const void *data)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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const u8 *params = data;
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int i, ret;
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@ -2170,7 +2160,7 @@ static int nand_set_features_op(struct nand_chip *chip, u8 feature,
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for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i)
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chip->write_byte(chip, params[i]);
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ret = chip->waitfunc(mtd, chip);
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ret = chip->waitfunc(chip);
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if (ret < 0)
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return ret;
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@ -2195,7 +2185,6 @@ static int nand_set_features_op(struct nand_chip *chip, u8 feature,
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static int nand_get_features_op(struct nand_chip *chip, u8 feature,
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void *data)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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u8 *params = data;
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int i;
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@ -2256,8 +2245,6 @@ static int nand_wait_rdy_op(struct nand_chip *chip, unsigned int timeout_ms,
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*/
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int nand_reset_op(struct nand_chip *chip)
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{
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struct mtd_info *mtd = nand_to_mtd(chip);
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if (chip->exec_op) {
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const struct nand_sdr_timings *sdr =
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nand_get_sdr_timings(&chip->data_interface);
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@ -4518,7 +4505,7 @@ static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len,
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chip->select_chip(chip, chipnr);
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/* Wait for the device to get ready */
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panic_nand_wait(mtd, chip, 400);
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panic_nand_wait(chip, 400);
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memset(&ops, 0, sizeof(ops));
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ops.len = len;
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@ -981,8 +981,7 @@ static void omap_enable_hwecc(struct nand_chip *chip, int mode)
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/**
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* omap_wait - wait until the command is done
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* @mtd: MTD device structure
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* @chip: NAND Chip structure
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* @this: NAND Chip structure
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*
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* Wait function is called during Program and erase operations and
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* the way it is called from MTD layer, we should wait till the NAND
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@ -991,10 +990,9 @@ static void omap_enable_hwecc(struct nand_chip *chip, int mode)
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* Erase can take up to 400ms and program up to 20ms according to
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* general NAND and SmartMedia specs
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*/
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static int omap_wait(struct mtd_info *mtd, struct nand_chip *chip)
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static int omap_wait(struct nand_chip *this)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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struct omap_nand_info *info = mtd_to_omap(mtd);
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struct omap_nand_info *info = mtd_to_omap(nand_to_mtd(this));
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unsigned long timeo = jiffies;
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int status, state = this->state;
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@ -362,7 +362,7 @@ static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl)
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* Wait till card is ready.
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* based on nand_wait, but returns errors on DMA error
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*/
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static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
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static int r852_wait(struct nand_chip *chip)
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{
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struct r852_device *dev = nand_get_controller_data(chip);
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@ -314,7 +314,7 @@ static int tango_write_page(struct nand_chip *chip, const u8 *buf,
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if (err)
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return err;
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status = chip->waitfunc(mtd, chip);
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status = chip->waitfunc(chip);
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if (status & NAND_STATUS_FAIL)
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return -EIO;
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||||
|
||||
|
@ -186,10 +186,9 @@ static irqreturn_t tmio_irq(int irq, void *__tmio)
|
||||
*erase and write, we enable it to wake us up. The irq handler
|
||||
*disables the interrupt.
|
||||
*/
|
||||
static int
|
||||
tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip)
|
||||
static int tmio_nand_wait(struct nand_chip *nand_chip)
|
||||
{
|
||||
struct tmio_nand *tmio = mtd_to_tmio(mtd);
|
||||
struct tmio_nand *tmio = mtd_to_tmio(nand_to_mtd(nand_chip));
|
||||
long timeout;
|
||||
u8 status;
|
||||
|
||||
|
@ -695,8 +695,9 @@ static u8 spinand_read_byte(struct nand_chip *chip)
|
||||
return data;
|
||||
}
|
||||
|
||||
static int spinand_wait(struct mtd_info *mtd, struct nand_chip *chip)
|
||||
static int spinand_wait(struct nand_chip *chip)
|
||||
{
|
||||
struct mtd_info *mtd = nand_to_mtd(chip);
|
||||
struct spinand_info *info = nand_get_controller_data(chip);
|
||||
|
||||
unsigned long timeo = jiffies;
|
||||
|
@ -1294,7 +1294,7 @@ struct nand_chip {
|
||||
int (*dev_ready)(struct nand_chip *chip);
|
||||
void (*cmdfunc)(struct nand_chip *chip, unsigned command, int column,
|
||||
int page_addr);
|
||||
int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
|
||||
int (*waitfunc)(struct nand_chip *chip);
|
||||
int (*exec_op)(struct nand_chip *chip,
|
||||
const struct nand_operation *op,
|
||||
bool check_only);
|
||||
|
Loading…
Reference in New Issue
Block a user