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mmc: sdhci: Add CQE support
Add an interrupt hook and helper functions for enabling, disabling and delivering interrupts to a CQE. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
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@ -252,6 +252,8 @@ static void sdhci_init(struct sdhci_host *host, int soft)
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sdhci_set_default_irqs(host);
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host->cqe_on = false;
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if (soft) {
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/* force clock reconfiguration */
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host->clock = 0;
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@ -2672,13 +2674,19 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
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}
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do {
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DBG("IRQ status 0x%08x\n", intmask);
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if (host->ops->irq) {
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intmask = host->ops->irq(host, intmask);
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if (!intmask)
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goto cont;
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}
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/* Clear selected interrupts. */
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mask = intmask & (SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK |
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SDHCI_INT_BUS_POWER);
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sdhci_writel(host, mask, SDHCI_INT_STATUS);
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DBG("IRQ status 0x%08x\n", intmask);
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if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
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u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
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SDHCI_CARD_PRESENT;
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@ -2738,7 +2746,7 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id)
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unexpected |= intmask;
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sdhci_writel(host, intmask, SDHCI_INT_STATUS);
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}
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cont:
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if (result == IRQ_NONE)
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result = IRQ_HANDLED;
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@ -2965,6 +2973,119 @@ EXPORT_SYMBOL_GPL(sdhci_runtime_resume_host);
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#endif /* CONFIG_PM */
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/*****************************************************************************\
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* *
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* Command Queue Engine (CQE) helpers *
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* *
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\*****************************************************************************/
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void sdhci_cqe_enable(struct mmc_host *mmc)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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unsigned long flags;
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u8 ctrl;
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spin_lock_irqsave(&host->lock, flags);
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ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
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ctrl &= ~SDHCI_CTRL_DMA_MASK;
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if (host->flags & SDHCI_USE_64_BIT_DMA)
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ctrl |= SDHCI_CTRL_ADMA64;
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else
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ctrl |= SDHCI_CTRL_ADMA32;
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sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
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sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 512),
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SDHCI_BLOCK_SIZE);
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/* Set maximum timeout */
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sdhci_writeb(host, 0xE, SDHCI_TIMEOUT_CONTROL);
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host->ier = host->cqe_ier;
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sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
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sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
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host->cqe_on = true;
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pr_debug("%s: sdhci: CQE on, IRQ mask %#x, IRQ status %#x\n",
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mmc_hostname(mmc), host->ier,
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sdhci_readl(host, SDHCI_INT_STATUS));
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mmiowb();
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spin_unlock_irqrestore(&host->lock, flags);
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}
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EXPORT_SYMBOL_GPL(sdhci_cqe_enable);
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void sdhci_cqe_disable(struct mmc_host *mmc, bool recovery)
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{
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struct sdhci_host *host = mmc_priv(mmc);
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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sdhci_set_default_irqs(host);
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host->cqe_on = false;
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if (recovery) {
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sdhci_do_reset(host, SDHCI_RESET_CMD);
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sdhci_do_reset(host, SDHCI_RESET_DATA);
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}
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pr_debug("%s: sdhci: CQE off, IRQ mask %#x, IRQ status %#x\n",
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mmc_hostname(mmc), host->ier,
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sdhci_readl(host, SDHCI_INT_STATUS));
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mmiowb();
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spin_unlock_irqrestore(&host->lock, flags);
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}
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EXPORT_SYMBOL_GPL(sdhci_cqe_disable);
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bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
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int *data_error)
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{
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u32 mask;
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if (!host->cqe_on)
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return false;
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if (intmask & (SDHCI_INT_INDEX | SDHCI_INT_END_BIT | SDHCI_INT_CRC))
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*cmd_error = -EILSEQ;
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else if (intmask & SDHCI_INT_TIMEOUT)
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*cmd_error = -ETIMEDOUT;
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else
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*cmd_error = 0;
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if (intmask & (SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC))
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*data_error = -EILSEQ;
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else if (intmask & SDHCI_INT_DATA_TIMEOUT)
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*data_error = -ETIMEDOUT;
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else if (intmask & SDHCI_INT_ADMA_ERROR)
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*data_error = -EIO;
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else
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*data_error = 0;
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/* Clear selected interrupts. */
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mask = intmask & host->cqe_ier;
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sdhci_writel(host, mask, SDHCI_INT_STATUS);
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if (intmask & SDHCI_INT_BUS_POWER)
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pr_err("%s: Card is consuming too much power!\n",
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mmc_hostname(host->mmc));
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intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR);
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if (intmask) {
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sdhci_writel(host, intmask, SDHCI_INT_STATUS);
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pr_err("%s: CQE: Unexpected interrupt 0x%08x.\n",
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mmc_hostname(host->mmc), intmask);
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sdhci_dumpregs(host);
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}
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return true;
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}
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EXPORT_SYMBOL_GPL(sdhci_cqe_irq);
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/*****************************************************************************\
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* *
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* Device allocation/registration *
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@ -2990,6 +3111,9 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
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host->flags = SDHCI_SIGNALING_330;
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host->cqe_ier = SDHCI_CQE_INT_MASK;
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host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK;
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return host;
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}
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@ -134,6 +134,7 @@
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#define SDHCI_INT_CARD_REMOVE 0x00000080
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#define SDHCI_INT_CARD_INT 0x00000100
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#define SDHCI_INT_RETUNE 0x00001000
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#define SDHCI_INT_CQE 0x00004000
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#define SDHCI_INT_ERROR 0x00008000
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#define SDHCI_INT_TIMEOUT 0x00010000
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#define SDHCI_INT_CRC 0x00020000
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@ -158,6 +159,13 @@
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SDHCI_INT_BLK_GAP)
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#define SDHCI_INT_ALL_MASK ((unsigned int)-1)
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#define SDHCI_CQE_INT_ERR_MASK ( \
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SDHCI_INT_ADMA_ERROR | SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | \
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SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | \
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SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)
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#define SDHCI_CQE_INT_MASK (SDHCI_CQE_INT_ERR_MASK | SDHCI_INT_CQE)
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#define SDHCI_ACMD12_ERR 0x3C
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#define SDHCI_HOST_CONTROL2 0x3E
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@ -518,6 +526,10 @@ struct sdhci_host {
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/* cached registers */
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u32 ier;
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bool cqe_on; /* CQE is operating */
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u32 cqe_ier; /* CQE interrupt mask */
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u32 cqe_err_ier; /* CQE error interrupt mask */
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wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */
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unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */
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@ -544,6 +556,8 @@ struct sdhci_ops {
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void (*set_power)(struct sdhci_host *host, unsigned char mode,
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unsigned short vdd);
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u32 (*irq)(struct sdhci_host *host, u32 intmask);
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int (*enable_dma)(struct sdhci_host *host);
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unsigned int (*get_max_clock)(struct sdhci_host *host);
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unsigned int (*get_min_clock)(struct sdhci_host *host);
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@ -697,6 +711,11 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host);
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int sdhci_runtime_resume_host(struct sdhci_host *host);
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#endif
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void sdhci_cqe_enable(struct mmc_host *mmc);
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void sdhci_cqe_disable(struct mmc_host *mmc, bool recovery);
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bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
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int *data_error);
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void sdhci_dumpregs(struct sdhci_host *host);
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#endif /* __SDHCI_HW_H */
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