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https://github.com/edk2-porting/linux-next.git
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[MIPS] TX49x7: Fix reporting of the CPU name and PCI clock
I've noticed that PCI clock was incorrectly reported as 66 MHz while being
mere 33 MHz on RBTX4937 board -- this was due to the different encoding of
the PCI divisor field in CCFG register between TX4927 and TX4937 chips...
Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937");
and some debug printk() were duplicating each other...
Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Sergei Shtylylov
Ralf Baechle
parent
c226f2601f
commit
f09678af51
@ -60,7 +60,6 @@ void __init prom_init_cmdline(void)
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void __init prom_init(void)
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{
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const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES;
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extern int tx4927_get_mem_size(void);
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extern char* toshiba_name;
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int msize;
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@ -69,12 +68,13 @@ void __init prom_init(void)
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mips_machgroup = MACH_GROUP_TOSHIBA;
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if ((read_c0_prid() & 0xff) == PRID_REV_TX4927)
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if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
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mips_machtype = MACH_TOSHIBA_RBTX4927;
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else
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toshiba_name = "TX4927";
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} else {
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mips_machtype = MACH_TOSHIBA_RBTX4937;
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toshiba_name = toshiba_name_list[mips_machtype];
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toshiba_name = "TX4937";
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}
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msize = tx4927_get_mem_size();
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add_memory_region(0, msize << 20, BOOT_MEM_RAM);
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@ -539,19 +539,10 @@ void tx4927_pci_setup(void)
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
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"0x%08lx=mips_io_port_base",
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mips_io_port_base);
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
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"setup pci_io_resource to 0x%08lx 0x%08lx\n",
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pci_io_resource.start,
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pci_io_resource.end);
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
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"setup pci_mem_resource to 0x%08lx 0x%08lx\n",
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pci_mem_resource.start,
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pci_mem_resource.end);
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if (!called) {
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printk
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("TX4927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
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("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
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toshiba_name,
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(unsigned short) (tx4927_pcicptr->pciid >> 16),
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(unsigned short) (tx4927_pcicptr->pciid & 0xffff),
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(unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
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@ -564,21 +555,52 @@ void tx4927_pci_setup(void)
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(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
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if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
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int pciclk = 0;
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switch ((unsigned long) tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
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case TX4927_CCFG_PCIDIVMODE_2_5:
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pciclk = tx4927_cpu_clock * 2 / 5;
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break;
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case TX4927_CCFG_PCIDIVMODE_3:
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pciclk = tx4927_cpu_clock / 3;
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break;
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case TX4927_CCFG_PCIDIVMODE_5:
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pciclk = tx4927_cpu_clock / 5;
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break;
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case TX4927_CCFG_PCIDIVMODE_6:
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pciclk = tx4927_cpu_clock / 6;
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break;
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}
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if (mips_machtype == MACH_TOSHIBA_RBTX4937)
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switch ((unsigned long) tx4927_ccfgptr->
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ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
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case TX4937_CCFG_PCIDIVMODE_4:
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pciclk = tx4927_cpu_clock / 4;
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break;
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case TX4937_CCFG_PCIDIVMODE_4_5:
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pciclk = tx4927_cpu_clock * 2 / 9;
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break;
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case TX4937_CCFG_PCIDIVMODE_5:
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pciclk = tx4927_cpu_clock / 5;
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break;
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case TX4937_CCFG_PCIDIVMODE_5_5:
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pciclk = tx4927_cpu_clock * 2 / 11;
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break;
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case TX4937_CCFG_PCIDIVMODE_8:
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pciclk = tx4927_cpu_clock / 8;
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break;
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case TX4937_CCFG_PCIDIVMODE_9:
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pciclk = tx4927_cpu_clock / 9;
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break;
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case TX4937_CCFG_PCIDIVMODE_10:
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pciclk = tx4927_cpu_clock / 10;
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break;
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case TX4937_CCFG_PCIDIVMODE_11:
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pciclk = tx4927_cpu_clock / 11;
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break;
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}
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else
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switch ((unsigned long) tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
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case TX4927_CCFG_PCIDIVMODE_2_5:
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pciclk = tx4927_cpu_clock * 2 / 5;
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break;
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case TX4927_CCFG_PCIDIVMODE_3:
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pciclk = tx4927_cpu_clock / 3;
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break;
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case TX4927_CCFG_PCIDIVMODE_5:
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pciclk = tx4927_cpu_clock / 5;
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break;
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case TX4927_CCFG_PCIDIVMODE_6:
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pciclk = tx4927_cpu_clock / 6;
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break;
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}
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printk("Internal(%dMHz)", pciclk / 1000000);
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} else {
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int pciclk = 0;
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@ -823,17 +845,33 @@ void __init toshiba_rbtx4927_setup(void)
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/* PCIC */
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/*
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* ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
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* PCIDIVMODE[12:11]'s initial value are given by S9[4:3] (ON:0, OFF:1).
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*
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* For TX4927:
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* PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
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* CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
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* CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
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* CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
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* CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
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* i.e. S9[3]: ON (83MHz), OFF (100MHz)
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*
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* For TX4937:
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* PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
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* PCIDIVMODE[10] is 0.
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* CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
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* CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
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* CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
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* CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
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* CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
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* CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
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*
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*/
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
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"ccfg is %lx, DIV is %x\n",
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(unsigned long) tx4927_ccfgptr->
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ccfg, TX4927_CCFG_PCIDIVMODE_MASK);
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"ccfg is %lx, PCIDIVMODE is %x\n",
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(unsigned long) tx4927_ccfgptr->ccfg,
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(unsigned long) tx4927_ccfgptr->ccfg &
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(mips_machtype == MACH_TOSHIBA_RBTX4937 ?
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TX4937_CCFG_PCIDIVMODE_MASK :
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TX4927_CCFG_PCIDIVMODE_MASK));
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
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"PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
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@ -844,20 +882,30 @@ void __init toshiba_rbtx4927_setup(void)
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(unsigned long) tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIXARB);
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TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
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"PCIDIVMODE is %lx\n",
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(unsigned long) tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIDIVMODE_MASK);
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switch ((unsigned long) tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
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case TX4927_CCFG_PCIDIVMODE_2_5:
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case TX4927_CCFG_PCIDIVMODE_5:
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tx4927_cpu_clock = 166000000; /* 166MHz */
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break;
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default:
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tx4927_cpu_clock = 200000000; /* 200MHz */
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}
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if (mips_machtype == MACH_TOSHIBA_RBTX4937)
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switch ((unsigned long)tx4927_ccfgptr->
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ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
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case TX4937_CCFG_PCIDIVMODE_8:
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case TX4937_CCFG_PCIDIVMODE_4:
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tx4927_cpu_clock = 266666666; /* 266MHz */
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break;
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case TX4937_CCFG_PCIDIVMODE_9:
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case TX4937_CCFG_PCIDIVMODE_4_5:
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tx4927_cpu_clock = 300000000; /* 300MHz */
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break;
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default:
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tx4927_cpu_clock = 333333333; /* 333MHz */
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}
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else
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switch ((unsigned long)tx4927_ccfgptr->
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ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
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case TX4927_CCFG_PCIDIVMODE_2_5:
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case TX4927_CCFG_PCIDIVMODE_5:
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tx4927_cpu_clock = 166666666; /* 166MHz */
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break;
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default:
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tx4927_cpu_clock = 200000000; /* 200MHz */
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}
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/* CCFG */
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/* enable Timeout BusError */
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@ -253,6 +253,16 @@ struct tx4927_pcic_reg {
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#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
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#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
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#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
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#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
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#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
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#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
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#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
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#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
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#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
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#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
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#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
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/* PCFG : Pin Configuration */
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#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
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#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
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