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mfd: wm5110: Add registers for custom write sequence triggers

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This register will be needed as part of some additional support for the
headphone path on wm5110, so this patch adds the register and sets up
its regmap config.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Charles Keepax 2015-07-07 15:28:12 +01:00 committed by Mark Brown
parent d770e558e2
commit f089d4d20f
2 changed files with 39 additions and 0 deletions
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2
drivers/mfd/wm5110-tables.c
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@ -676,6 +676,7 @@ static const struct reg_default wm5110_reg_default[] = {
{ 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */
{ 0x00000040, 0x0000 }, /* R64 - Wake control */
{ 0x00000041, 0x0000 }, /* R65 - Sequence control */
{ 0x00000042, 0x0000 }, /* R66 - Spare Triggers */
{ 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */
{ 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */
{ 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */
@ -1716,6 +1717,7 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg)
case ARIZONA_PWM_DRIVE_3:
case ARIZONA_WAKE_CONTROL:
case ARIZONA_SEQUENCE_CONTROL:
case ARIZONA_SPARE_TRIGGERS:
case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1:
case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2:
case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3:

37
include/linux/mfd/arizona/registers.h
View File

@ -39,6 +39,7 @@
#define ARIZONA_PWM_DRIVE_3 0x32
#define ARIZONA_WAKE_CONTROL 0x40
#define ARIZONA_SEQUENCE_CONTROL 0x41
#define ARIZONA_SPARE_TRIGGERS 0x42
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1 0x61
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2 0x62
#define ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3 0x63
@ -1430,6 +1431,42 @@
#define ARIZONA_WSEQ_ENA_JD2_RISE_SHIFT 0 /* WSEQ_ENA_JD2_RISE */
#define ARIZONA_WSEQ_ENA_JD2_RISE_WIDTH 1 /* WSEQ_ENA_JD2_RISE */
/*
* R66 (0x42) - Spare Triggers
*/
#define ARIZONA_WS_TRG8 0x0080 /* WS_TRG8 */
#define ARIZONA_WS_TRG8_MASK 0x0080 /* WS_TRG8 */
#define ARIZONA_WS_TRG8_SHIFT 7 /* WS_TRG8 */
#define ARIZONA_WS_TRG8_WIDTH 1 /* WS_TRG8 */
#define ARIZONA_WS_TRG7 0x0040 /* WS_TRG7 */
#define ARIZONA_WS_TRG7_MASK 0x0040 /* WS_TRG7 */
#define ARIZONA_WS_TRG7_SHIFT 6 /* WS_TRG7 */
#define ARIZONA_WS_TRG7_WIDTH 1 /* WS_TRG7 */
#define ARIZONA_WS_TRG6 0x0020 /* WS_TRG6 */
#define ARIZONA_WS_TRG6_MASK 0x0020 /* WS_TRG6 */
#define ARIZONA_WS_TRG6_SHIFT 5 /* WS_TRG6 */
#define ARIZONA_WS_TRG6_WIDTH 1 /* WS_TRG6 */
#define ARIZONA_WS_TRG5 0x0010 /* WS_TRG5 */
#define ARIZONA_WS_TRG5_MASK 0x0010 /* WS_TRG5 */
#define ARIZONA_WS_TRG5_SHIFT 4 /* WS_TRG5 */
#define ARIZONA_WS_TRG5_WIDTH 1 /* WS_TRG5 */
#define ARIZONA_WS_TRG4 0x0008 /* WS_TRG4 */
#define ARIZONA_WS_TRG4_MASK 0x0008 /* WS_TRG4 */
#define ARIZONA_WS_TRG4_SHIFT 3 /* WS_TRG4 */
#define ARIZONA_WS_TRG4_WIDTH 1 /* WS_TRG4 */
#define ARIZONA_WS_TRG3 0x0004 /* WS_TRG3 */
#define ARIZONA_WS_TRG3_MASK 0x0004 /* WS_TRG3 */
#define ARIZONA_WS_TRG3_SHIFT 2 /* WS_TRG3 */
#define ARIZONA_WS_TRG3_WIDTH 1 /* WS_TRG3 */
#define ARIZONA_WS_TRG2 0x0002 /* WS_TRG2 */
#define ARIZONA_WS_TRG2_MASK 0x0002 /* WS_TRG2 */
#define ARIZONA_WS_TRG2_SHIFT 1 /* WS_TRG2 */
#define ARIZONA_WS_TRG2_WIDTH 1 /* WS_TRG2 */
#define ARIZONA_WS_TRG1 0x0001 /* WS_TRG1 */
#define ARIZONA_WS_TRG1_MASK 0x0001 /* WS_TRG1 */
#define ARIZONA_WS_TRG1_SHIFT 0 /* WS_TRG1 */
#define ARIZONA_WS_TRG1_WIDTH 1 /* WS_TRG1 */
/*
* R97 (0x61) - Sample Rate Sequence Select 1
*/