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reset: imx7: add the cm4 reset for i.MX8MQ
Add the cm4 reset used by the remoteproc driver Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -178,6 +178,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
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[IMX8MQ_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) },
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[IMX8MQ_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) },
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[IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
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[IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) },
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[IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
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[IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) },
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[IMX8MQ_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) },
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[IMX8MQ_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) },
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[IMX8MQ_RESET_M4_ENABLE] = { SRC_M4RCR, BIT(3) },
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[IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
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[IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) },
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[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
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[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
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[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
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[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
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@ -238,6 +241,7 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
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case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
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case IMX8MQ_RESET_M4_ENABLE:
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value = assert ? 0 : bit;
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value = assert ? 0 : bit;
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break;
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break;
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}
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}
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