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[ARM] S3C64XX: Fix s3c64xx_setrate_clksrc

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Some of the rate selection logic in s3c64xx_setrate_clksrc uses what
appears to be parent clock selection logic. This patch corrects it.

I also added a check for overly large dividers to prevent them from
changing unrelated clocks.

Signed-off-by: Werner Almesberger <werner@openmoko.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Werner Almesberger 2009-02-27 08:03:07 -03:00 committed by Ben Dooks
parent fdca9bf2da
commit efeff56867
1 changed files with 4 additions and 2 deletions
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6
arch/arm/plat-s3c64xx/s3c6400-clock.c
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@ -239,10 +239,12 @@ static int s3c64xx_setrate_clksrc(struct clk *clk, unsigned long rate)
rate = clk_round_rate(clk, rate);
div = clk_get_rate(clk->parent) / rate;
if (div > 16)
return -EINVAL;
val = __raw_readl(reg);
val &= ~sclk->mask;
val |= (rate - 1) << sclk->shift;
val &= ~(0xf << sclk->shift);
val |= (div - 1) << sclk->shift;
__raw_writel(val, reg);
return 0;