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drm/rockchip: Correct vop out_mode configure
Force vop output mode on encoder driver seem not a good idea, EDP, HDMI, DisplayPort all have 10bit input on rk3399, On non-10bit vop, vop 8bit output bit[0-7] connect to the encoder high 8bit [2-9]. So force RGB10 to RGB888 on vop driver would be better. And another problem, EDP check crtc id on atomic_check, but encoder maybe NULL, so out_mode configure would fail, it cause edp no display. Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Jeffy Chen <jeffy.chen@rock-chips.com> Link: http://patchwork.freedesktop.org/patch/msgid/1495885416-22216-1-git-send-email-mark.yao@rock-chips.com
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@ -245,8 +245,6 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_connector_state *conn_state)
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{
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
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struct rockchip_dp_device *dp = to_dp(encoder);
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int ret;
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/*
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* The hardware IC designed that VOP must output the RGB10 video
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@ -258,16 +256,6 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
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s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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s->output_type = DRM_MODE_CONNECTOR_eDP;
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if (dp->data->chip_type == RK3399_EDP) {
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/*
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* For RK3399, VOP Lit must code the out mode to RGB888,
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* VOP Big must code the out mode to RGB10.
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*/
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node,
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encoder);
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if (ret > 0)
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s->output_mode = ROCKCHIP_OUT_MODE_P888;
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}
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return 0;
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}
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@ -615,7 +615,6 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
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{
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struct cdn_dp_device *dp = encoder_to_dp(encoder);
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int ret, val;
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struct rockchip_crtc_state *state;
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ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
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if (ret < 0) {
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@ -625,14 +624,10 @@ static void cdn_dp_encoder_enable(struct drm_encoder *encoder)
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DRM_DEV_DEBUG_KMS(dp->dev, "vop %s output to cdn-dp\n",
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(ret) ? "LIT" : "BIG");
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state = to_rockchip_crtc_state(encoder->crtc->state);
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if (ret) {
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if (ret)
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val = DP_SEL_VOP_LIT | (DP_SEL_VOP_LIT << 16);
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state->output_mode = ROCKCHIP_OUT_MODE_P888;
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} else {
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else
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val = DP_SEL_VOP_LIT << 16;
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state->output_mode = ROCKCHIP_OUT_MODE_AAAA;
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}
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ret = cdn_dp_grf_write(dp, GRF_SOC_CON9, val);
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if (ret)
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@ -875,6 +875,7 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc,
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static void vop_crtc_enable(struct drm_crtc *crtc)
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{
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struct vop *vop = to_vop(crtc);
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const struct vop_data *vop_data = vop->data;
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struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state);
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struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;
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u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start;
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@ -967,6 +968,13 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
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DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n",
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s->output_type);
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}
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/*
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* if vop is not support RGB10 output, need force RGB10 to RGB888.
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*/
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if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA &&
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!(vop_data->feature & VOP_FEATURE_OUTPUT_RGB10))
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s->output_mode = ROCKCHIP_OUT_MODE_P888;
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VOP_CTRL_SET(vop, out_mode, s->output_mode);
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VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len);
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@ -142,6 +142,9 @@ struct vop_data {
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const struct vop_intr *intr;
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const struct vop_win_data *win;
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unsigned int win_size;
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#define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
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u64 feature;
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};
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/* interrupt define */
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@ -275,6 +275,7 @@ static const struct vop_intr rk3288_vop_intr = {
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static const struct vop_data rk3288_vop = {
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.init_table = rk3288_init_reg_table,
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.table_size = ARRAY_SIZE(rk3288_init_reg_table),
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.feature = VOP_FEATURE_OUTPUT_RGB10,
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.intr = &rk3288_vop_intr,
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.ctrl = &rk3288_ctrl_data,
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.win = rk3288_vop_win_data,
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@ -343,6 +344,7 @@ static const struct vop_reg_data rk3399_init_reg_table[] = {
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static const struct vop_data rk3399_vop_big = {
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.init_table = rk3399_init_reg_table,
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.table_size = ARRAY_SIZE(rk3399_init_reg_table),
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.feature = VOP_FEATURE_OUTPUT_RGB10,
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.intr = &rk3399_vop_intr,
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.ctrl = &rk3399_ctrl_data,
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/*
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