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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-11 14:53:56 +08:00

Char / Misc driver updates for 5.14-rc1

Here is the big set of char / misc and other driver subsystem updates
 for 5.14-rc1.  Included in here are:
 	- habanna driver updates
 	- fsl-mc driver updates
 	- comedi driver updates
 	- fpga driver updates
 	- extcon driver updates
 	- interconnect driver updates
 	- mei driver updates
 	- nvmem driver updates
 	- phy driver updates
 	- pnp driver updates
 	- soundwire driver updates
 	- lots of other tiny driver updates for char and misc drivers
 
 This is looking more and more like the "various driver subsystems mushed
 together" tree...
 
 All of these have been in linux-next for a while with no reported
 issues.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char / misc driver updates from Greg KH:
 "Here is the big set of char / misc and other driver subsystem updates
  for 5.14-rc1. Included in here are:

   - habanalabs driver updates

   - fsl-mc driver updates

   - comedi driver updates

   - fpga driver updates

   - extcon driver updates

   - interconnect driver updates

   - mei driver updates

   - nvmem driver updates

   - phy driver updates

   - pnp driver updates

   - soundwire driver updates

   - lots of other tiny driver updates for char and misc drivers

  This is looking more and more like the "various driver subsystems
  mushed together" tree...

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits)
  mcb: Use DEFINE_RES_MEM() helper macro and fix the end address
  PNP: moved EXPORT_SYMBOL so that it immediately followed its function/variable
  bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls
  bus: mhi: Wait for M2 state during system resume
  bus: mhi: core: Fix power down latency
  intel_th: Wait until port is in reset before programming it
  intel_th: msu: Make contiguous buffers uncached
  intel_th: Remove an unused exit point from intel_th_remove()
  stm class: Spelling fix
  nitro_enclaves: Set Bus Master for the NE PCI device
  misc: ibmasm: Modify matricies to matrices
  misc: vmw_vmci: return the correct errno code
  siox: Simplify error handling via dev_err_probe()
  fpga: machxo2-spi: Address warning about unused variable
  lkdtm/heap: Add init_on_alloc tests
  selftests/lkdtm: Enable various testable CONFIGs
  lkdtm: Add CONFIG hints in errors where possible
  lkdtm: Enable DOUBLE_FAULT on all architectures
  lkdtm/heap: Add vmalloc linear overflow test
  lkdtm/bugs: XFAIL UNALIGNED_LOAD_STORE_WRITE
  ...
This commit is contained in:
Linus Torvalds 2021-07-05 13:42:16 -07:00
commit eed0218e8c
287 changed files with 11680 additions and 2831 deletions

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@ -0,0 +1,13 @@
What: /sys/bus/w1/devices/.../page1
Date: April 2021
Contact: Luiz Sampaio <sampaio.ime@gmail.com>
Description: read the contents of the page1 of the DS2438
see Documentation/w1/slaves/w1_ds2438.rst for detailed information
Users: any user space application which wants to communicate with DS2438
What: /sys/bus/w1/devices/.../offset
Date: April 2021
Contact: Luiz Sampaio <sampaio.ime@gmail.com>
Description: write the contents to the offset register of the DS2438
see Documentation/w1/slaves/w1_ds2438.rst for detailed information
Users: any user space application which wants to communicate with DS2438

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@ -207,6 +207,14 @@ Contact: ogabbay@kernel.org
Description: Sets the PCI power state. Valid values are "1" for D0 and "2"
for D3Hot
What: /sys/kernel/debug/habanalabs/hl<n>/skip_reset_on_timeout
Date: Jun 2021
KernelVersion: 5.13
Contact: ynudelman@habana.ai
Description: Sets the skip reset on timeout option for the device. Value of
"0" means device will be reset in case some CS has timed out,
otherwise it will not be reset.
What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err
Date: Mar 2020
KernelVersion: 5.6

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@ -0,0 +1,19 @@
What: /sys/class/spi_master/spi<bus>/spi<bus>.<dev>/fram
Date: June 2021
KernelVersion: 5.14
Contact: Jiri Prchal <jiri.prchal@aksignal.cz>
Description:
Contains the FRAM binary data. Same as EEPROM, just another file
name to indicate that it employs ferroelectric process.
It performs write operations at bus speed - no write delays.
What: /sys/class/spi_master/spi<bus>/spi<bus>.<dev>/sernum
Date: May 2021
KernelVersion: 5.14
Contact: Jiri Prchal <jiri.prchal@aksignal.cz>
Description:
Contains the serial number of the Cypress FRAM (FM25VN) if it is
present. It will be displayed as a 8 byte hex string, as read
from the device.
This is a read-only attribute.

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@ -4,14 +4,16 @@
$id: "http://devicetree.org/schemas/eeprom/at25.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: SPI EEPROMs compatible with Atmel's AT25
title: SPI EEPROMs or FRAMs compatible with Atmel's AT25
maintainers:
- Christian Eggers <ceggers@arri.de>
properties:
$nodename:
pattern: "^eeprom@[0-9a-f]{1,2}$"
anyOf:
- pattern: "^eeprom@[0-9a-f]{1,2}$"
- pattern: "^fram@[0-9a-f]{1,2}$"
# There are multiple known vendors who manufacture EEPROM chips compatible
# with Atmel's AT25. The compatible string requires two items where the
@ -31,6 +33,7 @@ properties:
- microchip,25lc040
- st,m95m02
- st,m95256
- cypress,fm25
- const: atmel,at25
@ -47,7 +50,7 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072]
description:
Size of the eeprom page.
Size of the eeprom page. FRAMs don't have pages.
size:
$ref: /schemas/types.yaml#/definitions/uint32
@ -100,6 +103,16 @@ required:
- compatible
- reg
- spi-max-frequency
allOf:
- if:
properties:
compatible:
not:
contains:
const: cypress,fm25
then:
required:
- pagesize
- size
- address-width
@ -125,4 +138,10 @@ examples:
size = <32768>;
address-width = <16>;
};
fram@1 {
compatible = "cypress,fm25", "atmel,at25";
reg = <1>;
spi-max-frequency = <40000000>;
};
};

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@ -1,21 +0,0 @@
* SM5502 MUIC (Micro-USB Interface Controller) device
The Silicon Mitus SM5502 is a MUIC (Micro-USB Interface Controller) device
which can detect the state of external accessory when external accessory is
attached or detached and button is pressed or released. It is interfaced to
the host controller using an I2C interface.
Required properties:
- compatible: Should be "siliconmitus,sm5502-muic"
- reg: Specifies the I2C slave address of the MUIC block. It should be 0x25
- interrupts: Interrupt specifiers for detection interrupt sources.
Example:
sm5502@25 {
compatible = "siliconmitus,sm5502-muic";
interrupt-parent = <&gpx1>;
interrupts = <5 0>;
reg = <0x25>;
};

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@ -0,0 +1,52 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/extcon/siliconmitus,sm5502-muic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SM5502/SM5504 MUIC (Micro-USB Interface Controller) device
maintainers:
- Chanwoo Choi <cw00.choi@samsung.com>
description:
The Silicon Mitus SM5502 is a MUIC (Micro-USB Interface Controller) device
which can detect the state of external accessory when external accessory is
attached or detached and button is pressed or released. It is interfaced to
the host controller using an I2C interface.
properties:
compatible:
enum:
- siliconmitus,sm5502-muic
- siliconmitus,sm5504-muic
reg:
maxItems: 1
description: I2C slave address of the device. Usually 0x25 for SM5502,
0x14 for SM5504.
interrupts:
maxItems: 1
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
extcon@25 {
compatible = "siliconmitus,sm5502-muic";
reg = <0x25>;
interrupt-parent = <&msmgpio>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
};
};

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@ -38,7 +38,7 @@ Partial Reconfiguration (PR)
Partial Reconfiguration Region (PRR)
* Also called a "reconfigurable partition"
* A PRR is a specific section of a FPGA reserved for reconfiguration.
* A PRR is a specific section of an FPGA reserved for reconfiguration.
* A base (or static) FPGA image may create a set of PRR's that later may
be independently reprogrammed many times.
* The size and specific location of each PRR is fixed.
@ -105,7 +105,7 @@ reprogrammed independently while the rest of the system continues to function.
Sequence
========
When a DT overlay that targets a FPGA Region is applied, the FPGA Region will
When a DT overlay that targets an FPGA Region is applied, the FPGA Region will
do the following:
1. Disable appropriate FPGA bridges.
@ -134,8 +134,8 @@ The intended use is that a Device Tree overlay (DTO) can be used to reprogram an
FPGA while an operating system is running.
An FPGA Region that exists in the live Device Tree reflects the current state.
If the live tree shows a "firmware-name" property or child nodes under a FPGA
Region, the FPGA already has been programmed. A DTO that targets a FPGA Region
If the live tree shows a "firmware-name" property or child nodes under an FPGA
Region, the FPGA already has been programmed. A DTO that targets an FPGA Region
and adds the "firmware-name" property is taken as a request to reprogram the
FPGA. After reprogramming is successful, the overlay is accepted into the live
tree.
@ -152,9 +152,9 @@ These FPGA regions are children of FPGA bridges which are then children of the
base FPGA region. The "Full Reconfiguration to add PRR's" example below shows
this.
If an FPGA Region does not specify a FPGA Manager, it will inherit the FPGA
If an FPGA Region does not specify an FPGA Manager, it will inherit the FPGA
Manager specified by its ancestor FPGA Region. This supports both the case
where the same FPGA Manager is used for all of a FPGA as well the case where
where the same FPGA Manager is used for all of an FPGA as well the case where
a different FPGA Manager is used for each region.
FPGA Regions do not inherit their ancestor FPGA regions' bridges. This prevents
@ -166,7 +166,7 @@ within the static image of the FPGA.
Required properties:
- compatible : should contain "fpga-region"
- fpga-mgr : should contain a phandle to an FPGA Manager. Child FPGA Regions
inherit this property from their ancestor regions. A fpga-mgr property
inherit this property from their ancestor regions. An fpga-mgr property
in a region will override any inherited FPGA manager.
- #address-cells, #size-cells, ranges : must be present to handle address space
mapping for child nodes.
@ -175,12 +175,12 @@ Optional properties:
- firmware-name : should contain the name of an FPGA image file located on the
firmware search path. If this property shows up in a live device tree
it indicates that the FPGA has already been programmed with this image.
If this property is in an overlay targeting a FPGA region, it is a
If this property is in an overlay targeting an FPGA region, it is a
request to program the FPGA with that image.
- fpga-bridges : should contain a list of phandles to FPGA Bridges that must be
controlled during FPGA programming along with the parent FPGA bridge.
This property is optional if the FPGA Manager handles the bridges.
If the fpga-region is the child of a fpga-bridge, the list should not
If the fpga-region is the child of an fpga-bridge, the list should not
contain the parent bridge.
- partial-fpga-config : boolean, set if partial reconfiguration is to be done,
otherwise full reconfiguration is done.
@ -279,7 +279,7 @@ Supported Use Models
In all cases the live DT must have the FPGA Manager, FPGA Bridges (if any), and
a FPGA Region. The target of the Device Tree Overlay is the FPGA Region. Some
uses are specific to a FPGA device.
uses are specific to an FPGA device.
* No FPGA Bridges
In this case, the FPGA Manager which programs the FPGA also handles the
@ -300,7 +300,7 @@ uses are specific to a FPGA device.
bridges need to exist in the FPGA that can gate the buses going to each FPGA
region while the buses are enabled for other sections. Before any partial
reconfiguration can be done, a base FPGA image must be loaded which includes
PRR's with FPGA bridges. The device tree should have a FPGA region for each
PRR's with FPGA bridges. The device tree should have an FPGA region for each
PRR.
Device Tree Examples

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@ -37,6 +37,18 @@ properties:
- qcom,sc7180-npu-noc
- qcom,sc7180-qup-virt
- qcom,sc7180-system-noc
- qcom,sc7280-aggre1-noc
- qcom,sc7280-aggre2-noc
- qcom,sc7280-clk-virt
- qcom,sc7280-cnoc2
- qcom,sc7280-cnoc3
- qcom,sc7280-dc-noc
- qcom,sc7280-gem-noc
- qcom,sc7280-lpass-ag-noc
- qcom,sc7280-mc-virt
- qcom,sc7280-mmss-noc
- qcom,sc7280-nsp-noc
- qcom,sc7280-system-noc
- qcom,sdm845-aggre1-noc
- qcom,sdm845-aggre2-noc
- qcom,sdm845-config-noc

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@ -2,7 +2,10 @@ EEPROMs (SPI) compatible with Microchip Technology 93xx46 family.
Required properties:
- compatible : shall be one of:
"atmel,at93c46"
"atmel,at93c46d"
"atmel,at93c56"
"atmel,at93c66"
"eeprom-93xx46"
"microchip,93lc46b"
- data-size : number of data bits per word (either 8 or 16)

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@ -14,6 +14,7 @@
- "qcom,pcie-qcs404" for qcs404
- "qcom,pcie-sdm845" for sdm845
- "qcom,pcie-sm8250" for sm8250
- "qcom,pcie-ipq6018" for ipq6018
- reg:
Usage: required
@ -123,6 +124,16 @@
- "ahb" AHB clock
- "aux" Auxiliary clock
- clock-names:
Usage: required for ipq6018
Value type: <stringlist>
Definition: Should contain the following entries
- "iface" PCIe to SysNOC BIU clock
- "axi_m" AXI Master clock
- "axi_s" AXI Slave clock
- "axi_bridge" AXI bridge clock
- "rchng"
- clock-names:
Usage: required for qcs404
Value type: <stringlist>
@ -209,6 +220,19 @@
- "ahb" AHB Reset
- "axi_m_sticky" AXI Master Sticky reset
- reset-names:
Usage: required for ipq6018
Value type: <stringlist>
Definition: Should contain the following entries
- "pipe" PIPE reset
- "sleep" Sleep reset
- "sticky" Core Sticky reset
- "axi_m" AXI Master reset
- "axi_s" AXI Slave reset
- "ahb" AHB Reset
- "axi_m_sticky" AXI Master Sticky reset
- "axi_s_sticky" AXI Slave Sticky reset
- reset-names:
Usage: required for qcs404
Value type: <stringlist>

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@ -16,6 +16,9 @@ properties:
reg:
maxItems: 1
clocks:
maxItems: 1
"#phy-cells":
const: 1
description: selects if the phy is dual-ported
@ -23,6 +26,7 @@ properties:
required:
- compatible
- reg
- clocks
- "#phy-cells"
additionalProperties: false
@ -32,5 +36,6 @@ examples:
pcie0_phy: pcie-phy@1e149000 {
compatible = "mediatek,mt7621-pci-phy";
reg = <0x1e149000 0x0700>;
clocks = <&sysc 0>;
#phy-cells = <1>;
};

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@ -14,6 +14,7 @@ properties:
enum:
- rockchip,px30-usb2phy
- rockchip,rk3228-usb2phy
- rockchip,rk3308-usb2phy
- rockchip,rk3328-usb2phy
- rockchip,rk3366-usb2phy
- rockchip,rk3399-usb2phy

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@ -74,6 +74,13 @@ patternProperties:
"#phy-cells":
enum: [ 0x0, 0x1 ]
connector:
type: object
allOf:
- $ref: ../connector/usb-connector.yaml
properties:
vbus-supply: true
allOf:
- if:
properties:
@ -130,6 +137,10 @@ examples:
reg = <0>;
phy-supply = <&vdd_usb>;
#phy-cells = <0>;
connector {
compatible = "usb-a-connector";
vbus-supply = <&vbus_sw>;
};
};
usbphyc_port1: usb-phy@1 {

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@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
- qcom,ipq6018-qmp-pcie-phy
- qcom,ipq8074-qmp-pcie-phy
- qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-pcie-phy
@ -45,6 +46,7 @@ properties:
- qcom,sm8350-qmp-ufs-phy
- qcom,sm8350-qmp-usb3-phy
- qcom,sm8350-qmp-usb3-uni-phy
- qcom,sdx55-qmp-pcie-phy
- qcom,sdx55-qmp-usb3-uni-phy
reg:
@ -295,6 +297,30 @@ allOf:
items:
- const: phy
- const: common
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq6018-qmp-pcie-phy
then:
properties:
clocks:
items:
- description: Phy aux clock.
- description: Phy config clock.
clock-names:
items:
- const: aux
- const: cfg_ahb
resets:
items:
- description: reset of phy block.
- description: phy common block reset.
reset-names:
items:
- const: phy
- const: common
- if:
properties:
compatible:
@ -302,6 +328,7 @@ allOf:
enum:
- qcom,sdm845-qhp-pcie-phy
- qcom,sdm845-qmp-pcie-phy
- qcom,sdx55-qmp-pcie-phy
- qcom,sm8250-qmp-gen3x1-pcie-phy
- qcom,sm8250-qmp-gen3x2-pcie-phy
- qcom,sm8250-qmp-modem-pcie-phy

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@ -1,24 +0,0 @@
* Renesas R-Car generation 3 PCIe PHY
This file provides information on what the device node for the R-Car
generation 3 PCIe PHY contains.
Required properties:
- compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the
R8A77980 SoC.
- reg: offset and length of the register block.
- clocks: clock phandle and specifier pair.
- power-domains: power domain phandle and specifier pair.
- resets: reset phandle and specifier pair.
- #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
Example (R-Car V3H):
pcie-phy@e65d0000 {
compatible = "renesas,r8a77980-pcie-phy";
reg = <0 0xe65d0000 0 0x8000>;
#phy-cells = <0>;
clocks = <&cpg CPG_MOD 319>;
power-domains = <&sysc 32>;
resets = <&cpg 319>;
};

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@ -0,0 +1,53 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/renesas,rcar-gen3-pcie-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas R-Car Generation 3 PCIe PHY
maintainers:
- Sergei Shtylyov <sergei.shtylyov@gmail.com>
properties:
compatible:
const: renesas,r8a77980-pcie-phy
reg:
maxItems: 1
clocks:
maxItems: 1
power-domains:
maxItems: 1
resets:
maxItems: 1
'#phy-cells':
const: 0
required:
- compatible
- reg
- clocks
- power-domains
- resets
- '#phy-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/r8a77980-cpg-mssr.h>
#include <dt-bindings/power/r8a77980-sysc.h>
pcie-phy@e65d0000 {
compatible = "renesas,r8a77980-pcie-phy";
reg = <0xe65d0000 0x8000>;
#phy-cells = <0>;
clocks = <&cpg CPG_MOD 319>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 319>;
};

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@ -0,0 +1,79 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings
maintainers:
- Heiko Stuebner <heiko@sntech.de>
description: |
The Rockchip SoC has a MIPI CSI D-PHY based on an Innosilicon IP wich
connects to the ISP1 (Image Signal Processing unit v1.0) for CSI cameras.
properties:
compatible:
enum:
- rockchip,px30-csi-dphy
- rockchip,rk1808-csi-dphy
- rockchip,rk3326-csi-dphy
- rockchip,rk3368-csi-dphy
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: pclk
'#phy-cells':
const: 0
power-domains:
description: Video in/out power domain.
maxItems: 1
resets:
items:
- description: exclusive PHY reset line
reset-names:
items:
- const: apb
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
Some additional phy settings are access through GRF regs.
required:
- compatible
- reg
- clocks
- clock-names
- '#phy-cells'
- power-domains
- resets
- reset-names
- rockchip,grf
additionalProperties: false
examples:
- |
csi_dphy: phy@ff2f0000 {
compatible = "rockchip,px30-csi-dphy";
reg = <0xff2f0000 0x4000>;
clocks = <&cru 1>;
clock-names = "pclk";
#phy-cells = <0>;
power-domains = <&power 1>;
resets = <&cru 1>;
reset-names = "apb";
rockchip,grf = <&grf>;
};

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@ -1,52 +0,0 @@
ROCKCHIP USB2 PHY
Required properties:
- compatible: matching the soc type, one of
"rockchip,rk3066a-usb-phy"
"rockchip,rk3188-usb-phy"
"rockchip,rk3288-usb-phy"
- #address-cells: should be 1
- #size-cells: should be 0
Deprecated properties:
- rockchip,grf : phandle to the syscon managing the "general
register files" - phy should be a child of the GRF instead
Sub-nodes:
Each PHY should be represented as a sub-node.
Sub-nodes
required properties:
- #phy-cells: should be 0
- reg: PHY configure reg address offset in GRF
"0x320" - for PHY attach to OTG controller
"0x334" - for PHY attach to HOST0 controller
"0x348" - for PHY attach to HOST1 controller
Optional Properties:
- clocks : phandle + clock specifier for the phy clocks
- clock-names: string, clock name, must be "phyclk"
- #clock-cells: for users of the phy-pll, should be 0
- reset-names: Only allow the following entries:
- phy-reset
- resets: Must contain an entry for each entry in reset-names.
- vbus-supply: power-supply phandle for vbus power source
Example:
grf: syscon@ff770000 {
compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
...
usbphy: phy {
compatible = "rockchip,rk3288-usb-phy";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usb-phy0 {
#phy-cells = <0>;
reg = <0x320>;
};
};
};

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@ -0,0 +1,81 @@
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip USB2.0 phy
maintainers:
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
oneOf:
- const: rockchip,rk3288-usb-phy
- items:
- enum:
- rockchip,rk3066a-usb-phy
- rockchip,rk3188-usb-phy
- const: rockchip,rk3288-usb-phy
"#address-cells":
const: 1
"#size-cells":
const: 0
required:
- compatible
- "#address-cells"
- "#size-cells"
additionalProperties: false
patternProperties:
"usb-phy@[0-9a-f]+$":
type: object
properties:
reg:
maxItems: 1
"#phy-cells":
const: 0
clocks:
maxItems: 1
clock-names:
const: phyclk
"#clock-cells":
const: 0
resets:
maxItems: 1
reset-names:
const: phy-reset
vbus-supply:
description: phandle for vbus power source
required:
- reg
- "#phy-cells"
additionalProperties: false
examples:
- |
usbphy: usbphy {
compatible = "rockchip,rk3288-usb-phy";
#address-cells = <1>;
#size-cells = <0>;
usbphy0: usb-phy@320 {
reg = <0x320>;
#phy-cells = <0>;
};
};

View File

@ -0,0 +1,56 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/phy/ti,tcan104x-can.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: TCAN104x CAN TRANSCEIVER PHY
maintainers:
- Aswath Govindraju <a-govindraju@ti.com>
properties:
$nodename:
pattern: "^can-phy"
compatible:
enum:
- ti,tcan1042
- ti,tcan1043
'#phy-cells':
const: 0
standby-gpios:
description:
gpio node to toggle standby signal on transceiver
maxItems: 1
enable-gpios:
description:
gpio node to toggle enable signal on transceiver
maxItems: 1
max-bitrate:
$ref: /schemas/types.yaml#/definitions/uint32
description:
max bit rate supported in bps
minimum: 1
required:
- compatible
- '#phy-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
transceiver1: can-phy {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <5000000>;
standby-gpios = <&wakeup_gpio1 16 GPIO_ACTIVE_LOW>;
enable-gpios = <&main_gpio1 67 GPIO_ACTIVE_HIGH>;
};

View File

@ -57,7 +57,7 @@ FPGA Interface Unit (FIU) represents a standalone functional unit for the
interface to FPGA, e.g. the FPGA Management Engine (FME) and Port (more
descriptions on FME and Port in later sections).
Accelerated Function Unit (AFU) represents a FPGA programmable region and
Accelerated Function Unit (AFU) represents an FPGA programmable region and
always connects to a FIU (e.g. a Port) as its child as illustrated above.
Private Features represent sub features of the FIU and AFU. They could be
@ -311,7 +311,7 @@ The driver organization in virtualization case is illustrated below:
| PCI PF Device | | | PCI VF Device |
+---------------+ | +---------------+
FPGA PCIe device driver is always loaded first once a FPGA PCIe PF or VF device
FPGA PCIe device driver is always loaded first once an FPGA PCIe PF or VF device
is detected. It:
* Finishes enumeration on both FPGA PCIe PF and VF device using common

View File

@ -6,7 +6,7 @@ OpenCAPI is an interface between processors and accelerators. It aims
at being low-latency and high-bandwidth. The specification is
developed by the `OpenCAPI Consortium <http://opencapi.org/>`_.
It allows an accelerator (which could be a FPGA, ASICs, ...) to access
It allows an accelerator (which could be an FPGA, ASICs, ...) to access
the host memory coherently, using virtual addresses. An OpenCAPI
device can also host its own memory, that can be accessed from the
host.

View File

@ -22,7 +22,7 @@ is also often used in weather stations and applications such as: rain gauge,
wind speed/direction measuring, humidity sensing, etc.
Current support is provided through the following sysfs files (all files
except "iad" are readonly):
except "iad" and "offset" are readonly):
"iad"
-----
@ -44,6 +44,23 @@ Internally when this file is read, the additional CRC byte is also obtained
from the slave device. If it is correct, the 8 bytes page data are passed
to userspace, otherwise an I/O error is returned.
"page1"
-------
This file provides full 8 bytes of the chip Page 1 (01h).
This page contains the ICA, elapsed time meter and current offset data of the DS2438.
Internally when this file is read, the additional CRC byte is also obtained
from the slave device. If it is correct, the 8 bytes page data are passed
to userspace, otherwise an I/O error is returned.
"offset"
--------
This file controls the 2-byte Offset Register of the chip.
Writing a 2-byte value will change the Offset Register, which changes the
current measurement done by the chip. Changing this register to the two's complement
of the current register while forcing zero current through the load will calibrate
the chip, canceling offset errors in the current ADC.
"temperature"
-------------
Opening and reading this file initiates the CONVERT_T (temperature conversion)

View File

@ -4075,7 +4075,9 @@ W: https://github.com/linux-can
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
F: Documentation/devicetree/bindings/net/can/
F: Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml
F: drivers/net/can/
F: drivers/phy/phy-can-transceiver.c
F: include/linux/can/bittiming.h
F: include/linux/can/dev.h
F: include/linux/can/led.h
@ -11012,7 +11014,7 @@ MARVELL ARMADA 3700 PHY DRIVERS
M: Miquel Raynal <miquel.raynal@bootlin.com>
S: Maintained
F: Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt
F: Documentation/devicetree/bindings/phy/phy-mvebu-utmi.txt
F: Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml
F: drivers/phy/marvell/phy-mvebu-a3700-comphy.c
F: drivers/phy/marvell/phy-mvebu-a3700-utmi.c

View File

@ -362,7 +362,7 @@ struct vio_driver {
struct list_head node;
const struct vio_device_id *id_table;
int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
int (*remove)(struct vio_dev *dev);
void (*remove)(struct vio_dev *dev);
void (*shutdown)(struct vio_dev *dev);
unsigned long driver_data;
struct device_driver driver;

View File

@ -1236,11 +1236,6 @@ out_err:
return err;
}
static int ds_remove(struct vio_dev *vdev)
{
return 0;
}
static const struct vio_device_id ds_match[] = {
{
.type = "domain-services-port",
@ -1251,7 +1246,6 @@ static const struct vio_device_id ds_match[] = {
static struct vio_driver ds_driver = {
.id_table = ds_match,
.probe = ds_probe,
.remove = ds_remove,
.name = "ds",
};

View File

@ -105,10 +105,10 @@ static int vio_device_remove(struct device *dev)
* routines to do so at the moment. TBD
*/
return drv->remove(vdev);
drv->remove(vdev);
}
return 1;
return 0;
}
static ssize_t devspec_show(struct device *dev,

View File

@ -225,6 +225,7 @@ static int keyboard_notifier_call(struct notifier_block *blk,
case KBD_POST_KEYSYM:
{
unsigned char type = KTYP(param->value) - 0xf0;
if (type == KT_SPEC) {
unsigned char val = KVAL(param->value);
int on_off = -1;
@ -265,6 +266,7 @@ static int vt_notifier_call(struct notifier_block *blk,
{
struct vt_notifier_param *param = _param;
struct vc_data *vc = param->vc;
switch (code) {
case VT_ALLOCATE:
break;
@ -273,6 +275,7 @@ static int vt_notifier_call(struct notifier_block *blk,
case VT_WRITE:
{
unsigned char c = param->c;
if (vc->vc_num != fg_console)
break;
switch (c) {

View File

@ -90,6 +90,13 @@ static char *speakup_default_msgs[MSG_LAST_INDEX] = {
[MSG_COLOR_YELLOW] = "yellow",
[MSG_COLOR_WHITE] = "white",
[MSG_COLOR_GREY] = "grey",
[MSG_COLOR_BRIGHTBLUE] "bright blue",
[MSG_COLOR_BRIGHTGREEN] "bright green",
[MSG_COLOR_BRIGHTCYAN] "bright cyan",
[MSG_COLOR_BRIGHTRED] "bright red",
[MSG_COLOR_BRIGHTMAGENTA] "bright magenta",
[MSG_COLOR_BRIGHTYELLOW] "bright yellow",
[MSG_COLOR_BRIGHTWHITE] "bright white",
/* Names of key states. */
[MSG_STATE_DOUBLE] = "double",

View File

@ -99,7 +99,14 @@ enum msg_index_t {
MSG_COLOR_YELLOW,
MSG_COLOR_WHITE,
MSG_COLOR_GREY,
MSG_COLORS_END = MSG_COLOR_GREY,
MSG_COLOR_BRIGHTBLUE,
MSG_COLOR_BRIGHTGREEN,
MSG_COLOR_BRIGHTCYAN,
MSG_COLOR_BRIGHTRED,
MSG_COLOR_BRIGHTMAGENTA,
MSG_COLOR_BRIGHTYELLOW,
MSG_COLOR_BRIGHTWHITE,
MSG_COLORS_END = MSG_COLOR_BRIGHTWHITE,
MSG_STATES_START,
MSG_STATE_DOUBLE = MSG_STATES_START,

View File

@ -389,10 +389,6 @@ static void say_attributes(struct vc_data *vc)
int fg = spk_attr & 0x0f;
int bg = spk_attr >> 4;
if (fg > 8) {
synth_printf("%s ", spk_msg_get(MSG_BRIGHT));
fg -= 8;
}
synth_printf("%s", spk_msg_get(MSG_COLORS_START + fg));
if (bg > 7) {
synth_printf(" %s ", spk_msg_get(MSG_ON_BLINKING));

View File

@ -1050,7 +1050,7 @@ err_out_release_mdesc:
return err;
}
static int vdc_port_remove(struct vio_dev *vdev)
static void vdc_port_remove(struct vio_dev *vdev)
{
struct vdc_port *port = dev_get_drvdata(&vdev->dev);
@ -1072,7 +1072,6 @@ static int vdc_port_remove(struct vio_dev *vdev)
kfree(port);
}
return 0;
}
static void vdc_requeue_inflight(struct vdc_port *port)

View File

@ -350,7 +350,8 @@ int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev,
* dprc_scan_container - Scans a physical DPRC and synchronizes Linux bus state
*
* @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
*
* @alloc_interrupts: if true the function allocates the interrupt pool,
* otherwise the interrupt allocation is delayed
* Scans the physical DPRC and synchronizes the state of the Linux
* bus driver with the actual state of the MC by adding and removing
* devices as appropriate.
@ -373,10 +374,11 @@ int dprc_scan_container(struct fsl_mc_device *mc_bus_dev,
return error;
}
EXPORT_SYMBOL_GPL(dprc_scan_container);
/**
* dprc_irq0_handler - Regular ISR for DPRC interrupt 0
*
* @irq: IRQ number of the interrupt being handled
* @irq_num: IRQ number of the interrupt being handled
* @arg: Pointer to device structure
*/
static irqreturn_t dprc_irq0_handler(int irq_num, void *arg)
@ -387,7 +389,7 @@ static irqreturn_t dprc_irq0_handler(int irq_num, void *arg)
/**
* dprc_irq0_handler_thread - Handler thread function for DPRC interrupt 0
*
* @irq: IRQ number of the interrupt being handled
* @irq_num: IRQ number of the interrupt being handled
* @arg: Pointer to device structure
*/
static irqreturn_t dprc_irq0_handler_thread(int irq_num, void *arg)

View File

@ -334,7 +334,7 @@ int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
* @mc_io: Pointer to MC portal's I/O object
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
* @token: Token of DPRC object
* @attributes Returned container attributes
* @attr: Returned container attributes
*
* Return: '0' on Success; Error code otherwise.
*/
@ -504,7 +504,7 @@ EXPORT_SYMBOL_GPL(dprc_set_obj_irq);
* @mc_io: Pointer to MC portal's I/O object
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
* @token: Token of DPRC object
* @obj_type; Object type as returned in dprc_get_obj()
* @obj_type: Object type as returned in dprc_get_obj()
* @obj_id: Unique object instance as returned in dprc_get_obj()
* @region_index: The specific region to query
* @region_desc: Returns the requested region descriptor

View File

@ -254,7 +254,7 @@ EXPORT_SYMBOL_GPL(fsl_mc_resource_free);
* @mc_dev: fsl-mc device which is used in conjunction with the
* allocated object
* @pool_type: pool type
* @new_mc_dev: pointer to area where the pointer to the allocated device
* @new_mc_adev: pointer to area where the pointer to the allocated device
* is to be returned
*
* Allocatable objects are always used in conjunction with some functional
@ -409,7 +409,7 @@ cleanup_msi_irqs:
}
EXPORT_SYMBOL_GPL(fsl_mc_populate_irq_pool);
/**
/*
* Teardown the interrupt pool associated with an fsl-mc bus.
* It frees the IRQs that were allocated to the pool, back to the GIC-ITS.
*/
@ -436,7 +436,7 @@ void fsl_mc_cleanup_irq_pool(struct fsl_mc_device *mc_bus_dev)
}
EXPORT_SYMBOL_GPL(fsl_mc_cleanup_irq_pool);
/**
/*
* Allocate the IRQs required by a given fsl-mc device.
*/
int __must_check fsl_mc_allocate_irqs(struct fsl_mc_device *mc_dev)
@ -578,7 +578,7 @@ void fsl_mc_cleanup_all_resource_pools(struct fsl_mc_device *mc_bus_dev)
fsl_mc_cleanup_resource_pool(mc_bus_dev, pool_type);
}
/**
/*
* fsl_mc_allocator_probe - callback invoked when an allocatable device is
* being added to the system
*/
@ -610,7 +610,7 @@ static int fsl_mc_allocator_probe(struct fsl_mc_device *mc_dev)
return 0;
}
/**
/*
* fsl_mc_allocator_remove - callback invoked when an allocatable device is
* being removed from the system
*/

View File

@ -24,7 +24,7 @@
#include "fsl-mc-private.h"
/**
/*
* Default DMA mask for devices on a fsl-mc bus
*/
#define FSL_MC_DEFAULT_DMA_MASK (~0ULL)
@ -36,6 +36,7 @@ static struct fsl_mc_version mc_version;
* @root_mc_bus_dev: fsl-mc device representing the root DPRC
* @num_translation_ranges: number of entries in addr_translation_ranges
* @translation_ranges: array of bus to system address translation ranges
* @fsl_mc_regs: base address of register bank
*/
struct fsl_mc {
struct fsl_mc_device *root_mc_bus_dev;
@ -117,7 +118,7 @@ out:
return found;
}
/**
/*
* fsl_mc_bus_uevent - callback invoked when a device is added
*/
static int fsl_mc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
@ -467,7 +468,7 @@ static void fsl_mc_driver_shutdown(struct device *dev)
mc_drv->shutdown(mc_dev);
}
/**
/*
* __fsl_mc_driver_register - registers a child device driver with the
* MC bus
*
@ -503,7 +504,7 @@ int __fsl_mc_driver_register(struct fsl_mc_driver *mc_driver,
}
EXPORT_SYMBOL_GPL(__fsl_mc_driver_register);
/**
/*
* fsl_mc_driver_unregister - unregisters a device driver from the
* MC bus
*/
@ -563,7 +564,7 @@ struct fsl_mc_version *fsl_mc_get_version(void)
}
EXPORT_SYMBOL_GPL(fsl_mc_get_version);
/**
/*
* fsl_mc_get_root_dprc - function to traverse to the root dprc
*/
void fsl_mc_get_root_dprc(struct device *dev,
@ -732,7 +733,7 @@ error_cleanup_regions:
return error;
}
/**
/*
* fsl_mc_is_root_dprc - function to check if a given device is a root dprc
*/
bool fsl_mc_is_root_dprc(struct device *dev)
@ -757,7 +758,7 @@ static void fsl_mc_device_release(struct device *dev)
kfree(mc_dev);
}
/**
/*
* Add a newly discovered fsl-mc device to be visible in Linux
*/
int fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
@ -1058,7 +1059,7 @@ static int get_mc_addr_translation_ranges(struct device *dev,
return 0;
}
/**
/*
* fsl_mc_bus_probe - callback invoked when the root MC bus is being
* added
*/
@ -1182,7 +1183,7 @@ error_cleanup_mc_io:
return error;
}
/**
/*
* fsl_mc_bus_remove - callback invoked when the root MC bus is being
* removed
*/

View File

@ -148,7 +148,7 @@ static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info)
/**
* fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain
* @np: Optional device-tree node of the interrupt controller
* @fwnode: Optional firmware node of the interrupt controller
* @info: MSI domain info
* @parent: Parent irq domain
*

View File

@ -50,12 +50,12 @@ static void fsl_mc_io_unset_dpmcp(struct fsl_mc_io *mc_io)
}
/**
* Creates an MC I/O object
* fsl_create_mc_io() - Creates an MC I/O object
*
* @dev: device to be associated with the MC I/O object
* @mc_portal_phys_addr: physical address of the MC portal to use
* @mc_portal_size: size in bytes of the MC portal
* @dpmcp-dev: Pointer to the DPMCP object associated with this MC I/O
* @dpmcp_dev: Pointer to the DPMCP object associated with this MC I/O
* object or NULL if none.
* @flags: flags for the new MC I/O object
* @new_mc_io: Area to return pointer to newly created MC I/O object
@ -123,7 +123,7 @@ error_destroy_mc_io:
}
/**
* Destroys an MC I/O object
* fsl_destroy_mc_io() - Destroys an MC I/O object
*
* @mc_io: MC I/O object to destroy
*/

View File

@ -16,7 +16,7 @@
#include "fsl-mc-private.h"
/**
/*
* Timeout in milliseconds to wait for the completion of an MC command
*/
#define MC_CMD_COMPLETION_TIMEOUT_MS 500
@ -148,9 +148,10 @@ static inline enum mc_cmd_status mc_read_response(struct fsl_mc_command __iomem
}
/**
* Waits for the completion of an MC command doing preemptible polling.
* uslepp_range() is called between polling iterations.
*
* mc_polling_wait_preemptible() - Waits for the completion of an MC
* command doing preemptible polling.
* uslepp_range() is called between
* polling iterations.
* @mc_io: MC I/O object to be used
* @cmd: command buffer to receive MC response
* @mc_status: MC command completion status
@ -194,9 +195,9 @@ static int mc_polling_wait_preemptible(struct fsl_mc_io *mc_io,
}
/**
* Waits for the completion of an MC command doing atomic polling.
* udelay() is called between polling iterations.
*
* mc_polling_wait_atomic() - Waits for the completion of an MC command
* doing atomic polling. udelay() is called
* between polling iterations.
* @mc_io: MC I/O object to be used
* @cmd: command buffer to receive MC response
* @mc_status: MC command completion status
@ -234,8 +235,8 @@ static int mc_polling_wait_atomic(struct fsl_mc_io *mc_io,
}
/**
* Sends a command to the MC device using the given MC I/O object
*
* mc_send_command() - Sends a command to the MC device using the given
* MC I/O object
* @mc_io: MC I/O object to be used
* @cmd: command to be sent
*

View File

@ -465,23 +465,15 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl)
/* Trigger MHI RESET so that the device will not access host memory */
if (!MHI_PM_IN_FATAL_STATE(mhi_cntrl->pm_state)) {
u32 in_reset = -1;
unsigned long timeout = msecs_to_jiffies(mhi_cntrl->timeout_ms);
dev_dbg(dev, "Triggering MHI Reset in device\n");
mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET);
/* Wait for the reset bit to be cleared by the device */
ret = wait_event_timeout(mhi_cntrl->state_event,
mhi_read_reg_field(mhi_cntrl,
mhi_cntrl->regs,
MHICTRL,
MHICTRL_RESET_MASK,
MHICTRL_RESET_SHIFT,
&in_reset) ||
!in_reset, timeout);
if (!ret || in_reset)
dev_err(dev, "Device failed to exit MHI Reset state\n");
ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL,
MHICTRL_RESET_MASK, MHICTRL_RESET_SHIFT, 0,
25000);
if (ret)
dev_err(dev, "Device failed to clear MHI Reset\n");
/*
* Device will clear BHI_INTVEC as a part of RESET processing,
@ -934,6 +926,7 @@ int mhi_pm_resume(struct mhi_controller *mhi_cntrl)
ret = wait_event_timeout(mhi_cntrl->state_event,
mhi_cntrl->dev_state == MHI_STATE_M0 ||
mhi_cntrl->dev_state == MHI_STATE_M2 ||
MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state),
msecs_to_jiffies(mhi_cntrl->timeout_ms));

View File

@ -665,7 +665,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
err = mhi_register_controller(mhi_cntrl, mhi_cntrl_config);
if (err)
return err;
goto err_disable_reporting;
/* MHI bus does not power up the controller by default */
err = mhi_prepare_for_power_up(mhi_cntrl);
@ -699,6 +699,8 @@ err_unprepare:
mhi_unprepare_after_power_down(mhi_cntrl);
err_unregister:
mhi_unregister_controller(mhi_cntrl);
err_disable_reporting:
pci_disable_pcie_error_reporting(pdev);
return err;
}
@ -721,6 +723,7 @@ static void mhi_pci_remove(struct pci_dev *pdev)
pm_runtime_get_noresume(&pdev->dev);
mhi_unregister_controller(mhi_cntrl);
pci_disable_pcie_error_reporting(pdev);
}
static void mhi_pci_shutdown(struct pci_dev *pdev)

View File

@ -357,27 +357,6 @@ config NVRAM
To compile this driver as a module, choose M here: the
module will be called nvram.
config RAW_DRIVER
tristate "RAW driver (/dev/raw/rawN)"
depends on BLOCK
help
The raw driver permits block devices to be bound to /dev/raw/rawN.
Once bound, I/O against /dev/raw/rawN uses efficient zero-copy I/O.
See the raw(8) manpage for more details.
Applications should preferably open the device (eg /dev/hda1)
with the O_DIRECT flag.
config MAX_RAW_DEVS
int "Maximum number of RAW devices to support (1-65536)"
depends on RAW_DRIVER
range 1 65536
default "256"
help
The maximum number of RAW devices that are supported.
Default is 256. Increase this number in case you need lots of
raw devices.
config DEVPORT
bool "/dev/port character device"
depends on ISA || PCI

View File

@ -8,7 +8,6 @@ obj-$(CONFIG_TTY_PRINTK) += ttyprintk.o
obj-y += misc.o
obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o
obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
obj-$(CONFIG_RAW_DRIVER) += raw.o
obj-$(CONFIG_MSPEC) += mspec.o
obj-$(CONFIG_UV_MMTIMER) += uv_mmtimer.o
obj-$(CONFIG_IBM_BSR) += bsr.o
@ -44,6 +43,6 @@ obj-$(CONFIG_TCG_TPM) += tpm/
obj-$(CONFIG_PS3_FLASH) += ps3flash.o
obj-$(CONFIG_XILLYBUS) += xillybus/
obj-$(CONFIG_XILLYBUS_CLASS) += xillybus/
obj-$(CONFIG_POWERNV_OP_PANEL) += powernv-op-panel.o
obj-$(CONFIG_ADI) += adi.o

View File

@ -156,12 +156,12 @@ static irqreturn_t hpet_interrupt(int irq, void *data)
* This has the effect of treating non-periodic like periodic.
*/
if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
unsigned long m, t, mc, base, k;
unsigned long t, mc, base, k;
struct hpet __iomem *hpet = devp->hd_hpet;
struct hpets *hpetp = devp->hd_hpets;
t = devp->hd_ireqfreq;
m = read_counter(&devp->hd_timer->hpet_compare);
read_counter(&devp->hd_timer->hpet_compare);
mc = read_counter(&hpet->hpet_mc);
/* The time for the next interrupt would logically be t + m,
* however, if we are very unlucky and the interrupt is delayed

View File

@ -29,7 +29,7 @@ static int pseries_rng_read(struct hwrng *rng, void *data, size_t max, bool wait
return 8;
}
/**
/*
* pseries_rng_get_desired_dma - Return desired DMA allocate for CMO operations
*
* This is a required function for a driver to operate in a CMO environment

View File

@ -16,7 +16,6 @@
#include <linux/mman.h>
#include <linux/random.h>
#include <linux/init.h>
#include <linux/raw.h>
#include <linux/tty.h>
#include <linux/capability.h>
#include <linux/ptrace.h>

View File

@ -544,6 +544,10 @@ static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
io_read_num_rec_bytes(iobase, &num_bytes_read);
if (num_bytes_read >= 4) {
DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read);
if (num_bytes_read > 4) {
rc = -EIO;
goto exit_setprotocol;
}
break;
}
usleep_range(10000, 11000);
@ -1050,7 +1054,6 @@ static ssize_t cmm_write(struct file *filp, const char __user *buf,
struct cm4000_dev *dev = filp->private_data;
unsigned int iobase = dev->p_dev->resource[0]->start;
unsigned short s;
unsigned char tmp;
unsigned char infolen;
unsigned char sendT0;
unsigned short nsend;
@ -1148,7 +1151,7 @@ static ssize_t cmm_write(struct file *filp, const char __user *buf,
set_cardparameter(dev);
/* dummy read, reset flag procedure received */
tmp = inb(REG_FLAGS1(iobase));
inb(REG_FLAGS1(iobase));
dev->flags1 = 0x20 /* T_Active */
| (sendT0)

View File

@ -221,7 +221,6 @@ static ssize_t cm4040_read(struct file *filp, char __user *buf,
unsigned long i;
size_t min_bytes_to_read;
int rc;
unsigned char uc;
DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid);
@ -308,7 +307,7 @@ static ssize_t cm4040_read(struct file *filp, char __user *buf,
return -EIO;
}
uc = xinb(iobase + REG_OFFSET_BULK_IN);
xinb(iobase + REG_OFFSET_BULK_IN);
DEBUGP(2, dev, "<- cm4040_read (successfully)\n");
return min_bytes_to_read;

View File

@ -265,7 +265,6 @@ static int scr24x_probe(struct pcmcia_device *link)
cdev_init(&dev->c_dev, &scr24x_fops);
dev->c_dev.owner = THIS_MODULE;
dev->c_dev.ops = &scr24x_fops;
ret = cdev_add(&dev->c_dev, MKDEV(MAJOR(scr24x_devt), dev->devno), 1);
if (ret < 0)
goto err;

View File

@ -1,362 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/drivers/char/raw.c
*
* Front-end raw character devices. These can be bound to any block
* devices to provide genuine Unix raw character device semantics.
*
* We reserve minor number 0 for a control interface. ioctl()s on this
* device are used to bind the other minor numbers to block devices.
*/
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/major.h>
#include <linux/blkdev.h>
#include <linux/backing-dev.h>
#include <linux/module.h>
#include <linux/raw.h>
#include <linux/capability.h>
#include <linux/uio.h>
#include <linux/cdev.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/gfp.h>
#include <linux/compat.h>
#include <linux/vmalloc.h>
#include <linux/uaccess.h>
struct raw_device_data {
dev_t binding;
struct block_device *bdev;
int inuse;
};
static struct class *raw_class;
static struct raw_device_data *raw_devices;
static DEFINE_MUTEX(raw_mutex);
static const struct file_operations raw_ctl_fops; /* forward declaration */
static int max_raw_minors = CONFIG_MAX_RAW_DEVS;
module_param(max_raw_minors, int, 0);
MODULE_PARM_DESC(max_raw_minors, "Maximum number of raw devices (1-65536)");
/*
* Open/close code for raw IO.
*
* We just rewrite the i_mapping for the /dev/raw/rawN file descriptor to
* point at the blockdev's address_space and set the file handle to use
* O_DIRECT.
*
* Set the device's soft blocksize to the minimum possible. This gives the
* finest possible alignment and has no adverse impact on performance.
*/
static int raw_open(struct inode *inode, struct file *filp)
{
const int minor = iminor(inode);
struct block_device *bdev;
int err;
if (minor == 0) { /* It is the control device */
filp->f_op = &raw_ctl_fops;
return 0;
}
pr_warn_ratelimited(
"process %s (pid %d) is using the deprecated raw device\n"
"support will be removed in Linux 5.14.\n",
current->comm, current->pid);
mutex_lock(&raw_mutex);
/*
* All we need to do on open is check that the device is bound.
*/
err = -ENODEV;
if (!raw_devices[minor].binding)
goto out;
bdev = blkdev_get_by_dev(raw_devices[minor].binding,
filp->f_mode | FMODE_EXCL, raw_open);
if (IS_ERR(bdev)) {
err = PTR_ERR(bdev);
goto out;
}
err = set_blocksize(bdev, bdev_logical_block_size(bdev));
if (err)
goto out1;
filp->f_flags |= O_DIRECT;
filp->f_mapping = bdev->bd_inode->i_mapping;
if (++raw_devices[minor].inuse == 1)
file_inode(filp)->i_mapping =
bdev->bd_inode->i_mapping;
filp->private_data = bdev;
raw_devices[minor].bdev = bdev;
mutex_unlock(&raw_mutex);
return 0;
out1:
blkdev_put(bdev, filp->f_mode | FMODE_EXCL);
out:
mutex_unlock(&raw_mutex);
return err;
}
/*
* When the final fd which refers to this character-special node is closed, we
* make its ->mapping point back at its own i_data.
*/
static int raw_release(struct inode *inode, struct file *filp)
{
const int minor= iminor(inode);
struct block_device *bdev;
mutex_lock(&raw_mutex);
bdev = raw_devices[minor].bdev;
if (--raw_devices[minor].inuse == 0)
/* Here inode->i_mapping == bdev->bd_inode->i_mapping */
inode->i_mapping = &inode->i_data;
mutex_unlock(&raw_mutex);
blkdev_put(bdev, filp->f_mode | FMODE_EXCL);
return 0;
}
/*
* Forward ioctls to the underlying block device.
*/
static long
raw_ioctl(struct file *filp, unsigned int command, unsigned long arg)
{
struct block_device *bdev = filp->private_data;
return blkdev_ioctl(bdev, 0, command, arg);
}
static int bind_set(int number, u64 major, u64 minor)
{
dev_t dev = MKDEV(major, minor);
dev_t raw = MKDEV(RAW_MAJOR, number);
struct raw_device_data *rawdev;
int err = 0;
if (number <= 0 || number >= max_raw_minors)
return -EINVAL;
if (MAJOR(dev) != major || MINOR(dev) != minor)
return -EINVAL;
rawdev = &raw_devices[number];
/*
* This is like making block devices, so demand the
* same capability
*/
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
/*
* For now, we don't need to check that the underlying
* block device is present or not: we can do that when
* the raw device is opened. Just check that the
* major/minor numbers make sense.
*/
if (MAJOR(dev) == 0 && dev != 0)
return -EINVAL;
mutex_lock(&raw_mutex);
if (rawdev->inuse) {
mutex_unlock(&raw_mutex);
return -EBUSY;
}
if (rawdev->binding)
module_put(THIS_MODULE);
rawdev->binding = dev;
if (!dev) {
/* unbind */
device_destroy(raw_class, raw);
} else {
__module_get(THIS_MODULE);
device_destroy(raw_class, raw);
device_create(raw_class, NULL, raw, NULL, "raw%d", number);
}
mutex_unlock(&raw_mutex);
return err;
}
static int bind_get(int number, dev_t *dev)
{
if (number <= 0 || number >= max_raw_minors)
return -EINVAL;
*dev = raw_devices[number].binding;
return 0;
}
/*
* Deal with ioctls against the raw-device control interface, to bind
* and unbind other raw devices.
*/
static long raw_ctl_ioctl(struct file *filp, unsigned int command,
unsigned long arg)
{
struct raw_config_request rq;
dev_t dev;
int err;
switch (command) {
case RAW_SETBIND:
if (copy_from_user(&rq, (void __user *) arg, sizeof(rq)))
return -EFAULT;
return bind_set(rq.raw_minor, rq.block_major, rq.block_minor);
case RAW_GETBIND:
if (copy_from_user(&rq, (void __user *) arg, sizeof(rq)))
return -EFAULT;
err = bind_get(rq.raw_minor, &dev);
if (err)
return err;
rq.block_major = MAJOR(dev);
rq.block_minor = MINOR(dev);
if (copy_to_user((void __user *)arg, &rq, sizeof(rq)))
return -EFAULT;
return 0;
}
return -EINVAL;
}
#ifdef CONFIG_COMPAT
struct raw32_config_request {
compat_int_t raw_minor;
compat_u64 block_major;
compat_u64 block_minor;
};
static long raw_ctl_compat_ioctl(struct file *file, unsigned int cmd,
unsigned long arg)
{
struct raw32_config_request __user *user_req = compat_ptr(arg);
struct raw32_config_request rq;
dev_t dev;
int err = 0;
switch (cmd) {
case RAW_SETBIND:
if (copy_from_user(&rq, user_req, sizeof(rq)))
return -EFAULT;
return bind_set(rq.raw_minor, rq.block_major, rq.block_minor);
case RAW_GETBIND:
if (copy_from_user(&rq, user_req, sizeof(rq)))
return -EFAULT;
err = bind_get(rq.raw_minor, &dev);
if (err)
return err;
rq.block_major = MAJOR(dev);
rq.block_minor = MINOR(dev);
if (copy_to_user(user_req, &rq, sizeof(rq)))
return -EFAULT;
return 0;
}
return -EINVAL;
}
#endif
static const struct file_operations raw_fops = {
.read_iter = blkdev_read_iter,
.write_iter = blkdev_write_iter,
.fsync = blkdev_fsync,
.open = raw_open,
.release = raw_release,
.unlocked_ioctl = raw_ioctl,
.llseek = default_llseek,
.owner = THIS_MODULE,
};
static const struct file_operations raw_ctl_fops = {
.unlocked_ioctl = raw_ctl_ioctl,
#ifdef CONFIG_COMPAT
.compat_ioctl = raw_ctl_compat_ioctl,
#endif
.open = raw_open,
.owner = THIS_MODULE,
.llseek = noop_llseek,
};
static struct cdev raw_cdev;
static char *raw_devnode(struct device *dev, umode_t *mode)
{
return kasprintf(GFP_KERNEL, "raw/%s", dev_name(dev));
}
static int __init raw_init(void)
{
dev_t dev = MKDEV(RAW_MAJOR, 0);
int ret;
if (max_raw_minors < 1 || max_raw_minors > 65536) {
pr_warn("raw: invalid max_raw_minors (must be between 1 and 65536), using %d\n",
CONFIG_MAX_RAW_DEVS);
max_raw_minors = CONFIG_MAX_RAW_DEVS;
}
raw_devices = vzalloc(array_size(max_raw_minors,
sizeof(struct raw_device_data)));
if (!raw_devices) {
printk(KERN_ERR "Not enough memory for raw device structures\n");
ret = -ENOMEM;
goto error;
}
ret = register_chrdev_region(dev, max_raw_minors, "raw");
if (ret)
goto error;
cdev_init(&raw_cdev, &raw_fops);
ret = cdev_add(&raw_cdev, dev, max_raw_minors);
if (ret)
goto error_region;
raw_class = class_create(THIS_MODULE, "raw");
if (IS_ERR(raw_class)) {
printk(KERN_ERR "Error creating raw class.\n");
cdev_del(&raw_cdev);
ret = PTR_ERR(raw_class);
goto error_region;
}
raw_class->devnode = raw_devnode;
device_create(raw_class, NULL, MKDEV(RAW_MAJOR, 0), NULL, "rawctl");
return 0;
error_region:
unregister_chrdev_region(dev, max_raw_minors);
error:
vfree(raw_devices);
return ret;
}
static void __exit raw_exit(void)
{
device_destroy(raw_class, MKDEV(RAW_MAJOR, 0));
class_destroy(raw_class);
cdev_del(&raw_cdev);
unregister_chrdev_region(MKDEV(RAW_MAJOR, 0), max_raw_minors);
}
module_init(raw_init);
module_exit(raw_exit);
MODULE_LICENSE("GPL");

View File

@ -3,10 +3,14 @@
# Xillybus devices
#
config XILLYBUS_CLASS
tristate
config XILLYBUS
tristate "Xillybus generic FPGA interface"
depends on PCI || OF
select CRC32
select XILLYBUS_CLASS
help
Xillybus is a generic interface for peripherals designed on
programmable logic (FPGA). The driver probes the hardware for
@ -21,7 +25,7 @@ config XILLYBUS_PCIE
depends on PCI_MSI
help
Set to M if you want Xillybus to use PCI Express for communicating
with the FPGA.
with the FPGA. The module will be called xillybus_pcie.
config XILLYBUS_OF
tristate "Xillybus over Device Tree"
@ -29,6 +33,20 @@ config XILLYBUS_OF
help
Set to M if you want Xillybus to find its resources from the
Open Firmware Flattened Device Tree. If the target is an embedded
system, say M.
system, say M. The module will be called xillybus_of.
endif # if XILLYBUS
# XILLYUSB doesn't depend on XILLYBUS
config XILLYUSB
tristate "XillyUSB: Xillybus generic FPGA interface for USB"
depends on USB
select CRC32
select XILLYBUS_CLASS
help
XillyUSB is the Xillybus variant which uses USB for communicating
with the FPGA.
Set to M if you want Xillybus to use USB for communicating with
the FPGA. The module will be called xillyusb.

View File

@ -3,6 +3,8 @@
# Makefile for Xillybus driver
#
obj-$(CONFIG_XILLYBUS_CLASS) += xillybus_class.o
obj-$(CONFIG_XILLYBUS) += xillybus_core.o
obj-$(CONFIG_XILLYBUS_PCIE) += xillybus_pcie.o
obj-$(CONFIG_XILLYBUS_OF) += xillybus_of.o
obj-$(CONFIG_XILLYUSB) += xillyusb.o

View File

@ -30,7 +30,8 @@ struct xilly_buffer {
struct xilly_idt_handle {
unsigned char *chandesc;
unsigned char *idt;
unsigned char *names;
int names_len;
int entries;
};
@ -94,7 +95,6 @@ struct xilly_endpoint {
struct device *dev;
struct xilly_endpoint_hardware *ephw;
struct list_head ep_list;
int dma_using_dac; /* =1 if 64-bit DMA is used, =0 otherwise. */
__iomem void *registers;
int fatal_error;
@ -102,12 +102,6 @@ struct xilly_endpoint {
struct mutex register_mutex;
wait_queue_head_t ep_wait;
/* Channels and message handling */
struct cdev cdev;
int major;
int lowest_minor; /* Highest minor = lowest_minor + num_channels - 1 */
int num_channels; /* EXCLUDING message buffer */
struct xilly_channel **channels;
int msg_counter;

View File

@ -0,0 +1,262 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2021 Xillybus Ltd, http://xillybus.com
*
* Driver for the Xillybus class
*/
#include <linux/types.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/mutex.h>
#include "xillybus_class.h"
MODULE_DESCRIPTION("Driver for Xillybus class");
MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
MODULE_ALIAS("xillybus_class");
MODULE_LICENSE("GPL v2");
static DEFINE_MUTEX(unit_mutex);
static LIST_HEAD(unit_list);
static struct class *xillybus_class;
#define UNITNAMELEN 16
struct xilly_unit {
struct list_head list_entry;
void *private_data;
struct cdev *cdev;
char name[UNITNAMELEN];
int major;
int lowest_minor;
int num_nodes;
};
int xillybus_init_chrdev(struct device *dev,
const struct file_operations *fops,
struct module *owner,
void *private_data,
unsigned char *idt, unsigned int len,
int num_nodes,
const char *prefix, bool enumerate)
{
int rc;
dev_t mdev;
int i;
char devname[48];
struct device *device;
size_t namelen;
struct xilly_unit *unit, *u;
unit = kzalloc(sizeof(*unit), GFP_KERNEL);
if (!unit)
return -ENOMEM;
mutex_lock(&unit_mutex);
if (!enumerate)
snprintf(unit->name, UNITNAMELEN, "%s", prefix);
for (i = 0; enumerate; i++) {
snprintf(unit->name, UNITNAMELEN, "%s_%02d",
prefix, i);
enumerate = false;
list_for_each_entry(u, &unit_list, list_entry)
if (!strcmp(unit->name, u->name)) {
enumerate = true;
break;
}
}
rc = alloc_chrdev_region(&mdev, 0, num_nodes, unit->name);
if (rc) {
dev_warn(dev, "Failed to obtain major/minors");
goto fail_obtain;
}
unit->major = MAJOR(mdev);
unit->lowest_minor = MINOR(mdev);
unit->num_nodes = num_nodes;
unit->private_data = private_data;
unit->cdev = cdev_alloc();
if (!unit->cdev) {
rc = -ENOMEM;
goto unregister_chrdev;
}
unit->cdev->ops = fops;
unit->cdev->owner = owner;
rc = cdev_add(unit->cdev, MKDEV(unit->major, unit->lowest_minor),
unit->num_nodes);
if (rc) {
dev_err(dev, "Failed to add cdev.\n");
/* kobject_put() is normally done by cdev_del() */
kobject_put(&unit->cdev->kobj);
goto unregister_chrdev;
}
for (i = 0; i < num_nodes; i++) {
namelen = strnlen(idt, len);
if (namelen == len) {
dev_err(dev, "IDT's list of names is too short. This is exceptionally weird, because its CRC is OK\n");
rc = -ENODEV;
goto unroll_device_create;
}
snprintf(devname, sizeof(devname), "%s_%s",
unit->name, idt);
len -= namelen + 1;
idt += namelen + 1;
device = device_create(xillybus_class,
NULL,
MKDEV(unit->major,
i + unit->lowest_minor),
NULL,
"%s", devname);
if (IS_ERR(device)) {
dev_err(dev, "Failed to create %s device. Aborting.\n",
devname);
rc = -ENODEV;
goto unroll_device_create;
}
}
if (len) {
dev_err(dev, "IDT's list of names is too long. This is exceptionally weird, because its CRC is OK\n");
rc = -ENODEV;
goto unroll_device_create;
}
list_add_tail(&unit->list_entry, &unit_list);
dev_info(dev, "Created %d device files.\n", num_nodes);
mutex_unlock(&unit_mutex);
return 0;
unroll_device_create:
for (i--; i >= 0; i--)
device_destroy(xillybus_class, MKDEV(unit->major,
i + unit->lowest_minor));
cdev_del(unit->cdev);
unregister_chrdev:
unregister_chrdev_region(MKDEV(unit->major, unit->lowest_minor),
unit->num_nodes);
fail_obtain:
mutex_unlock(&unit_mutex);
kfree(unit);
return rc;
}
EXPORT_SYMBOL(xillybus_init_chrdev);
void xillybus_cleanup_chrdev(void *private_data,
struct device *dev)
{
int minor;
struct xilly_unit *unit;
bool found = false;
mutex_lock(&unit_mutex);
list_for_each_entry(unit, &unit_list, list_entry)
if (unit->private_data == private_data) {
found = true;
break;
}
if (!found) {
dev_err(dev, "Weird bug: Failed to find unit\n");
mutex_unlock(&unit_mutex);
return;
}
for (minor = unit->lowest_minor;
minor < (unit->lowest_minor + unit->num_nodes);
minor++)
device_destroy(xillybus_class, MKDEV(unit->major, minor));
cdev_del(unit->cdev);
unregister_chrdev_region(MKDEV(unit->major, unit->lowest_minor),
unit->num_nodes);
dev_info(dev, "Removed %d device files.\n",
unit->num_nodes);
list_del(&unit->list_entry);
kfree(unit);
mutex_unlock(&unit_mutex);
}
EXPORT_SYMBOL(xillybus_cleanup_chrdev);
int xillybus_find_inode(struct inode *inode,
void **private_data, int *index)
{
int minor = iminor(inode);
int major = imajor(inode);
struct xilly_unit *unit;
bool found = false;
mutex_lock(&unit_mutex);
list_for_each_entry(unit, &unit_list, list_entry)
if (unit->major == major &&
minor >= unit->lowest_minor &&
minor < (unit->lowest_minor + unit->num_nodes)) {
found = true;
break;
}
mutex_unlock(&unit_mutex);
if (!found)
return -ENODEV;
*private_data = unit->private_data;
*index = minor - unit->lowest_minor;
return 0;
}
EXPORT_SYMBOL(xillybus_find_inode);
static int __init xillybus_class_init(void)
{
xillybus_class = class_create(THIS_MODULE, "xillybus");
if (IS_ERR(xillybus_class)) {
pr_warn("Failed to register xillybus class\n");
return PTR_ERR(xillybus_class);
}
return 0;
}
static void __exit xillybus_class_exit(void)
{
class_destroy(xillybus_class);
}
module_init(xillybus_class_init);
module_exit(xillybus_class_exit);

View File

@ -0,0 +1,30 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright 2021 Xillybus Ltd, http://www.xillybus.com
*
* Header file for the Xillybus class
*/
#ifndef __XILLYBUS_CLASS_H
#define __XILLYBUS_CLASS_H
#include <linux/types.h>
#include <linux/device.h>
#include <linux/fs.h>
#include <linux/module.h>
int xillybus_init_chrdev(struct device *dev,
const struct file_operations *fops,
struct module *owner,
void *private_data,
unsigned char *idt, unsigned int len,
int num_nodes,
const char *prefix, bool enumerate);
void xillybus_cleanup_chrdev(void *private_data,
struct device *dev);
int xillybus_find_inode(struct inode *inode,
void **private_data, int *index);
#endif /* __XILLYBUS_CLASS_H */

View File

@ -21,7 +21,6 @@
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/crc32.h>
@ -30,10 +29,10 @@
#include <linux/slab.h>
#include <linux/workqueue.h>
#include "xillybus.h"
#include "xillybus_class.h"
MODULE_DESCRIPTION("Xillybus core functions");
MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
MODULE_VERSION("1.07");
MODULE_ALIAS("xillybus_core");
MODULE_LICENSE("GPL v2");
@ -58,16 +57,6 @@ MODULE_LICENSE("GPL v2");
static const char xillyname[] = "xillybus";
static struct class *xillybus_class;
/*
* ep_list_lock is the last lock to be taken; No other lock requests are
* allowed while holding it. It merely protects list_of_endpoints, and not
* the endpoints listed in it.
*/
static LIST_HEAD(list_of_endpoints);
static struct mutex ep_list_lock;
static struct workqueue_struct *xillybus_wq;
/*
@ -570,10 +559,8 @@ static int xilly_scan_idt(struct xilly_endpoint *endpoint,
unsigned char *scan;
int len;
scan = idt;
idt_handle->idt = idt;
scan++; /* Skip version number */
scan = idt + 1;
idt_handle->names = scan;
while ((scan <= end_of_idt) && *scan) {
while ((scan <= end_of_idt) && *scan++)
@ -581,6 +568,8 @@ static int xilly_scan_idt(struct xilly_endpoint *endpoint,
count++;
}
idt_handle->names_len = scan - idt_handle->names;
scan++;
if (scan > end_of_idt) {
@ -1407,36 +1396,20 @@ static ssize_t xillybus_write(struct file *filp, const char __user *userbuf,
static int xillybus_open(struct inode *inode, struct file *filp)
{
int rc = 0;
int rc;
unsigned long flags;
int minor = iminor(inode);
int major = imajor(inode);
struct xilly_endpoint *ep_iter, *endpoint = NULL;
struct xilly_endpoint *endpoint;
struct xilly_channel *channel;
int index;
mutex_lock(&ep_list_lock);
list_for_each_entry(ep_iter, &list_of_endpoints, ep_list) {
if ((ep_iter->major == major) &&
(minor >= ep_iter->lowest_minor) &&
(minor < (ep_iter->lowest_minor +
ep_iter->num_channels))) {
endpoint = ep_iter;
break;
}
}
mutex_unlock(&ep_list_lock);
if (!endpoint) {
pr_err("xillybus: open() failed to find a device for major=%d and minor=%d\n",
major, minor);
return -ENODEV;
}
rc = xillybus_find_inode(inode, (void **)&endpoint, &index);
if (rc)
return rc;
if (endpoint->fatal_error)
return -EIO;
channel = endpoint->channels[1 + minor - endpoint->lowest_minor];
channel = endpoint->channels[1 + index];
filp->private_data = channel;
/*
@ -1799,95 +1772,6 @@ static const struct file_operations xillybus_fops = {
.poll = xillybus_poll,
};
static int xillybus_init_chrdev(struct xilly_endpoint *endpoint,
const unsigned char *idt)
{
int rc;
dev_t dev;
int devnum, i, minor, major;
char devname[48];
struct device *device;
rc = alloc_chrdev_region(&dev, 0, /* minor start */
endpoint->num_channels,
xillyname);
if (rc) {
dev_warn(endpoint->dev, "Failed to obtain major/minors");
return rc;
}
endpoint->major = major = MAJOR(dev);
endpoint->lowest_minor = minor = MINOR(dev);
cdev_init(&endpoint->cdev, &xillybus_fops);
endpoint->cdev.owner = endpoint->ephw->owner;
rc = cdev_add(&endpoint->cdev, MKDEV(major, minor),
endpoint->num_channels);
if (rc) {
dev_warn(endpoint->dev, "Failed to add cdev. Aborting.\n");
goto unregister_chrdev;
}
idt++;
for (i = minor, devnum = 0;
devnum < endpoint->num_channels;
devnum++, i++) {
snprintf(devname, sizeof(devname)-1, "xillybus_%s", idt);
devname[sizeof(devname)-1] = 0; /* Should never matter */
while (*idt++)
/* Skip to next */;
device = device_create(xillybus_class,
NULL,
MKDEV(major, i),
NULL,
"%s", devname);
if (IS_ERR(device)) {
dev_warn(endpoint->dev,
"Failed to create %s device. Aborting.\n",
devname);
rc = -ENODEV;
goto unroll_device_create;
}
}
dev_info(endpoint->dev, "Created %d device files.\n",
endpoint->num_channels);
return 0; /* succeed */
unroll_device_create:
devnum--; i--;
for (; devnum >= 0; devnum--, i--)
device_destroy(xillybus_class, MKDEV(major, i));
cdev_del(&endpoint->cdev);
unregister_chrdev:
unregister_chrdev_region(MKDEV(major, minor), endpoint->num_channels);
return rc;
}
static void xillybus_cleanup_chrdev(struct xilly_endpoint *endpoint)
{
int minor;
for (minor = endpoint->lowest_minor;
minor < (endpoint->lowest_minor + endpoint->num_channels);
minor++)
device_destroy(xillybus_class, MKDEV(endpoint->major, minor));
cdev_del(&endpoint->cdev);
unregister_chrdev_region(MKDEV(endpoint->major,
endpoint->lowest_minor),
endpoint->num_channels);
dev_info(endpoint->dev, "Removed %d device files.\n",
endpoint->num_channels);
}
struct xilly_endpoint *xillybus_init_endpoint(struct pci_dev *pdev,
struct device *dev,
struct xilly_endpoint_hardware
@ -2027,28 +1911,20 @@ int xillybus_endpoint_discovery(struct xilly_endpoint *endpoint)
if (rc)
goto failed_idt;
/*
* endpoint is now completely configured. We put it on the list
* available to open() before registering the char device(s)
*/
rc = xillybus_init_chrdev(dev, &xillybus_fops,
endpoint->ephw->owner, endpoint,
idt_handle.names,
idt_handle.names_len,
endpoint->num_channels,
xillyname, false);
mutex_lock(&ep_list_lock);
list_add_tail(&endpoint->ep_list, &list_of_endpoints);
mutex_unlock(&ep_list_lock);
rc = xillybus_init_chrdev(endpoint, idt_handle.idt);
if (rc)
goto failed_chrdevs;
goto failed_idt;
devres_release_group(dev, bootstrap_resources);
return 0;
failed_chrdevs:
mutex_lock(&ep_list_lock);
list_del(&endpoint->ep_list);
mutex_unlock(&ep_list_lock);
failed_idt:
xilly_quiesce(endpoint);
flush_workqueue(xillybus_wq);
@ -2059,11 +1935,7 @@ EXPORT_SYMBOL(xillybus_endpoint_discovery);
void xillybus_endpoint_remove(struct xilly_endpoint *endpoint)
{
xillybus_cleanup_chrdev(endpoint);
mutex_lock(&ep_list_lock);
list_del(&endpoint->ep_list);
mutex_unlock(&ep_list_lock);
xillybus_cleanup_chrdev(endpoint, endpoint->dev);
xilly_quiesce(endpoint);
@ -2077,17 +1949,9 @@ EXPORT_SYMBOL(xillybus_endpoint_remove);
static int __init xillybus_init(void)
{
mutex_init(&ep_list_lock);
xillybus_class = class_create(THIS_MODULE, xillyname);
if (IS_ERR(xillybus_class))
return PTR_ERR(xillybus_class);
xillybus_wq = alloc_workqueue(xillyname, 0, 0);
if (!xillybus_wq) {
class_destroy(xillybus_class);
if (!xillybus_wq)
return -ENOMEM;
}
return 0;
}
@ -2096,8 +1960,6 @@ static void __exit xillybus_exit(void)
{
/* flush_workqueue() was called for each endpoint released */
destroy_workqueue(xillybus_wq);
class_destroy(xillybus_class);
}
module_init(xillybus_init);

View File

@ -17,7 +17,6 @@
MODULE_DESCRIPTION("Xillybus driver for Open Firmware");
MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
MODULE_VERSION("1.06");
MODULE_ALIAS("xillybus_of");
MODULE_LICENSE("GPL v2");

View File

@ -14,7 +14,6 @@
MODULE_DESCRIPTION("Xillybus driver for PCIe");
MODULE_AUTHOR("Eli Billauer, Xillybus Ltd.");
MODULE_VERSION("1.06");
MODULE_ALIAS("xillybus_pcie");
MODULE_LICENSE("GPL v2");

File diff suppressed because it is too large Load Diff

View File

@ -555,6 +555,7 @@ static int comedi_8254_insn_config(struct comedi_device *dev,
/**
* comedi_8254_subdevice_init - initialize a comedi_subdevice for the 8254 timer
* @s: comedi_subdevice struct
* @i8254: comedi_8254 struct
*/
void comedi_8254_subdevice_init(struct comedi_subdevice *s,
struct comedi_8254 *i8254)
@ -607,7 +608,7 @@ static struct comedi_8254 *__i8254_init(unsigned long iobase,
/**
* comedi_8254_init - allocate and initialize the 8254 device for pio access
* @mmio: port I/O base address
* @iobase: port I/O base address
* @osc_base: base time of the counter in ns
* OPTIONAL - only used by comedi_8254_cascade_ns_to_timer()
* @iosize: I/O register size

View File

@ -143,7 +143,7 @@ EXPORT_SYMBOL_GPL(comedi_isadma_set_mode);
* comedi_isadma_alloc - allocate and initialize the ISA DMA
* @dev: comedi_device struct
* @n_desc: the number of cookies to allocate
* @dma_chan: DMA channel for the first cookie
* @dma_chan1: DMA channel for the first cookie
* @dma_chan2: DMA channel for the second cookie
* @maxsize: the size of the buffer to allocate for each cookie
* @dma_dir: the DMA direction

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routes.c
* Route information for NI boards.
@ -246,7 +245,7 @@ unsigned int ni_get_valid_routes(const struct ni_route_tables *tables,
}
EXPORT_SYMBOL_GPL(ni_get_valid_routes);
/**
/*
* List of NI global signal names that, as destinations, are only routeable
* indirectly through the *_arg elements of the comedi_cmd structure.
*/
@ -388,7 +387,7 @@ ni_find_route_set(const int destination,
}
EXPORT_SYMBOL_GPL(ni_find_route_set);
/**
/*
* ni_route_set_has_source() - Determines whether the given source is in
* included given route_set.
*
@ -507,7 +506,7 @@ s8 ni_route_to_register(const int src, const int dest,
}
EXPORT_SYMBOL_GPL(ni_route_to_register);
/**
/*
* ni_find_route_source() - Finds the signal source corresponding to a signal
* route (src-->dest) of the specified routing register
* value and the specified route destination on the

View File

@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routes.h
* Route information for NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/all.h
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6070e.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6220.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6221.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6229.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6251.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6254.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6259.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6534.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6602.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6713.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6723.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pci-6733.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxi-6030e.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxi-6224.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxi-6225.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxi-6251.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxi-6733.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxie-6251.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_device_routes/pxie-6738.c
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values.c
* Route information for NI boards.

View File

@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values.h
* Route information for NI boards.

View File

@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values/all.h
* List of valid routes for specific NI boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values/ni_660x.c
* Route information for NI_660X boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values/ni_eseries.c
* Route information for NI_ESERIES boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/ni_route_values/ni_mseries.c
* Route information for NI_MSERIES boards.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
#include <stdint.h>
#include <stdbool.h>

View File

@ -1,6 +1,5 @@
#!/usr/bin/env python3
# SPDX-License-Identifier: GPL-2.0+
# vim: ts=2:sw=2:et:tw=80:nowrap
# This is simply to aide in creating the entries in the order of the value of
# the device-global NI signal/terminal constants defined in comedi.h
@ -123,7 +122,6 @@ class DeviceRoutes(CSVCollection):
output_file_top = """\
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* List of valid routes for specific NI boards.
@ -155,7 +153,6 @@ class DeviceRoutes(CSVCollection):
extern_header = """\
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* List of valid routes for specific NI boards.
@ -193,7 +190,6 @@ class DeviceRoutes(CSVCollection):
single_output_file_top = """\
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* List of valid routes for specific NI boards.
@ -299,7 +295,6 @@ class RouteValues(CSVCollection):
output_file_top = """\
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* Route information for NI boards.
@ -337,7 +332,6 @@ class RouteValues(CSVCollection):
extern_header = """\
/* SPDX-License-Identifier: GPL-2.0+ */
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* List of valid routes for specific NI boards.
@ -375,7 +369,6 @@ class RouteValues(CSVCollection):
single_output_file_top = """\
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/ni_routing/{filename}
* Route information for {sheet} boards.

View File

@ -1,6 +1,5 @@
#!/usr/bin/env python3
# SPDX-License-Identifier: GPL-2.0+
# vim: ts=2:sw=2:et:tw=80:nowrap
from os import path
import os, csv

View File

@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0+
# vim: ts=2:sw=2:et:tw=80:nowrap
import os, csv, glob

View File

@ -1,6 +1,5 @@
#!/usr/bin/env python3
# SPDX-License-Identifier: GPL-2.0+
# vim: ts=2:sw=2:et:tw=80:nowrap
from os import path
import os, csv

View File

@ -1,5 +1,4 @@
# SPDX-License-Identifier: GPL-2.0+
# vim: ts=2:sw=2:et:tw=80:nowrap
"""
This file helps to extract string names of NI signals as included in comedi.h
between NI_NAMES_BASE and NI_NAMES_BASE+NI_NUM_NAMES.

View File

@ -1501,7 +1501,7 @@ int ni_tio_insn_config(struct comedi_device *dev,
}
EXPORT_SYMBOL_GPL(ni_tio_insn_config);
/**
/*
* Retrieves the register value of the current source of the output selector for
* the given destination.
*
@ -1541,10 +1541,10 @@ int ni_tio_get_routing(struct ni_gpct_device *counter_dev, unsigned int dest)
EXPORT_SYMBOL_GPL(ni_tio_get_routing);
/**
* Sets the register value of the selector MUX for the given destination.
* ni_tio_set_routing() - Sets the register value of the selector MUX for the given destination.
* @counter_dev: Pointer to general counter device.
* @destination:Device-global identifier of route destination.
* @register_value:
* @dest: Device-global identifier of route destination.
* @reg:
* The first several bits of this value should store the desired
* value to write to the register. All other bits are for
* transmitting information that modify the mode of the particular
@ -1580,7 +1580,7 @@ int ni_tio_set_routing(struct ni_gpct_device *counter_dev, unsigned int dest,
}
EXPORT_SYMBOL_GPL(ni_tio_set_routing);
/**
/*
* Sets the given destination MUX to its default value or disable it.
*
* Return: 0 if successful; -EINVAL if terminal is unknown.

View File

@ -1,5 +1,4 @@
// SPDX-License-Identifier: GPL-2.0+
/* vim: set ts=8 sw=8 noet tw=80 nowrap: */
/*
* comedi/drivers/tests/comedi_example_test.c
* Example set of unit tests.

Some files were not shown because too many files have changed in this diff Show More