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drm/i915: Fix computation of last_adjustment for RPS autotuning

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The issue is that by computing the last_adj value after applying the
clamping, we can end up with a bogus value for feeding into the next RPS
autotuning step.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Chris Wilson 2015-04-07 16:20:29 +01:00 committed by Daniel Vetter
parent 8fb55197e6
commit edcf284bfe
1 changed files with 12 additions and 15 deletions
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27
drivers/gpu/drm/i915/i915_irq.c
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@ -1095,21 +1095,20 @@ static void gen6_pm_rps_work(struct work_struct *work)
pm_iir |= vlv_wa_c0_ei(dev_priv, pm_iir); pm_iir |= vlv_wa_c0_ei(dev_priv, pm_iir);
adj = dev_priv->rps.last_adj; adj = dev_priv->rps.last_adj;
new_delay = dev_priv->rps.cur_freq;
if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) { if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) {
if (adj > 0) if (adj > 0)
adj *= 2; adj *= 2;
else { else /* CHV needs even encode values */
/* CHV needs even encode values */ adj = IS_CHERRYVIEW(dev_priv) ? 2 : 1;
adj = IS_CHERRYVIEW(dev_priv->dev) ? 2 : 1;
}
new_delay = dev_priv->rps.cur_freq + adj;
/* /*
* For better performance, jump directly * For better performance, jump directly
* to RPe if we're below it. * to RPe if we're below it.
*/ */
if (new_delay < dev_priv->rps.efficient_freq) if (new_delay < dev_priv->rps.efficient_freq - adj) {
new_delay = dev_priv->rps.efficient_freq; new_delay = dev_priv->rps.efficient_freq;
adj = 0;
}
} else if (pm_iir & GEN6_PM_RP_DOWN_TIMEOUT) { } else if (pm_iir & GEN6_PM_RP_DOWN_TIMEOUT) {
if (dev_priv->rps.cur_freq > dev_priv->rps.efficient_freq) if (dev_priv->rps.cur_freq > dev_priv->rps.efficient_freq)
new_delay = dev_priv->rps.efficient_freq; new_delay = dev_priv->rps.efficient_freq;
@ -1119,24 +1118,22 @@ static void gen6_pm_rps_work(struct work_struct *work)
} else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) { } else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) {
if (adj < 0) if (adj < 0)
adj *= 2; adj *= 2;
else { else /* CHV needs even encode values */
/* CHV needs even encode values */ adj = IS_CHERRYVIEW(dev_priv) ? -2 : -1;
adj = IS_CHERRYVIEW(dev_priv->dev) ? -2 : -1;
}
new_delay = dev_priv->rps.cur_freq + adj;
} else { /* unknown event */ } else { /* unknown event */
new_delay = dev_priv->rps.cur_freq; adj = 0;
} }
dev_priv->rps.last_adj = adj;
/* sysfs frequency interfaces may have snuck in while servicing the /* sysfs frequency interfaces may have snuck in while servicing the
* interrupt * interrupt
*/ */
new_delay += adj;
new_delay = clamp_t(int, new_delay, new_delay = clamp_t(int, new_delay,
dev_priv->rps.min_freq_softlimit, dev_priv->rps.min_freq_softlimit,
dev_priv->rps.max_freq_softlimit); dev_priv->rps.max_freq_softlimit);
dev_priv->rps.last_adj = new_delay - dev_priv->rps.cur_freq;
intel_set_rps(dev_priv->dev, new_delay); intel_set_rps(dev_priv->dev, new_delay);
mutex_unlock(&dev_priv->rps.hw_lock); mutex_unlock(&dev_priv->rps.hw_lock);