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ARM: 6511/1: ftrace: add ARM support for C version of recordmcount
Depending on the compiler version, ARM GCC calls the mcount function either __gnu_mcount_nc or mcount. Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -23,6 +23,7 @@ config ARM
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select PERF_USE_VMALLOC
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
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select HAVE_C_RECORDMCOUNT
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help
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The ARM series is a line of low-power-consumption RISC chip designs
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licensed by ARM Ltd and targeted at embedded applications and
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@ -38,6 +38,7 @@ static void *ehdr_curr; /* current ElfXX_Ehdr * for resource cleanup */
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static char gpfx; /* prefix for global symbol name (sometimes '_') */
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static struct stat sb; /* Remember .st_size, etc. */
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static jmp_buf jmpenv; /* setjmp/longjmp per-file error escape */
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static const char *altmcount; /* alternate mcount symbol name */
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/* setjmp() return values */
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enum {
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@ -299,7 +300,9 @@ do_file(char const *const fname)
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fail_file();
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} break;
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case EM_386: reltype = R_386_32; break;
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case EM_ARM: reltype = R_ARM_ABS32; break;
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case EM_ARM: reltype = R_ARM_ABS32;
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altmcount = "__gnu_mcount_nc";
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break;
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case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break;
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case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break;
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case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break;
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@ -275,11 +275,12 @@ static uint_t *sift_rel_mcount(uint_t *mlocp,
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Elf_Sym const *const symp =
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&sym0[Elf_r_sym(relp)];
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char const *symname = &str0[w(symp->st_name)];
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char const *mcount = '_' == gpfx ? "_mcount" : "mcount";
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if ('.' == symname[0])
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++symname; /* ppc64 hack */
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if (0 == strcmp((('_' == gpfx) ? "_mcount" : "mcount"),
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symname))
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if (0 == strcmp(mcount, symname) ||
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(altmcount && 0 == strcmp(altmcount, symname)))
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mcountsym = Elf_r_sym(relp);
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}
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