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ASoC: Ensure WM8731 register cache is synced when resuming from disabled

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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Mark Brown 2011-11-21 11:55:41 +00:00
parent 1d9a91db92
commit ed3e80c4c9
1 changed files with 1 additions and 0 deletions
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sound/soc/codecs/wm8731.c
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@ -453,6 +453,7 @@ static int wm8731_set_bias_level(struct snd_soc_codec *codec,
snd_soc_write(codec, WM8731_PWR, 0xffff); snd_soc_write(codec, WM8731_PWR, 0xffff);
regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies), regulator_bulk_disable(ARRAY_SIZE(wm8731->supplies),
wm8731->supplies); wm8731->supplies);
codec->cache_sync = 1;
break; break;
} }
codec->dapm.bias_level = level; codec->dapm.bias_level = level;