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sfc: Make the dmaq size a run-time setting (rather than compile-time)
- Allow the ring size to be specified in non power-of-two sizes (for instance to limit the amount of receive buffers). - Automatically size the event queue. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
8313aca38b
commit
ecc910f520
@ -348,7 +348,7 @@ void efx_process_channel_now(struct efx_channel *channel)
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napi_disable(&channel->napi_str);
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/* Poll the channel */
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efx_process_channel(channel, EFX_EVQ_SIZE);
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efx_process_channel(channel, channel->eventq_mask + 1);
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/* Ack the eventq. This may cause an interrupt to be generated
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* when they are reenabled */
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@ -365,9 +365,18 @@ void efx_process_channel_now(struct efx_channel *channel)
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*/
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static int efx_probe_eventq(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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unsigned long entries;
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netif_dbg(channel->efx, probe, channel->efx->net_dev,
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"chan %d create event queue\n", channel->channel);
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/* Build an event queue with room for one event per tx and rx buffer,
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* plus some extra for link state events and MCDI completions. */
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entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
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EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
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channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
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return efx_nic_probe_eventq(channel);
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}
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@ -1191,6 +1200,7 @@ static int efx_probe_all(struct efx_nic *efx)
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}
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/* Create channels */
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efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
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efx_for_each_channel(channel, efx) {
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rc = efx_probe_channel(channel);
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if (rc) {
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@ -2101,9 +2111,6 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
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efx->type = type;
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/* As close as we can get to guaranteeing that we don't overflow */
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BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
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EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
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/* Higher numbered interrupt modes are less capable! */
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@ -37,8 +37,6 @@ efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb);
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extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
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extern void efx_stop_queue(struct efx_channel *channel);
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extern void efx_wake_queue(struct efx_channel *channel);
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#define EFX_TXQ_SIZE 1024
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#define EFX_TXQ_MASK (EFX_TXQ_SIZE - 1)
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/* RX */
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extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue);
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@ -53,13 +51,16 @@ extern void __efx_rx_packet(struct efx_channel *channel,
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extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
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unsigned int len, bool checksummed, bool discard);
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extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue);
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#define EFX_RXQ_SIZE 1024
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#define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1)
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#define EFX_MAX_DMAQ_SIZE 4096UL
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#define EFX_DEFAULT_DMAQ_SIZE 1024UL
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#define EFX_MIN_DMAQ_SIZE 512UL
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#define EFX_MAX_EVQ_SIZE 16384UL
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#define EFX_MIN_EVQ_SIZE 512UL
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/* Channels */
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extern void efx_process_channel_now(struct efx_channel *channel);
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#define EFX_EVQ_SIZE 4096
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#define EFX_EVQ_MASK (EFX_EVQ_SIZE - 1)
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/* Ports */
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extern int efx_reconfigure_port(struct efx_nic *efx);
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@ -137,6 +137,7 @@ struct efx_tx_buffer {
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* @channel: The associated channel
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* @buffer: The software buffer ring
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* @txd: The hardware descriptor ring
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* @ptr_mask: The size of the ring minus 1.
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* @flushed: Used when handling queue flushing
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* @read_count: Current read pointer.
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* This is the number of buffers that have been removed from both rings.
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@ -170,6 +171,7 @@ struct efx_tx_queue {
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struct efx_nic *nic;
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struct efx_tx_buffer *buffer;
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struct efx_special_buffer txd;
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unsigned int ptr_mask;
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enum efx_flush_state flushed;
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/* Members used mainly on the completion path */
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@ -227,6 +229,7 @@ struct efx_rx_page_state {
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* @efx: The associated Efx NIC
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* @buffer: The software buffer ring
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* @rxd: The hardware descriptor ring
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* @ptr_mask: The size of the ring minus 1.
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* @added_count: Number of buffers added to the receive queue.
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* @notified_count: Number of buffers given to NIC (<= @added_count).
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* @removed_count: Number of buffers removed from the receive queue.
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@ -238,9 +241,6 @@ struct efx_rx_page_state {
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* @min_fill: RX descriptor minimum non-zero fill level.
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* This records the minimum fill level observed when a ring
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* refill was triggered.
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* @min_overfill: RX descriptor minimum overflow fill level.
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* This records the minimum fill level at which RX queue
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* overflow was observed. It should never be set.
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* @alloc_page_count: RX allocation strategy counter.
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* @alloc_skb_count: RX allocation strategy counter.
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* @slow_fill: Timer used to defer efx_nic_generate_fill_event().
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@ -250,6 +250,7 @@ struct efx_rx_queue {
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struct efx_nic *efx;
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struct efx_rx_buffer *buffer;
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struct efx_special_buffer rxd;
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unsigned int ptr_mask;
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int added_count;
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int notified_count;
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@ -307,6 +308,7 @@ enum efx_rx_alloc_method {
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* @reset_work: Scheduled reset work thread
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* @work_pending: Is work pending via NAPI?
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* @eventq: Event queue buffer
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* @eventq_mask: Event queue pointer mask
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* @eventq_read_ptr: Event queue read pointer
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* @last_eventq_read_ptr: Last event queue read pointer value.
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* @magic_count: Event queue test event count
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@ -339,6 +341,7 @@ struct efx_channel {
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struct napi_struct napi_str;
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bool work_pending;
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struct efx_special_buffer eventq;
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unsigned int eventq_mask;
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unsigned int eventq_read_ptr;
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unsigned int last_eventq_read_ptr;
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unsigned int magic_count;
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@ -641,6 +644,8 @@ union efx_multicast_hash {
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* @tx_queue: TX DMA queues
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* @rx_queue: RX DMA queues
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* @channel: Channels
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* @rxq_entries: Size of receive queues requested by user.
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* @txq_entries: Size of transmit queues requested by user.
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* @next_buffer_table: First available buffer table id
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* @n_channels: Number of channels in use
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* @n_rx_channels: Number of channels used for RX (= number of RX queues)
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@ -726,6 +731,8 @@ struct efx_nic {
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struct efx_channel *channel[EFX_MAX_CHANNELS];
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unsigned rxq_entries;
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unsigned txq_entries;
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unsigned next_buffer_table;
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unsigned n_channels;
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unsigned n_rx_channels;
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@ -356,7 +356,7 @@ static inline void efx_notify_tx_desc(struct efx_tx_queue *tx_queue)
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unsigned write_ptr;
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efx_dword_t reg;
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write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
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write_ptr = tx_queue->write_count & tx_queue->ptr_mask;
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EFX_POPULATE_DWORD_1(reg, FRF_AZ_TX_DESC_WPTR_DWORD, write_ptr);
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efx_writed_page(tx_queue->efx, ®,
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FR_AZ_TX_DESC_UPD_DWORD_P0, tx_queue->queue);
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@ -377,7 +377,7 @@ void efx_nic_push_buffers(struct efx_tx_queue *tx_queue)
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BUG_ON(tx_queue->write_count == tx_queue->insert_count);
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do {
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write_ptr = tx_queue->write_count & EFX_TXQ_MASK;
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write_ptr = tx_queue->write_count & tx_queue->ptr_mask;
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buffer = &tx_queue->buffer[write_ptr];
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txd = efx_tx_desc(tx_queue, write_ptr);
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++tx_queue->write_count;
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@ -398,10 +398,11 @@ void efx_nic_push_buffers(struct efx_tx_queue *tx_queue)
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int efx_nic_probe_tx(struct efx_tx_queue *tx_queue)
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{
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struct efx_nic *efx = tx_queue->efx;
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BUILD_BUG_ON(EFX_TXQ_SIZE < 512 || EFX_TXQ_SIZE > 4096 ||
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EFX_TXQ_SIZE & EFX_TXQ_MASK);
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unsigned entries;
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entries = tx_queue->ptr_mask + 1;
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return efx_alloc_special_buffer(efx, &tx_queue->txd,
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EFX_TXQ_SIZE * sizeof(efx_qword_t));
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entries * sizeof(efx_qword_t));
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}
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void efx_nic_init_tx(struct efx_tx_queue *tx_queue)
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@ -526,30 +527,32 @@ efx_build_rx_desc(struct efx_rx_queue *rx_queue, unsigned index)
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*/
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void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue)
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{
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struct efx_nic *efx = rx_queue->efx;
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efx_dword_t reg;
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unsigned write_ptr;
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while (rx_queue->notified_count != rx_queue->added_count) {
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efx_build_rx_desc(rx_queue,
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rx_queue->notified_count &
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EFX_RXQ_MASK);
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efx_build_rx_desc(
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rx_queue,
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rx_queue->notified_count & rx_queue->ptr_mask);
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++rx_queue->notified_count;
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}
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wmb();
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write_ptr = rx_queue->added_count & EFX_RXQ_MASK;
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write_ptr = rx_queue->added_count & rx_queue->ptr_mask;
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EFX_POPULATE_DWORD_1(reg, FRF_AZ_RX_DESC_WPTR_DWORD, write_ptr);
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efx_writed_page(rx_queue->efx, ®, FR_AZ_RX_DESC_UPD_DWORD_P0,
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efx_writed_page(efx, ®, FR_AZ_RX_DESC_UPD_DWORD_P0,
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efx_rx_queue_index(rx_queue));
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}
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int efx_nic_probe_rx(struct efx_rx_queue *rx_queue)
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{
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struct efx_nic *efx = rx_queue->efx;
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BUILD_BUG_ON(EFX_RXQ_SIZE < 512 || EFX_RXQ_SIZE > 4096 ||
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EFX_RXQ_SIZE & EFX_RXQ_MASK);
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unsigned entries;
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entries = rx_queue->ptr_mask + 1;
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return efx_alloc_special_buffer(efx, &rx_queue->rxd,
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EFX_RXQ_SIZE * sizeof(efx_qword_t));
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entries * sizeof(efx_qword_t));
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}
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void efx_nic_init_rx(struct efx_rx_queue *rx_queue)
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@ -685,7 +688,7 @@ efx_handle_tx_event(struct efx_channel *channel, efx_qword_t *event)
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tx_queue = efx_channel_get_tx_queue(
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channel, tx_ev_q_label % EFX_TXQ_TYPES);
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tx_packets = ((tx_ev_desc_ptr - tx_queue->read_count) &
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EFX_TXQ_MASK);
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tx_queue->ptr_mask);
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channel->irq_mod_score += tx_packets;
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efx_xmit_done(tx_queue, tx_ev_desc_ptr);
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} else if (EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_WQ_FF_FULL)) {
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@ -796,8 +799,8 @@ efx_handle_rx_bad_index(struct efx_rx_queue *rx_queue, unsigned index)
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struct efx_nic *efx = rx_queue->efx;
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unsigned expected, dropped;
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expected = rx_queue->removed_count & EFX_RXQ_MASK;
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dropped = (index - expected) & EFX_RXQ_MASK;
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expected = rx_queue->removed_count & rx_queue->ptr_mask;
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dropped = (index - expected) & rx_queue->ptr_mask;
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netif_info(efx, rx_err, efx->net_dev,
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"dropped %d events (index=%d expected=%d)\n",
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dropped, index, expected);
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@ -835,7 +838,7 @@ efx_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event)
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rx_queue = efx_channel_get_rx_queue(channel);
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rx_ev_desc_ptr = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_DESC_PTR);
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expected_ptr = rx_queue->removed_count & EFX_RXQ_MASK;
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expected_ptr = rx_queue->removed_count & rx_queue->ptr_mask;
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if (unlikely(rx_ev_desc_ptr != expected_ptr))
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efx_handle_rx_bad_index(rx_queue, rx_ev_desc_ptr);
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@ -1002,6 +1005,7 @@ efx_handle_driver_event(struct efx_channel *channel, efx_qword_t *event)
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int efx_nic_process_eventq(struct efx_channel *channel, int budget)
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{
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struct efx_nic *efx = channel->efx;
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unsigned int read_ptr;
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efx_qword_t event, *p_event;
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int ev_code;
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@ -1026,7 +1030,7 @@ int efx_nic_process_eventq(struct efx_channel *channel, int budget)
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EFX_SET_QWORD(*p_event);
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/* Increment read pointer */
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read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
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read_ptr = (read_ptr + 1) & channel->eventq_mask;
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ev_code = EFX_QWORD_FIELD(event, FSF_AZ_EV_CODE);
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@ -1038,7 +1042,7 @@ int efx_nic_process_eventq(struct efx_channel *channel, int budget)
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break;
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case FSE_AZ_EV_CODE_TX_EV:
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tx_packets += efx_handle_tx_event(channel, &event);
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if (tx_packets >= EFX_TXQ_SIZE) {
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if (tx_packets > efx->txq_entries) {
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spent = budget;
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goto out;
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}
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@ -1073,10 +1077,11 @@ out:
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int efx_nic_probe_eventq(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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BUILD_BUG_ON(EFX_EVQ_SIZE < 512 || EFX_EVQ_SIZE > 32768 ||
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EFX_EVQ_SIZE & EFX_EVQ_MASK);
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unsigned entries;
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entries = channel->eventq_mask + 1;
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return efx_alloc_special_buffer(efx, &channel->eventq,
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EFX_EVQ_SIZE * sizeof(efx_qword_t));
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entries * sizeof(efx_qword_t));
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}
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void efx_nic_init_eventq(struct efx_channel *channel)
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@ -1172,7 +1177,7 @@ static void efx_poll_flush_events(struct efx_nic *efx)
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struct efx_tx_queue *tx_queue;
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struct efx_rx_queue *rx_queue;
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unsigned int read_ptr = channel->eventq_read_ptr;
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unsigned int end_ptr = (read_ptr - 1) & EFX_EVQ_MASK;
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unsigned int end_ptr = (read_ptr - 1) & channel->eventq_mask;
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do {
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efx_qword_t *event = efx_event(channel, read_ptr);
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@ -1212,7 +1217,7 @@ static void efx_poll_flush_events(struct efx_nic *efx)
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* it's ok to throw away every non-flush event */
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EFX_SET_QWORD(*event);
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read_ptr = (read_ptr + 1) & EFX_EVQ_MASK;
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read_ptr = (read_ptr + 1) & channel->eventq_mask;
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} while (read_ptr != end_ptr);
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channel->eventq_read_ptr = read_ptr;
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@ -133,7 +133,7 @@ static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
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unsigned index, count;
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for (count = 0; count < EFX_RX_BATCH; ++count) {
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index = rx_queue->added_count & EFX_RXQ_MASK;
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index = rx_queue->added_count & rx_queue->ptr_mask;
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rx_buf = efx_rx_buffer(rx_queue, index);
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rx_buf->skb = netdev_alloc_skb(net_dev, skb_len);
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@ -208,7 +208,7 @@ static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
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dma_addr += sizeof(struct efx_rx_page_state);
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split:
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index = rx_queue->added_count & EFX_RXQ_MASK;
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index = rx_queue->added_count & rx_queue->ptr_mask;
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rx_buf = efx_rx_buffer(rx_queue, index);
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rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
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rx_buf->skb = NULL;
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@ -285,7 +285,7 @@ static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
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* we'd like to insert an additional descriptor whilst leaving
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* EFX_RXD_HEAD_ROOM for the non-recycle path */
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fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
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if (unlikely(fill_level >= EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM)) {
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if (unlikely(fill_level > rx_queue->max_fill)) {
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/* We could place "state" on a list, and drain the list in
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* efx_fast_push_rx_descriptors(). For now, this will do. */
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return;
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@ -294,7 +294,7 @@ static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
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++state->refcnt;
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get_page(rx_buf->page);
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index = rx_queue->added_count & EFX_RXQ_MASK;
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index = rx_queue->added_count & rx_queue->ptr_mask;
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new_buf = efx_rx_buffer(rx_queue, index);
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new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
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new_buf->skb = NULL;
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@ -319,7 +319,7 @@ static void efx_recycle_rx_buffer(struct efx_channel *channel,
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page_count(rx_buf->page) == 1)
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efx_resurrect_rx_buffer(rx_queue, rx_buf);
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index = rx_queue->added_count & EFX_RXQ_MASK;
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index = rx_queue->added_count & rx_queue->ptr_mask;
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new_buf = efx_rx_buffer(rx_queue, index);
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memcpy(new_buf, rx_buf, sizeof(*new_buf));
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@ -347,7 +347,7 @@ void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
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|
||||
/* Calculate current fill level, and exit if we don't need to fill */
|
||||
fill_level = (rx_queue->added_count - rx_queue->removed_count);
|
||||
EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
|
||||
EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
|
||||
if (fill_level >= rx_queue->fast_fill_trigger)
|
||||
goto out;
|
||||
|
||||
@ -650,15 +650,22 @@ void efx_rx_strategy(struct efx_channel *channel)
|
||||
int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
|
||||
{
|
||||
struct efx_nic *efx = rx_queue->efx;
|
||||
unsigned int rxq_size;
|
||||
unsigned int entries;
|
||||
int rc;
|
||||
|
||||
/* Create the smallest power-of-two aligned ring */
|
||||
entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
|
||||
EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
|
||||
rx_queue->ptr_mask = entries - 1;
|
||||
|
||||
netif_dbg(efx, probe, efx->net_dev,
|
||||
"creating RX queue %d\n", efx_rx_queue_index(rx_queue));
|
||||
"creating RX queue %d size %#x mask %#x\n",
|
||||
efx_rx_queue_index(rx_queue), efx->rxq_entries,
|
||||
rx_queue->ptr_mask);
|
||||
|
||||
/* Allocate RX buffers */
|
||||
rxq_size = EFX_RXQ_SIZE * sizeof(*rx_queue->buffer);
|
||||
rx_queue->buffer = kzalloc(rxq_size, GFP_KERNEL);
|
||||
rx_queue->buffer = kzalloc(entries * sizeof(*rx_queue->buffer),
|
||||
GFP_KERNEL);
|
||||
if (!rx_queue->buffer)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -672,6 +679,7 @@ int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
|
||||
|
||||
void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
|
||||
{
|
||||
struct efx_nic *efx = rx_queue->efx;
|
||||
unsigned int max_fill, trigger, limit;
|
||||
|
||||
netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
|
||||
@ -682,10 +690,9 @@ void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
|
||||
rx_queue->notified_count = 0;
|
||||
rx_queue->removed_count = 0;
|
||||
rx_queue->min_fill = -1U;
|
||||
rx_queue->min_overfill = -1U;
|
||||
|
||||
/* Initialise limit fields */
|
||||
max_fill = EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM;
|
||||
max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
|
||||
trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
|
||||
limit = max_fill * min(rx_refill_limit, 100U) / 100U;
|
||||
|
||||
@ -710,7 +717,7 @@ void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
|
||||
|
||||
/* Release RX buffers NB start at index 0 not current HW ptr */
|
||||
if (rx_queue->buffer) {
|
||||
for (i = 0; i <= EFX_RXQ_MASK; i++) {
|
||||
for (i = 0; i <= rx_queue->ptr_mask; i++) {
|
||||
rx_buf = efx_rx_buffer(rx_queue, i);
|
||||
efx_fini_rx_buffer(rx_queue, rx_buf);
|
||||
}
|
||||
|
@ -506,7 +506,7 @@ efx_test_loopback(struct efx_tx_queue *tx_queue,
|
||||
|
||||
for (i = 0; i < 3; i++) {
|
||||
/* Determine how many packets to send */
|
||||
state->packet_count = EFX_TXQ_SIZE / 3;
|
||||
state->packet_count = efx->txq_entries / 3;
|
||||
state->packet_count = min(1 << (i << 2), state->packet_count);
|
||||
state->skbs = kzalloc(sizeof(state->skbs[0]) *
|
||||
state->packet_count, GFP_KERNEL);
|
||||
|
@ -28,7 +28,7 @@
|
||||
* The tx_queue descriptor ring fill-level must fall below this value
|
||||
* before we restart the netif queue
|
||||
*/
|
||||
#define EFX_TXQ_THRESHOLD (EFX_TXQ_MASK / 2u)
|
||||
#define EFX_TXQ_THRESHOLD(_efx) ((_efx)->txq_entries / 2u)
|
||||
|
||||
/* We need to be able to nest calls to netif_tx_stop_queue(), partly
|
||||
* because of the 2 hardware queues associated with each core queue,
|
||||
@ -207,7 +207,7 @@ netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
|
||||
}
|
||||
|
||||
fill_level = tx_queue->insert_count - tx_queue->old_read_count;
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
q_space = efx->txq_entries - 1 - fill_level;
|
||||
|
||||
/* Map for DMA. Use pci_map_single rather than pci_map_page
|
||||
* since this is more efficient on machines with sparse
|
||||
@ -244,14 +244,14 @@ netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
|
||||
&tx_queue->read_count;
|
||||
fill_level = (tx_queue->insert_count
|
||||
- tx_queue->old_read_count);
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
q_space = efx->txq_entries - 1 - fill_level;
|
||||
if (unlikely(q_space-- <= 0))
|
||||
goto stop;
|
||||
smp_mb();
|
||||
--tx_queue->stopped;
|
||||
}
|
||||
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
insert_ptr = tx_queue->insert_count & tx_queue->ptr_mask;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->tsoh);
|
||||
@ -320,7 +320,7 @@ netdev_tx_t efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
|
||||
/* Work backwards until we hit the original insert pointer value */
|
||||
while (tx_queue->insert_count != tx_queue->write_count) {
|
||||
--tx_queue->insert_count;
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
insert_ptr = tx_queue->insert_count & tx_queue->ptr_mask;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
efx_dequeue_buffer(tx_queue, buffer);
|
||||
buffer->len = 0;
|
||||
@ -350,8 +350,8 @@ static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
|
||||
struct efx_nic *efx = tx_queue->efx;
|
||||
unsigned int stop_index, read_ptr;
|
||||
|
||||
stop_index = (index + 1) & EFX_TXQ_MASK;
|
||||
read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
|
||||
stop_index = (index + 1) & tx_queue->ptr_mask;
|
||||
read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
|
||||
|
||||
while (read_ptr != stop_index) {
|
||||
struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
|
||||
@ -368,7 +368,7 @@ static void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
|
||||
buffer->len = 0;
|
||||
|
||||
++tx_queue->read_count;
|
||||
read_ptr = tx_queue->read_count & EFX_TXQ_MASK;
|
||||
read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
|
||||
}
|
||||
}
|
||||
|
||||
@ -402,7 +402,7 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
|
||||
unsigned fill_level;
|
||||
struct efx_nic *efx = tx_queue->efx;
|
||||
|
||||
EFX_BUG_ON_PARANOID(index > EFX_TXQ_MASK);
|
||||
EFX_BUG_ON_PARANOID(index > tx_queue->ptr_mask);
|
||||
|
||||
efx_dequeue_buffers(tx_queue, index);
|
||||
|
||||
@ -412,7 +412,7 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
|
||||
smp_mb();
|
||||
if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) {
|
||||
fill_level = tx_queue->insert_count - tx_queue->read_count;
|
||||
if (fill_level < EFX_TXQ_THRESHOLD) {
|
||||
if (fill_level < EFX_TXQ_THRESHOLD(efx)) {
|
||||
EFX_BUG_ON_PARANOID(!efx_dev_registered(efx));
|
||||
|
||||
/* Do this under netif_tx_lock(), to avoid racing
|
||||
@ -430,18 +430,24 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
|
||||
int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
|
||||
{
|
||||
struct efx_nic *efx = tx_queue->efx;
|
||||
unsigned int txq_size;
|
||||
unsigned int entries;
|
||||
int i, rc;
|
||||
|
||||
netif_dbg(efx, probe, efx->net_dev, "creating TX queue %d\n",
|
||||
tx_queue->queue);
|
||||
/* Create the smallest power-of-two aligned ring */
|
||||
entries = max(roundup_pow_of_two(efx->txq_entries), EFX_MIN_DMAQ_SIZE);
|
||||
EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
|
||||
tx_queue->ptr_mask = entries - 1;
|
||||
|
||||
netif_dbg(efx, probe, efx->net_dev,
|
||||
"creating TX queue %d size %#x mask %#x\n",
|
||||
tx_queue->queue, efx->txq_entries, tx_queue->ptr_mask);
|
||||
|
||||
/* Allocate software ring */
|
||||
txq_size = EFX_TXQ_SIZE * sizeof(*tx_queue->buffer);
|
||||
tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
|
||||
tx_queue->buffer = kzalloc(entries * sizeof(*tx_queue->buffer),
|
||||
GFP_KERNEL);
|
||||
if (!tx_queue->buffer)
|
||||
return -ENOMEM;
|
||||
for (i = 0; i <= EFX_TXQ_MASK; ++i)
|
||||
for (i = 0; i <= tx_queue->ptr_mask; ++i)
|
||||
tx_queue->buffer[i].continuation = true;
|
||||
|
||||
/* Allocate hardware ring */
|
||||
@ -481,7 +487,7 @@ void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
|
||||
|
||||
/* Free any buffers left in the ring */
|
||||
while (tx_queue->read_count != tx_queue->write_count) {
|
||||
buffer = &tx_queue->buffer[tx_queue->read_count & EFX_TXQ_MASK];
|
||||
buffer = &tx_queue->buffer[tx_queue->read_count & tx_queue->ptr_mask];
|
||||
efx_dequeue_buffer(tx_queue, buffer);
|
||||
buffer->continuation = true;
|
||||
buffer->len = 0;
|
||||
@ -741,7 +747,7 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
||||
|
||||
fill_level = tx_queue->insert_count - tx_queue->old_read_count;
|
||||
/* -1 as there is no way to represent all descriptors used */
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
q_space = efx->txq_entries - 1 - fill_level;
|
||||
|
||||
while (1) {
|
||||
if (unlikely(q_space-- <= 0)) {
|
||||
@ -757,7 +763,7 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
||||
*(volatile unsigned *)&tx_queue->read_count;
|
||||
fill_level = (tx_queue->insert_count
|
||||
- tx_queue->old_read_count);
|
||||
q_space = EFX_TXQ_MASK - 1 - fill_level;
|
||||
q_space = efx->txq_entries - 1 - fill_level;
|
||||
if (unlikely(q_space-- <= 0)) {
|
||||
*final_buffer = NULL;
|
||||
return 1;
|
||||
@ -766,13 +772,13 @@ static int efx_tx_queue_insert(struct efx_tx_queue *tx_queue,
|
||||
--tx_queue->stopped;
|
||||
}
|
||||
|
||||
insert_ptr = tx_queue->insert_count & EFX_TXQ_MASK;
|
||||
insert_ptr = tx_queue->insert_count & tx_queue->ptr_mask;
|
||||
buffer = &tx_queue->buffer[insert_ptr];
|
||||
++tx_queue->insert_count;
|
||||
|
||||
EFX_BUG_ON_PARANOID(tx_queue->insert_count -
|
||||
tx_queue->read_count >
|
||||
EFX_TXQ_MASK);
|
||||
tx_queue->read_count >=
|
||||
efx->txq_entries);
|
||||
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->len);
|
||||
@ -813,7 +819,7 @@ static void efx_tso_put_header(struct efx_tx_queue *tx_queue,
|
||||
{
|
||||
struct efx_tx_buffer *buffer;
|
||||
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count & EFX_TXQ_MASK];
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count & tx_queue->ptr_mask];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->len);
|
||||
EFX_BUG_ON_PARANOID(buffer->unmap_len);
|
||||
@ -838,7 +844,7 @@ static void efx_enqueue_unwind(struct efx_tx_queue *tx_queue)
|
||||
while (tx_queue->insert_count != tx_queue->write_count) {
|
||||
--tx_queue->insert_count;
|
||||
buffer = &tx_queue->buffer[tx_queue->insert_count &
|
||||
EFX_TXQ_MASK];
|
||||
tx_queue->ptr_mask];
|
||||
efx_tsoh_free(tx_queue, buffer);
|
||||
EFX_BUG_ON_PARANOID(buffer->skb);
|
||||
if (buffer->unmap_len) {
|
||||
@ -1168,7 +1174,7 @@ static void efx_fini_tso(struct efx_tx_queue *tx_queue)
|
||||
unsigned i;
|
||||
|
||||
if (tx_queue->buffer) {
|
||||
for (i = 0; i <= EFX_TXQ_MASK; ++i)
|
||||
for (i = 0; i <= tx_queue->ptr_mask; ++i)
|
||||
efx_tsoh_free(tx_queue, &tx_queue->buffer[i]);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user