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drm/radeon/kms: minor HDMI audio cleanups
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -36,7 +36,7 @@
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*/
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static int r600_audio_chipset_supported(struct radeon_device *rdev)
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{
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return (rdev->family >= CHIP_R600 && rdev->family < CHIP_CEDAR)
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return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE4(rdev))
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|| rdev->family == CHIP_RS600
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|| rdev->family == CHIP_RS690
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|| rdev->family == CHIP_RS740;
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@ -248,22 +248,27 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
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return;
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}
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switch (dig->dig_encoder) {
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case 0:
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WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
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WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
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WREG32(R600_AUDIO_CLK_SRCSEL, 0);
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break;
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if (ASIC_IS_DCE4(rdev)) {
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/* TODO */
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} else {
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switch (dig->dig_encoder) {
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case 0:
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WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50);
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WREG32(R600_AUDIO_PLL1_DIV, clock * 100);
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WREG32(R600_AUDIO_CLK_SRCSEL, 0);
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break;
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case 1:
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WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
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WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
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WREG32(R600_AUDIO_CLK_SRCSEL, 1);
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break;
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default:
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dev_err(rdev->dev, "Unsupported DIG on encoder 0x%02X\n",
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radeon_encoder->encoder_id);
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return;
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case 1:
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WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50);
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WREG32(R600_AUDIO_PLL2_DIV, clock * 100);
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WREG32(R600_AUDIO_CLK_SRCSEL, 1);
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break;
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default:
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dev_err(rdev->dev,
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"Unsupported DIG on encoder 0x%02X\n",
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radeon_encoder->encoder_id);
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return;
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}
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}
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}
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@ -460,7 +460,9 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder)
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return;
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}
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if (ASIC_IS_DCE4(rdev)) {
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if (ASIC_IS_DCE5(rdev)) {
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/* TODO */
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} else if (ASIC_IS_DCE4(rdev)) {
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/* TODO */
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} else if (ASIC_IS_DCE3(rdev)) {
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radeon_encoder->hdmi_offset = dig->dig_encoder ?
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@ -497,9 +499,15 @@ void r600_hdmi_enable(struct drm_encoder *encoder)
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}
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offset = radeon_encoder->hdmi_offset;
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if (ASIC_IS_DCE32(rdev) && !ASIC_IS_DCE4(rdev)) {
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if (ASIC_IS_DCE5(rdev)) {
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/* TODO */
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} else if (ASIC_IS_DCE4(rdev)) {
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/* TODO */
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} else if (ASIC_IS_DCE32(rdev)) {
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WREG32_P(radeon_encoder->hdmi_config_offset + 0x4, 0x1, ~0x1);
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} else if (rdev->family >= CHIP_R600 && !ASIC_IS_DCE3(rdev)) {
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} else if (ASIC_IS_DCE3(rdev)) {
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/* TODO */
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} else if (rdev->family >= CHIP_R600) {
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switch (radeon_encoder->encoder_id) {
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
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WREG32_P(AVIVO_TMDSA_CNTL, 0x4, ~0x4);
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